CN105721267A - Internet of Things intelligent terminal gateway device - Google Patents
Internet of Things intelligent terminal gateway device Download PDFInfo
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- CN105721267A CN105721267A CN201610277951.2A CN201610277951A CN105721267A CN 105721267 A CN105721267 A CN 105721267A CN 201610277951 A CN201610277951 A CN 201610277951A CN 105721267 A CN105721267 A CN 105721267A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/2803—Home automation networks
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS], computer integrated manufacturing [CIM]
- G05B19/4185—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS], computer integrated manufacturing [CIM] characterised by the network communication
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/66—Arrangements for connecting between networks having differing types of switching systems, e.g. gateways
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W84/00—Network topologies
- H04W84/18—Self-organising networks, e.g. ad-hoc networks or sensor networks
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
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- Computer Networks & Wireless Communication (AREA)
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- Automation & Control Theory (AREA)
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- General Engineering & Computer Science (AREA)
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Abstract
The invention belongs to the technical field of the Internet of Things, specifically relates to an Internet of Things intelligent terminal gateway device. The solved technical problem is providing the Internet of Things intelligent terminal gateway device. According to the device, data collection of multi-way sensors and control of multi-way switching devices can be realized, and multiple transmission modes and a voice broadcast function are integrated with the device. The adopted technical scheme is that the Internet of Things intelligent terminal gateway device comprises a CPU master control chip, a sensor data collection circuit, a switching device control circuit, a multi-mode communication circuit, a voice broadcast circuit and a power supply management circuit. The device is applicable to the field of the Internet of Things.
Description
Technical field
The invention belongs to the technical field of Internet of Things, be specifically related to a kind of Intelligent terminal for Internet of things gateway apparatus.
Background technology
Internet of Things there is substantial amounts of sensor apply, various collection data can be transmitted back to network management center with curtage form by sensor, the main formula of connection of sensor and network or node is mainly based on sensor protocol converter, and mostly is single transmission mode.If internet-of-things terminal number of sensors is more, then using substantial amounts of sensor protocol converter, not only equipment is many, costly, and installs complicated, and efficiency is low, and malfunctioning node is also many.In addition, existing sensor data acquisition system mainly adopts serial communication mode, transmission range is short, transmission speed is slow, networking is complex and high cost, do distributed or distance networking difficulty, not easily it is applied in large-scale Internet of Things, and, a lot of sensor data acquisition system do not have integrated multipath switch control functions, it is necessary to carried out on-off control by other equipment, Internet of Things application and development complexity uprises, integrated difficulty strengthens, and reports merit function also without field speech, it is impossible to do report and warning function linkage.
Summary of the invention
The present invention overcomes the deficiency that prior art exists, technical problem to be solved is: provide one can realize multiple sensor data acquisition and multi-circuit switch gear controls, and the Intelligent terminal for Internet of things gateway apparatus of integrated multiple transmission means and voice broadcast function.
In order to solve above-mentioned technical problem, the technical solution used in the present invention is: Intelligent terminal for Internet of things gateway apparatus, including CPU main control chip, sensor data acquisition circuit, switchgear control circuit, multimode communicating circuit, voice broadcast circuit and electric power management circuit, described sensor data acquisition circuit output end is connected with the input of described CPU main control chip, the input of described switchgear control circuit is connected with the outfan of described CPU main control chip, described sensor data acquisition circuit includes multi-channel data acquisition circuit, described switchgear control circuit includes multicircuit relay control circuit, described multimode communicating circuit and described CPU main control chip are bi-directionally connected, the input of described voice broadcast circuit is connected with the outfan of described CPU main control chip, described electric power management circuit is that whole Intelligent terminal for Internet of things gateway apparatus is powered.
Preferably, described multimode communicating circuit includes: GPRS and RS485 communicating circuit, CAN communicating circuit, Ethernet communication circuit) and serial communication circuit.
Preferably, described Intelligent terminal for Internet of things gateway apparatus also includes internal testing circuit, and described internal testing circuit and described CPU main control chip are bi-directionally connected.
Preferably, described Intelligent terminal for Internet of things gateway apparatus also includes power reference circuit, and the outfan of described power reference circuit is connected with the input of described CPU main control chip.
Preferably, described Intelligent terminal for Internet of things gateway apparatus also includes indicating circuit, and the input of described indicating circuit is connected with the outfan of described CPU main control chip.
Preferably, described indicating circuit includes: status indicator lamp circuit, data indicator light circuit and warning circuit.
Preferably, described Intelligent terminal for Internet of things gateway apparatus also includes IP address storage circuit, and described IP address storage circuit and described CPU main control chip are bi-directionally connected.
Preferably, described CPU main control chip includes: process circuit, protection circuit, configuration circuit, decoupling circuit and address circuit.
The present invention compared with prior art has the advantages that
Intelligent terminal for Internet of things gateway apparatus in the present invention, including CPU main control chip, sensor data acquisition circuit, switchgear control circuit, multimode communicating circuit, voice broadcast circuit and electric power management circuit, described sensor data acquisition circuit includes multi-channel data acquisition circuit, and described switchgear control circuit includes multicircuit relay control circuit；Multi-channel data acquisition circuit is uniformly accessed into CPU main control chip, CPU main control chip processes after receiving sensing data, controlled the start-stop of external switch equipment by multicircuit relay control circuit according to result, and multiple data transfer mode and host computer can be adopted to be communicatively coupled, simultaneously can the state of voice broadcast relay.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, the present invention will be further described in detail.
Fig. 1 is the structural representation of Intelligent terminal for Internet of things gateway apparatus in the present invention；
Fig. 2 is the electrical block diagram of sensor data acquisition circuit in the present invention；
Fig. 3 is the electrical block diagram of CAN communicating circuit in the present invention；
Fig. 4 is the electrical block diagram of Ethernet communication circuit in the present invention；
Fig. 5 is the electrical block diagram of GPRS and RS485 communicating circuit in the present invention；
Fig. 6 is the electrical block diagram of serial communication circuit in the present invention；
In figure: 101 is CPU main control chip, 1011 for processing circuit, 1012 is protection circuit, 1013 is configuration circuit, 1014 is decoupling circuit, 1015 is address circuit, 102 is sensor data acquisition circuit, 103 is switchgear control circuit, 104 is multimode communicating circuit, 1041 is GPRS and RS485 communicating circuit, 1042 is CAN communicating circuit, 1043 is Ethernet communication circuit, 1044 is serial communication circuit, 105 is voice broadcast circuit, 106 is electric power management circuit, 107 is internal testing circuit, 108 is power reference circuit, 109 is indicating circuit, 1091 is status indicator lamp circuit, 1092 is data indicator light circuit, 1093 is warning circuit, 110 is IP address storage circuit.
Detailed description of the invention
For making the purpose of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is a part of embodiment of the present invention, rather than whole embodiments；Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under not making creative work premise, broadly fall into the scope of protection of the invention.
Fig. 1 is the structural representation of Intelligent terminal for Internet of things gateway apparatus provided by the invention, as shown in Figure 1, Intelligent terminal for Internet of things gateway apparatus includes CPU main control chip 101, sensor data acquisition circuit 102, switchgear control circuit 103, multimode communicating circuit 104, voice broadcast circuit 105 and electric power management circuit 106, the outfan of described sensor data acquisition circuit 102 is connected with the input of described CPU main control chip 101, the input of described switchgear control circuit 103 is connected with the outfan of described CPU main control chip 101, described sensor data acquisition circuit 102 includes multi-channel data acquisition circuit, described switchgear control circuit 103 includes multicircuit relay control circuit, described multimode communicating circuit 104 is bi-directionally connected with described CPU main control chip 101, the input of described voice broadcast circuit 105 is connected with the outfan of described CPU main control chip 101, described electric power management circuit 106 is powered for whole Intelligent terminal for Internet of things gateway apparatus.
Specifically, described multimode communicating circuit 104 includes: GPRS and RS485 communicating circuit 1041, CAN communicating circuit 1042, Ethernet communication circuit 1043 and serial communication circuit 1044.
Specifically, described Intelligent terminal for Internet of things gateway apparatus also includes internal testing circuit 107, and described internal testing circuit 107 is bi-directionally connected with described CPU main control chip 101.
Specifically, described Intelligent terminal for Internet of things gateway apparatus also includes power reference circuit 108, and the outfan of described power reference circuit 108 is connected with the input of described CPU main control chip 101.
Specifically, described Intelligent terminal for Internet of things gateway apparatus also includes indicating circuit 109, and the input of described indicating circuit 109 is connected with the outfan of described CPU main control chip 101.
Specifically, described indicating circuit 109 includes: status indicator lamp circuit 1091, data indicator light circuit 1092 and warning circuit 1093.
Specifically, described Intelligent terminal for Internet of things gateway apparatus also includes IP address storage circuit 110, and described IP address storage circuit 110 is bi-directionally connected with described CPU main control chip 101.
Specifically, described CPU main control chip 101 includes: process circuit 1011, protection circuit 1012, configuration circuit 1013, decoupling circuit 1014 and address circuit 1015.
Fig. 2 is the electrical block diagram of sensor data acquisition circuit in the present invention, as shown in Figure 2, a kind of sensor data acquisition circuit for Intelligent terminal for Internet of things gateway apparatus, described sensor data acquisition circuit includes the data acquisition circuit that many line structures are identical, described data acquisition circuit includes input block, filter unit, data processing unit and output unit, the input of described input block is connected with the outfan of external sensor, the outfan of described input block is connected with the input of described filter unit, the outfan of described filter unit is connected with the input of described data processing unit, the outfan of described data processing unit is connected with the input of described output unit, the outfan of described output unit is connected with the input of CPU main control chip 101.
Specifically, described input block includes binding post JXZ1, binding post JXZ2, binding post JXZ3 and binding post JXZ4, described filter unit includes resistance R1, electric capacity C1, resistance R3, electric capacity C3, resistance R5, electric capacity C5, resistance R7 and electric capacity C7, described data processing unit includes four road operational amplifier U1, and described output unit includes resistance R2, electric capacity C2, resistance R4, electric capacity C4, resistance R6, electric capacity C6, resistance R8 and electric capacity C8；The outfan of first input anode+IN1 and the described binding post JXZ1 of described four road operational amplifier U1 is connected, between the output and ground of described binding post JXZ1 respectively and be connected to described resistance R1 and described electric capacity C1, the outfan OUT1 of described four road operational amplifier U1 is connected with the input PA0 of described CPU main control chip 101 after concatenating described resistance R2, the input PA0 of described CPU main control chip 101 is also by described electric capacity C2 ground connection, the first outfan OUT1 of described four road operational amplifier U1 is also connected with the first input negative terminal-IN1 of described four road operational amplifier U1；The outfan of second input anode+IN2 and the described binding post JXZ2 of described four road operational amplifier U1 is connected, between the output and ground of described binding post JXZ2 respectively and be connected to described resistance R3 and described electric capacity C3, the second outfan OUT2 of described four road operational amplifier U1 is connected with the input PA1 of described CPU main control chip 101 after concatenating described resistance R4, the input PA1 of described CPU main control chip 101 is also by described electric capacity C4 ground connection, the second outfan OUT2 of described four road operational amplifier U1 is also connected with the second input negative terminal-IN2 of described four road operational amplifier U1；The outfan of the 3rd input anode+IN3 and the described binding post JXZ3 of described four road operational amplifier U1 is connected, between the output and ground of described binding post JXZ3 respectively and be connected to described resistance R5 and described electric capacity C5, the 3rd outfan OUT3 of described four road operational amplifier U1 is connected with the input PA2 of described CPU main control chip 101 after concatenating described resistance R6, the input PA2 of described CPU main control chip 101 is also by described electric capacity C6 ground connection, the 3rd outfan OUT3 of described four road operational amplifier U1 is also connected with the 3rd input negative terminal-IN3 of described four road operational amplifier U1；The outfan of the 4th input anode+IN4 and the described binding post JXZ4 of described four road operational amplifier U1 is connected, between the output and ground of described binding post JXZ4 respectively and be connected to described resistance R7 and described electric capacity C7, the 4th outfan OUT4 of described four road operational amplifier U1 is connected with the input PA3 of described CPU main control chip 101 after concatenating described resistance R8, the input PA3 of described CPU main control chip 101 is also by described electric capacity C8 ground connection, the 4th outfan OUT4 of described four road operational amplifier U1 is also connected with the 4th input negative terminal-IN4 of described four road operational amplifier U1；The power end of described binding post JXZ1, the power end of described binding post JXZ2, the power end of described binding post JXZ3, described binding post JXZ4 power end be connected with+24V power supply respectively, the positive source V+ and+5V power supply of described four road operational amplifier U1 is connected, and the power cathode V-and-5V power supply of described four road operational amplifier U1 is connected.
Specifically, the model of described four road operational amplifier U1 is AD8624.
Specifically, described sensor data acquisition circuit includes 4 circuit-switched data Acquisition Circuit.
Specifically, the model of described CPU main control chip 101 is STM32F107VCT6.
Specifically, the model of described bus transceiver U4 is VP230.
Fig. 3 is the electrical block diagram of CAN communicating circuit in the present invention, as shown in Figure 3, described CAN communicating circuit 1042 includes bus transceiver U4, the driver input end TXD of described bus transceiver U4, receptor outfan RXD respectively with the outfan PD1 of CPU main control chip 101, input PD0 is connected, the high output end of main CAN1_H of described bus transceiver U4, low output end of main CAN1_L is connected with binding post JXZ5 respectively, the high output end of main CAN1_H of described bus transceiver U4 is also connected with jumper cap CON1, the low output end of main CAN1_L of described bus transceiver U4 is connected with jumper cap CON1 by resistance R17, the power end of described bus transceiver U4 is connected with+3.3V power supply, the power end of described bus transceiver U4 is also by electric capacity C15 ground connection, the ripple shaping outfan RS of described bus transceiver U4 passes through resistance R16 ground connection.
Fig. 4 is the electrical block diagram of Ethernet communication circuit in the present invention, and as shown in Figure 4, described Ethernet communication circuit 1043 includes Ethernet protocol chip stack U2 and Ethernet transformator U3, the positive supply input VCC33 of described Ethernet protocol chip stack U2, positive supply input VCC18 respectively with+3.3V power supply, + 1.8V power supply is connected, the common ground end ground connection of described Ethernet protocol chip stack U2, the interrupt requests outfan INT# of described Ethernet protocol chip stack U2, parallel port address input end A0, parallel port chip select controls input PCS#, parallel port read gate input RD#, parallel port write gate input WR# respectively with the input PE7 of CPU main control chip 101, outfan PE6, outfan PE5, outfan PE4, outfan PE3 is connected, the data bus terminal D0# of described Ethernet protocol chip stack U2, D1#, D2#, D3#, D4#, D5#, D6#, D7# respectively with the input/output terminal PE8 of described CPU main control chip 101, PE9, PE10, PE11, PE12, PE13, PE14, PE15 is bi-directionally connected, the communication display lamp drive output ELINK of described Ethernet protocol chip stack U2, open drain output RDY# drives input ELINK1 with the communication display lamp of described Ethernet transformator U3 respectively, open-drain input RDY#1 is connected, the signal end RXP of described Ethernet protocol chip stack U2, RXN, TXP, TXN respectively with the negative input end RD-of described Ethernet transformator U3, positive input terminal RD+, negative output terminal TD-, positive output end TD+ is connected, the communication display lamp of described Ethernet transformator U3 drives the negative pole of input ELINK1 and light emitting diode D1 to be connected, it is connected with+3.3V power supply after the cathode series resistance R13 of described light emitting diode D1, the negative pole of open-drain input RDY#1 and the light emitting diode D2 of described Ethernet transformator U3 is connected, it is connected with+3.3V power supply after the cathode series resistance R14 of described light emitting diode D12, the negative input end RD-of described Ethernet transformator U3, positive input terminal RD+, negative output terminal TD-, positive output end TD+ is respectively through resistance R12, resistance R11, resistance R10, resistance R9 and+3.3V power supply is connected, and+3.3V power supply passes through electric capacity C9 ground connection, and the two ends of described electric capacity C9 are also connected to electric capacity C10, and the power end of described Ethernet transformator U3 is connected with+3.3V power supply, the earth terminal ground connection of described Ethernet transformator U3.
Specifically, the external reset outfan RST of described Ethernet protocol chip stack U2 is connected by electric capacity C11 and+3.3V power supply, the interface configuration input SEL ground connection of described Ethernet protocol chip stack U2, the external reset input terminals RSTI of described Ethernet protocol chip stack U2 passes through electric capacity C12 ground connection, the crystal oscillation input XI of described Ethernet protocol chip stack U2 passes through electric capacity C13 ground connection, the crystal oscillation reversed-phase output XO of described Ethernet protocol chip stack U2 passes through electric capacity C14 ground connection, it is provided with crystal oscillator X1 between the crystal oscillation input XI and the crystal oscillation reversed-phase output XO of described Ethernet protocol chip stack U2 of described Ethernet protocol chip stack U2, the input RSETE of described Ethernet protocol chip stack U2 passes through resistance R15 ground connection.
Specifically, the model of described Ethernet protocol chip stack U2 is CH395L, and the model of described Ethernet transformator U3 is HR911105A.
Fig. 5 is the electrical block diagram of GPRS and RS485 communicating circuit in the present invention, as shown in Figure 5, described GPRS and RS485 communicating circuit 1041 includes RS485 transceiver U5, the receptor outfan RO of described RS485 transceiver U5, driver input end DI respectively with the input PD6 of described CPU main control chip 101, outfan PD5 is connected, the reception Enable Pin RE of described RS485 transceiver U5 is connected with the outfan PD7 of described CPU main control chip 101, the transmission Enable Pin DE of described RS485 transceiver U5 passes through resistance R18 ground connection, the transmission Enable Pin DE of the reception Enable Pin RE of described RS485 transceiver U5 and described RS485 transceiver U5 is connected, the differential signal receiving terminal A of described RS485 transceiver U5, differential signal transmitting terminal B is connected with binding post JXZ6 respectively, the differential signal receiving terminal A of described RS485 transceiver U5 is also connected with jumper cap CON2, the differential signal transmitting terminal B of described RS485 transceiver U5 is connected with jumper cap CON2 by resistance R19, the power end of described RS485 transceiver U5 is connected with+3.3V power supply, the power end of described RS485 transceiver U5 passes through electric capacity C16 ground connection, the earth terminal GND ground connection of described RS485 transceiver U5.
Specifically, the model of described RS485 transceiver U5 is MAX485.
Fig. 6 is the electrical block diagram of serial communication circuit in the present invention, as shown in Figure 6, described serial communication circuit 1044 includes electrical level transferring chip U6 and plug DB9, the first input end T2IN of described electrical level transferring chip U6 is connected with the outfan PA9 of described CPU main control chip 101, the first outfan T2OUT of described electrical level transferring chip U6 is connected with described plug DB9, the second outfan R2OUT of described electrical level transferring chip U6 is connected with the input PA10 of described CPU main control chip 101, the second input R2IN of described electrical level transferring chip U6 is connected with described plug DB9, the earth terminal ground connection of described plug DB9, the first electric capacity anode C1+ of described electrical level transferring chip U6 is connected by the first electric capacity negative terminal C1-of electric capacity C17 and described electrical level transferring chip U6, the second electric capacity anode C2+ of described electrical level transferring chip U6 is connected by the second electric capacity negative terminal C2-of electric capacity C20 and described electrical level transferring chip U6, the power supply output plus terminal V+ of described electrical level transferring chip U6 passes through electric capacity C18 ground connection, the power end VCC of described electrical level transferring chip U6 passes through electric capacity C19 ground connection, the power end VCC and+3.3V power supply of described electrical level transferring chip U6 is connected, the power supply output negative terminal V-of described electrical level transferring chip U6 is by electric capacity C21 ground connection, the earth terminal GND ground connection of described electrical level transferring chip U6.
Specifically, the model of described electrical level transferring chip U6 is MAX232.
According to actual needs, the present invention can customize data acquisition and the facility switching control of any way, can be 8 circuit-switched data collections and 8 pipeline equipment on-off control, it is possible to be 16 circuit-switched data collections and 16 pipeline equipment on-off control.
Intelligent terminal for Internet of things gateway apparatus provided by the invention, multiple sensors is made to be directly connected to this gateway apparatus, all of sensing data reports and submits data either directly through gateway, replace conventional sensor protocol converter, install simple, expense is low, and malfunctioning node simplifies controlled, and this gateway apparatus also has other functions simultaneously: 1, can be carried out data transmission by CAN interface, Ethernet interface, RS232 interface, RS485 interface；2, the same type equipment of CAN interface tandem can be passed through, carry out on a large scale, (farthest 10KM) networking at a distance；3, Y-connection networking can be carried out by Ethernet interface；4, wirelessly transmitting data can be carried out by RS485 Interface Expanding 3G/4G/GPRS module；6, field apparatus switch can be controlled by data center by software automatic or manual；7, gateway can be configured or the direct field apparatus switch of quadratic programming carries out automatic/hand control；8, voice module is installed on gateway, field speech report can be carried out；9, gateway device software uses WEB embedded software, it is easy to configuration, interface is excellent good, it is easy to engineering construction human users；10, gateway has data transmission encryption and data verifying function, to protect the low error rates of data of data safety and health；11, can according to above technological development go out multiple can utility device.
Last it is noted that various embodiments above is only in order to illustrate technical scheme, it is not intended to limit；Although the present invention being described in detail with reference to foregoing embodiments, it will be understood by those within the art that: the technical scheme described in foregoing embodiments still can be modified by it, or wherein some or all of technical characteristic is carried out equivalent replacement；And these amendments or replacement, do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (8)
1. Intelligent terminal for Internet of things gateway apparatus, it is characterized in that: include CPU main control chip (101), sensor data acquisition circuit (102), switchgear control circuit (103), multimode communicating circuit (104), voice broadcast circuit (105) and electric power management circuit (106), the outfan of described sensor data acquisition circuit (102) is connected with the input of described CPU main control chip (101), the input of described switchgear control circuit (103) is connected with the outfan of described CPU main control chip (101), described sensor data acquisition circuit (102) includes multi-channel data acquisition circuit, described switchgear control circuit (103) includes multicircuit relay control circuit, described multimode communicating circuit (104) and described CPU main control chip (101) are bi-directionally connected, the input of described voice broadcast circuit (105) is connected with the outfan of described CPU main control chip (101), described electric power management circuit (106) is powered for whole Intelligent terminal for Internet of things gateway apparatus.
2. Intelligent terminal for Internet of things gateway apparatus according to claim 1, it is characterised in that: described multimode communicating circuit (104) including: GPRS and RS485 communicating circuit (1041), CAN communicating circuit (1042), Ethernet communication circuit (1043) and serial communication circuit (1044).
3. Intelligent terminal for Internet of things gateway apparatus according to claim 1, it is characterized in that: described Intelligent terminal for Internet of things gateway apparatus also includes internal testing circuit (107), and described internal testing circuit (107) and described CPU main control chip (101) are bi-directionally connected.
4. Intelligent terminal for Internet of things gateway apparatus according to claim 1, it is characterized in that: described Intelligent terminal for Internet of things gateway apparatus also includes power reference circuit (108), and the outfan of described power reference circuit (108) is connected with the input of described CPU main control chip (101).
5. Intelligent terminal for Internet of things gateway apparatus according to claim 1, it is characterized in that: described Intelligent terminal for Internet of things gateway apparatus also includes indicating circuit (109), and the input of described indicating circuit (109) is connected with the outfan of described CPU main control chip (101).
6. Intelligent terminal for Internet of things gateway apparatus according to claim 5, it is characterised in that: described indicating circuit (109) including: status indicator lamp circuit (1091), data indicator light circuit (1092) and warning circuit (1093).
7. Intelligent terminal for Internet of things gateway apparatus according to claim 1, it is characterized in that: described Intelligent terminal for Internet of things gateway apparatus also includes IP address storage circuit (110), and described IP address storage circuit (110) and described CPU main control chip (101) are bi-directionally connected.
8. Intelligent terminal for Internet of things gateway apparatus according to claim 1, it is characterised in that: described CPU main control chip (101) including: processes circuit (1011), protection circuit (1012), configuration circuit (1013), decoupling circuit (1014) and address circuit (1015).
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| CN113395725A (en) * | 2021-06-16 | 2021-09-14 | 南京征途信息技术有限公司 | Reliable double 4G mobile data communication system and communication method thereof |
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| CN204578880U (en) * | 2015-05-22 | 2015-08-19 | 江西珉轩智能科技有限公司 | A kind of multi-path integration relay board |
| CN205725804U (en) * | 2016-04-29 | 2016-11-23 | 韩文智 | A kind of Intelligent terminal for Internet of things gateway apparatus |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106850420A (en) * | 2017-03-01 | 2017-06-13 | 武汉智菱物联科技有限公司 | A kind of gateway and intelligent city management |
| CN112835335A (en) * | 2020-12-30 | 2021-05-25 | 深圳市亚晔实业有限公司 | Intelligent monitoring device and system based on thing networking centralized control formula |
| CN113395725A (en) * | 2021-06-16 | 2021-09-14 | 南京征途信息技术有限公司 | Reliable double 4G mobile data communication system and communication method thereof |
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