CN105680822B - A kind of high q-factor, inductance value and the tunable active inductance of operating frequency range - Google Patents

Abstract

An active inductance with high Q value, adjustable inductance value and operating frequency range, the active inductance includes a variable capacitor, an active feedback resistor, a positive transconductance amplifier, a negative transconductance amplifier, a first adjustable current source, A second adjustable current source and a DC blocking capacitor. Among them, the negative transconductance amplifier is to add multiple voltage modulation circuits on the common source-common gate structure; the adjustable active feedback resistor is connected between the positive and negative transconductance amplifiers to improve the real part loss of the active inductance, Further improve the Q value; the variable capacitor is connected to the input terminal of the positive transconductance amplifier and the output terminal of the negative transconductance amplifier to adjust the load capacitance of the active inductance, thereby expanding the adjustment range of the inductance value and Q value. Two adjustable current sources provide DC bias for the positive and negative transconductance amplifiers, respectively, and can adjust the operating frequency range of the active inductor. These components allow the operating frequency, inductance value and Q value of the active inductor to be adjusted.

Description

An active inductor with high Q value, inductance value and operating frequency range tunable

technical field

The invention relates to the field of radio frequency devices and integrated circuits, in particular to an active inductance with high Q value, inductance value and adjustable working frequency range.

Background technique

In radio frequency integrated circuits (RFICs), inductors are one of the commonly used components. For example, in a low-noise amplifier, the use of inductors can achieve input-output matching and improve the gain flatness of the amplifier; in voltage-controlled (current-controlled) oscillators, the use of inductors can achieve signal generation; in mixers, use The inductance can realize the modulation of the signal.

On-chip spiral inductors are commonly used in RFICs. Since the inductance value of the on-chip spiral inductor is closely related to its geometric size, the larger the inductance value, the larger the chip area occupied. In practical applications, it often occupies most of the chip area, which increases the cost of the chip and limits the integration of the chip. Moreover, when there are multiple inductors on the chip, a mutual inductance effect will be generated between different inductors, which seriously affects the overall performance of the RFIC. On-chip spiral inductors also have disadvantages such as low quality factor Q value and non-adjustable inductance value. In order to solve the problems of on-chip spiral inductors, active inductors synthesized by active devices such as transistors were born.

Compared with on-chip spiral inductors, active inductors have the advantages of occupying a smaller chip area, adjustable inductance and Q values, and lower manufacturing costs. In addition to being used instead of passive inductors, active inductors can also use their adjustability to compensate for adverse effects on RFIC performance due to process deviations, parasitic effects and other factors; RFIC parameters can be reconfigured to achieve performance adjustment. Therefore, active inductors have high practical value in practical applications.

Existing active inductors usually use a gyrator structure, turning the capacitance of the gyrator itself into an equivalent inductance. The negative transconductance amplifier often adopts a single-stage amplifier structure. The active inductor with this structure has a variable inductance value. The shortcomings of small tuning range, low Q value, and inability to change the operating frequency range of inductors limit their application in high-frequency RFICs.

Contents of the invention

The invention provides an active inductance with high Q value, adjustable inductance value and working frequency range. The negative transconductance amplifier in the active inductance of the present invention adds multiple voltage modulation circuits on the common gate tube of the common source-common gate structure, which not only increases the output impedance of the negative transconductance amplifier, but also reduces the Due to the loss caused by the equivalent series resistance, the Q value of the active inductor is improved; further, the use of an active adjustable resistor as a feedback loop can improve the Q value of the active inductor; in addition, by using a pre-variable capacitor , realize the adjustment of the load capacitance, and increase the adjustable range of the inductance value and Q value of the active inductance; at the same time, by adjusting the resistance value of the active feedback resistor and the control voltage of the multiple voltage modulation circuit of the negative transconductance amplifier, It can realize the adjustment of the inductance value and Q value of the active inductor; by adjusting the bias current of the positive and negative transconductance amplifiers, the static operating point of the positive and negative transconductance amplifiers can be changed, and the operating frequency range can be adjusted, so that Active inductors have a wide range of inductance value adjustment in different operating frequency ranges, and also have a high Q value, which can meet the needs of wide adjustment range and high-performance RFICs design for inductance.

The present invention adopts following technical scheme:

An active inductor with high Q value, adjustable inductance value and operating frequency range, as shown in Figure 1, the active inductor includes a variable capacitor, an active feedback resistor, a positive transconductance amplifier, a negative transconductance amplifier, the first An adjustable current source, a second adjustable current source, and a DC blocking capacitor.

The output terminal of the negative transconductance amplifier is connected with the input terminal of the positive transconductance amplifier through an active feedback resistor; the output terminal of the positive transconductance amplifier is connected with the input terminal of the negative transconductance amplifier; the positive transconductance amplifier is connected with the negative transconductance amplifier The conductance amplifiers are cross-connected to form a gyrator, and the gyrator converts the input capacitance of the positive transconductance amplifier including the variable capacitance into an equivalent inductance.

The first adjustable current source is connected to the negative transconductance amplifier to provide bias current for the negative transconductance amplifier; the second adjustable current source is connected to the positive transconductance amplifier to provide bias current for the positive transconductance amplifier. Adjusting the two adjustable current sources can change the magnitude of the bias current of the positive and negative transconductance amplifiers, thereby adjusting the static operating point of the positive and negative transconductance amplifiers, so that the operating frequency range of the active inductance changes, and then realizes the active inductance Adjustment of the operating frequency range of the inductor.

The first terminal of the DC blocking capacitor is the input terminal of the active inductor, and the second terminal is connected to the output terminal of the positive transconductance amplifier and the input terminal of the negative transconductance amplifier. The DC blocking capacitor can filter out signal interference caused by DC bias in the transconductance amplifier.

The active feedback resistor is connected between the input terminal of the positive transconductance amplifier and the output terminal of the negative transconductance amplifier. The addition of the active feedback resistor increases the output impedance of the active inductor and reduces the real part loss, thereby increasing the Q value of the active inductor. At the same time, adjusting the size of the active feedback resistor can also realize the inductance value and Q value adjustment.

The variable capacitor is composed of an NMOS transistor, the source and the drain of the variable capacitor are connected; the gate is one end of the variable capacitor, and the gate is respectively connected to the input terminal of the positive transconductance amplifier and the output terminal of the negative transconductance amplifier ; The substrate electrode is the other end of the variable capacitor, and the substrate electrode is connected to the ground. By adjusting the voltage of the source and drain of the variable capacitor, the capacitance of the gate relative to the ground terminal will change, so as to realize the adjustment of the load capacitance of the active inductance, thereby realizing the inductance value and Q value of the active inductance adjustment.

Both the positive transconductance amplifier and the negative transconductance amplifier are composed of NMOS transistors. The positive transconductance amplifier adopts a single-stage amplifier structure and is an important part of the gyrator. For the negative transconductance amplifier, it is a compound structure in which multiple voltage modulation structures are added to the common-gate tube of the common-source-common-gate structure, and it is another important component of the gyrator.

Compared with the prior art, the present invention has the following advantages:

The negative transconductance amplifier in the active inductance of the present invention adds multiple voltage modulation circuits on the common gate tube of the common source-common gate structure, which not only increases the output impedance of the negative transconductance amplifier, but also reduces the Due to the loss caused by the equivalent series resistance, the Q value of the active inductance is improved; further, the active adjustable resistor is used as a feedback loop to improve the Q value of the active inductance; in addition, the pre-variable Capacitor, realizes the adjustment of the load capacitance, increases the adjustable range of the inductance value and Q value of the active inductance; at the same time, by adjusting the resistance value of the active feedback resistor and adjusting the control of the multiple voltage modulation circuit of the negative transconductance amplifier The voltage can realize the adjustment of the inductance value and Q value of the active inductor; by adjusting the bias current of the positive and negative transconductance amplifiers, the static operating point of the positive and negative transconductance amplifiers can be changed, and the operating frequency range can be adjusted, thereby The active inductor has a wide adjustment range of inductance value in different operating frequency ranges, and has a high Q value at the same time, which can meet the needs of wide adjustment range and high-performance RFICs design for inductance.

Description of drawings

Fig. 1 is the structural block diagram of active inductance of the present invention;

Fig. 2 is the circuit topological schematic diagram of the embodiment of active inductance of the present invention;

Fig. 3 is a diagram showing the relationship between the inductance value and the operating frequency of the active inductor embodiment of the present invention under different combination bias conditions;

Fig. 4 is a relationship diagram between Q value and operating frequency under different combination bias conditions of the active inductor embodiment of the present invention;

Fig. 5 is another embodiment of the negative transconductance amplifier of the active inductor of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings.

Fig. 2 is an embodiment of an active inductor with tunable high Q value, inductance value and operating frequency range. It includes a variable capacitor, an active feedback resistor, a positive transconductance amplifier, a negative transconductance amplifier, a first adjustable current source, a second adjustable current source, and a DC blocking capacitor.

The variable capacitor is composed of the ninth MOS transistor (M9), its source is connected to the drain, the gate is one end of the capacitor, and the substrate electrode is the other end of the capacitor, which is connected to the ground to adjust the ninth MOS transistor (M9) The source and drain voltages of the Ninth MOS transistor (M9) will change the channel thickness of the ninth MOS transistor (M9), so that the channel capacitance will change, thereby changing the load capacitance of the active inductance, in order to realize the adjustment of the inductance value and Q of the active inductance Value provides the first necessary condition.

The active feedback resistor consists of a seventh MOS transistor (M7) connected in parallel with a resistor (R1), connected between the positive and negative transconductance amplifiers. The seventh MOS transistor (M7) works in a linear region, and adjusting the gate voltage of the seventh MOS transistor (M7) can realize the change of its resistance value. The addition of the active feedback resistor increases the output impedance of the active inductor, improves the real part loss, and improves the Q value of the active inductor; the output impedance of the active inductor can be adjusted by adjusting the resistance of the active feedback resistor, Furthermore, changing the inductance value and Q value of the active inductor provides a second necessary condition for adjusting the inductance value and Q value of the active inductor.

The negative transconductance amplifier is composed of a third MOS transistor (M3), a fourth MOS transistor (M4), a fifth MOS transistor and a sixth MOS transistor (M6). The third MOS transistor (M3) and the sixth MOS transistor (M6) form a common source-common gate structure, the fourth MOS transistor (M4) and the fifth MOS transistor form a multiple voltage modulation circuit, and the third MOS transistor (M3) ), the common source-common gate structure formed by the sixth MOS transistor (M6) together form a composite structure. The use of the adjustable negative transconductance amplifier not only increases the output impedance of the active inductance, but also reduces the loss caused by the equivalent series resistance and improves the Q value of the active inductance; at the same time, due to the multiple voltage modulation structure The addition of , enhances the adjustability of the active inductor, and provides a third necessary condition for adjusting the inductance value and Q value of the active inductor.

The positive transconductance amplifier is composed of an eighth MOS transistor (M8), and is a single-stage common-source amplifier. The positive transconductance amplifier and the negative transconductance amplifier are cross-connected to form a gyrator structure, which turns the input capacitance of the positive transconductance amplifier into an equivalent inductance.

The first adjustable current source is composed of a first MOS transistor (M1) and a second MOS transistor (M2), and provides a DC bias for the negative transconductance amplifier. The second adjustable current source is formed by a tenth MOS transistor (M10), which provides a DC bias for the positive transconductance amplifier. Adjusting the two adjustable current sources will change the magnitude of the bias current of the positive and negative transconductance amplifiers, thereby adjusting the static operating point of the positive and negative transconductance amplifiers, so that the operating frequency range of the active inductance changes, realizing the active Adjustment of the operating frequency range of the inductor.

The DC blocking capacitor consists of a capacitor (C1), which is used to filter out signal interference caused by DC bias in the transconductance amplifier.

The specific implementation of the circuit in this embodiment is:

The drain of the first MOS transistor (M1) is connected to VDD, the source is connected to the drain of the fourth MOS transistor (M4), and the gate is connected to the first adjustable voltage source V _tune1 ; the drain of the second MOS transistor (M2) The pole is connected to VDD, the source is connected to the drain of the third MOS transistor (M3), and the gate is connected to the second adjustable voltage source V _tune2 . The source of the fourth MOS transistor (M4) is connected to the drain of the fifth MOS transistor (M5), and the gate is connected to the third adjustable voltage source V _tune3 ; the source of the fifth MOS transistor (M5) is connected to the ground terminal, and the gate The pole is connected to the drain of the sixth MOS transistor (M6), the gate of the third MOS (M3) transistor is connected to the drain of the fourth MOS (M4) transistor, and the source is connected to the gate of the fifth MOS (M5) transistor and The drain of the sixth MOS transistor (M6) is connected, the gate of the sixth MOS transistor (M6) is connected to the source of the eighth MOS transistor (M8) and the drain of the tenth MOS transistor (M10), and the drain is connected to the ground terminal . The gate of the ninth MOS transistor (M9) is connected to the drain of the third MOS transistor (M3), and the source and drain of the ninth MOS transistor (M9) are connected to the adjustable voltage source V _tune5 . The source and drain of the seventh MOS transistor (M7) are respectively connected to the first terminal and the second terminal of the first resistor (R1), and the gate is connected to the fourth adjustable voltage source V _tune4 . The drain of the eighth MOS transistor (M8) is connected to VDD, the source is connected to the drain of the tenth MOS transistor (M10) and the gate of the sixth MOS transistor (M6), and the gate is connected to the active feedback resistor. The first terminal of the first capacitor (C1) is an RF input terminal, and the second terminal is connected to the source of the eighth MOS transistor (M8), the gate of the sixth MOS transistor (M6) and the drain of the tenth MOS transistor. The source of the tenth MOS transistor ( M10 ) is connected to the ground terminal, and the gate is connected to the sixth adjustable voltage source V _tune6 .

The first MOS transistor (M1) and the second MOS transistor (M2) are PMOS transistors; the third MOS transistor (M3), the fourth MOS transistor (M4), the fifth MOS transistor (M5), the sixth MOS transistor The transistor (M6), the seventh MOS transistor (M7), the eighth MOS transistor (M8), the ninth MOS transistor (M9), and the tenth MOS transistor (M10) are NMOS transistors.

Fig. 3 and Fig. 4 are diagrams showing the relationship between the inductance value and Q value and the working frequency under different combined bias conditions (Vbias1, Vbias2, Vbias3) of the active inductor of the present invention. Wherein, the combined bias condition Vbias1 is: V _tune1 =1.05V, V _tune2 =1.65V, V _tune3 =1.64V, V _tune4 =2.44V, V _tune5 =2.7V, V _tune6 =1.15V; the combined bias condition Vbias2 V _tune1 =1.65V, V _tune2 =1.49V, V _tune3 =0.57V, V _tune4 =2.48V, V _tune5 =1.8V, V _tune6 =0.79V; combined bias condition Vbias3 is: V _tune1 =1.52V , V _tune2 =1.62V, V _tune3 =1.08V, V _tune4 =2.47V, V _tune5 =1.75V, V _tune6 =0.78V, the power supply voltage VDD is 3V and remains unchanged. It can be seen from the figure that under the combined bias condition Vbias1, the active inductor of the present invention is inductive in the 0.1GHz-6.2GHz frequency band, and the inductance value varies from 10.7nH to 30.6nH in the 0.1GHz-5.1GHz frequency band. At the same time, in the 2GHz-3.3GHz frequency band, the Q value is greater than 20, the maximum is 2707, and in this frequency band, the variation range of the inductance value is 13.9nH-21.7nH. Under the combined bias condition Vbias2, the active inductance of the present invention is inductive in the 0.1GHz-8.3GHz frequency band, and the inductance value ranges from 7.2nH-22.4nH in the 0.1GHz-7.4GHz frequency band, and at the same time, in the 3GHz-4.7GHz The Q value in the frequency band is greater than 20, the maximum is 4139, and in this frequency band, the variation range of the inductance value is 9.9nH-15.7nH. Under the combined bias condition Vbias3, the active inductance of the present invention is inductive in the 0.1GHz-11.6GHz frequency band, and the inductance value ranges from 4.8nH-19.1nH in the 0.1GHz-11.3GHz frequency band, and at the same time, in the 4.7GHz-8GHz The Q value in the frequency band is greater than 20, the maximum is 4614, and in this frequency band, the variation range of the inductance value is 6.2nH-11.1nH. In a word, the maximum and minimum operating frequency ranges of the active inductor of the present invention are 0.1-11.6GHz and 0.1-6.2GHz respectively; wherein, in the frequency range of 0.1-11.3GHz, the inductance value can be between 4.8nH and 30.6nH Adjustment; between 2GHz-8GHz frequency range, Q value can be adjusted, and all can be greater than 20, the maximum value is as high as 4614. The above results show that the operating frequency, inductance value and Q value of the active inductor can be adjusted under different external voltage biases or combined biases, and different inductance values and Q values can be obtained, and it has high Q value and wide The inductance value tuning range, and the inductance can also work in different frequency ranges.

The circuit diagram of another embodiment of the negative transconductance amplifier provided by the present invention is shown in FIG. 5 . The first MOS transistor (M1) is connected to the third MOS transistor (M3) to form a common source-common gate structure, the second MOS transistor (M2) is used as a voltage modulation tube, and the drain of the second MOS transistor (M2) is connected to the second MOS transistor (M2). The gate of a MOS transistor (M1) is connected, the gate is connected with the source of the first MOS transistor (M1) and the drain of the third MOS transistor (M3), and the source is connected with the ground terminal, forming a voltage modulation structure. The drains of the first MOS transistor (M1) and the second MOS transistor (M2) are connected to the first adjustable current source, the drains of the first MOS transistor (M1) are connected to an active feedback resistor, and the drains of the third MOS transistor (M3) The gate is connected to the input of the positive transconductance amplifier. In this embodiment, the first MOS transistor (M1), the second MOS transistor (M2), and the third MOS transistor (M3) are all NMOS transistors.

Comparing Fig. 2 with the embodiment shown in Fig. 5, the negative transconductance amplifier in the embodiment shown in Fig. 2 has a larger transconductance value, a larger output impedance and a smaller The equivalent series resistance of the active inductor makes the active inductor have a higher inductance value and Q value; at the same time, since the transconductance value of the negative transconductance amplifier is directly related to the gate voltage of the voltage modulation tube connected to the common gate, it increases the Adjustability of active inductance. The embodiment of the negative transconductance amplifier shown in FIG. 5 can provide a larger equivalent inductance value, but the Q value will be reduced, and its adjustability will be reduced.

The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention will not be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (1)

1. An active inductance with high Q value, inductance value and tunable operating frequency range is characterized in that: the active inductance includes a variable capacitor, an active feedback resistor, a positive transconductance amplifier, a negative transconductance amplifier, a first An adjustable current source, a second adjustable current source, and a DC blocking capacitor; Wherein, the negative transconductance amplifier is composed of the third NMOS transistor (M3), the fourth NMOS transistor (M4), the fifth NMOS transistor and the sixth MOS transistor (M6); the third NMOS transistor (M3) and the sixth NMOS transistor ( M6) form a common source-common gate structure, the fourth NNMOS transistor (M4) and the fifth NMOS transistor form a multiple voltage modulation circuit, and the common source formed by the third NMOS transistor (M3) and the sixth NMOS transistor (M6) The pole-common gate structure forms a composite structure together, which not only increases the output impedance of the active inductor, but also reduces the loss caused by the equivalent series resistance and improves the Q value of the active inductor; at the same time, multiple voltage modulation The introduction of the circuit also enhances the adjustability of the active inductance; the positive transconductance amplifier is composed of the eighth NMOS transistor (M8), which is a single-stage common-source amplifier; the positive transconductance amplifier and the negative transconductance amplifier are cross-connected to form A gyrator structure is adopted, and the input capacitance of the positive transconductance amplifier including the variable capacitance is turned into an equivalent inductance; the variable capacitance is composed of the ninth NMOS transistor (M9), its source is connected to the drain, and the gate is The first terminal of the variable capacitor is connected to the input terminal of the positive transconductance amplifier and the output terminal of the negative transconductance amplifier, and the substrate electrode is the second terminal of the variable capacitor, which is connected to the ground terminal. On the one hand, the variable capacitor acts as A part of the slew capacitance enhances the slew performance of the circuit, on the other hand, by adjusting the voltage V _tune5 of the source and drain of the ninth NMOS transistor (M9), the channel thickness of the ninth NMOS transistor (M9) will be changed, The channel capacitance is changed, so as to realize the adjustment of the inductance value and Q value of the active inductor; the active feedback resistor is composed of a seventh NMOS transistor (M7) and a resistor (R1) connected in parallel, and is connected to the input of the positive transconductance amplifier Between the terminal and the output terminal of the negative transconductance amplifier, the output impedance of the active inductance is increased, the real part loss is improved, and the Q value of the active inductance is improved; by adjusting the resistance value of the active feedback resistor, the active inductance can be adjusted The adjustment of the inductance value and Q value of the source inductance; the first adjustable current source is composed of the first PMOS transistor (M1) and the second PMOS transistor (M2), which provides DC bias for the negative transconductance amplifier; the second adjustable current source The source is composed of the tenth NMOS transistor (M10), which provides DC bias for the positive transconductance amplifier; the first adjustable current source can independently adjust the negative transconductance amplifier; adjusting the two adjustable current sources at the same time will change the positive and negative The magnitude of the bias current of the transconductance amplifier, thereby adjusting the static operating point of the positive and negative transconductance amplifiers, making the operating frequency range of the active inductance change, and realizing the adjustment of the operating frequency range of the active inductance; the DC blocking capacitor is composed of a capacitor (C1) constitutes; Wherein: the source of the first PMOS transistor (M1) is connected to VDD, the drain is connected to the drain of the fourth NMOS transistor (M4), and the gate is connected to the first adjustable voltage source V _tune1 ; the second PMOS transistor (M2) The source of the source is connected to VDD, the drain is connected to the drain of the third NMOS transistor (M3), and the gate is connected to the second adjustable voltage source V _tune2 ; the source of the fourth NMOS transistor (M4) is connected to the fifth NMOS transistor ( The drain of M5) is connected, and the gate is connected to the third adjustable voltage source V _tune3 ; the source of the fifth NMOS transistor (M5) is connected to the ground terminal, and the gate is connected to the drain of the sixth NMOS transistor (M6), and the third NMOS The gate of the (M3) transistor is connected to the drain of the fourth NMOS (M4) transistor, the source is connected to the gate of the fifth NMOS (M5) transistor and the drain of the sixth NMOS transistor (M6), and the sixth NMOS transistor The gate of (M6) is connected to the source of the eighth NMOS transistor (M8) and the drain of the tenth NMOS transistor (M10), and the source is connected to the ground terminal; the gate of the ninth NMOS transistor (M9) is connected to the third NMOS transistor The drain of (M3) is connected to one end of the active feedback resistor, the source and drain of the ninth NMOS transistor (M9) are connected and connected to the adjustable voltage source V _tune5 ; the source and drain of the seventh NMOS transistor (M7) The electrodes are respectively connected to the first end and the second end of the resistor (R1), the gate is connected to the fourth adjustable voltage source V _tune4 ; the drain of the eighth NMOS transistor (M8) is connected to VDD, and the gate is connected to one end of the active feedback resistor connected; the first terminal of the DC blocking capacitor (C1) is the RF input terminal, and the second terminal is connected to the source of the eighth NMOS transistor (M8), the gate of the sixth NMOS transistor (M6) and the drain of the tenth NMOS transistor ; The source of the tenth NMOS transistor ( M10 ) is connected to the ground terminal, and the gate is connected to the sixth adjustable voltage source V _tune6 .