KR101481466B1 - Ultra low phase-noise CMOS voltage-controlled oscillator for mobile applicationr - Google Patents

Abstract

The present invention relates to an ultra-low phase noise CMOS voltage control oscillator (VCO) which improves a phase noise performance in comparison with an existing VCO in order to satisfy standards of a GSM 900 or DCS 1800 BTS receiver which requires the strictest phase noise performance in an offset frequency range of 600 kHz to 3 MHz. The ultra-low phase noise CMOS voltage control oscillator provided by the present invention is formed to suppress phase noise by: removing a current source which is the main noise source of a VCO; including a double tuning resonator in order to prevent a switching pair from entering a triode region; and filtering second harmonic noise from the common mode node of the VCO to a small size inductor.

Description

[0001] The present invention relates to an ultra low phase noise CMOS voltage controlled oscillator for mobile communications,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage-controlled oscillator (hereinafter also referred to as a 'VCO'), and more particularly to a voltage-controlled oscillator Phase noise CMOS voltage controlled oscillator for mobile communication applications which is configured to improve the phase noise performance compared to a conventional VCO so as to satisfy the criteria of a base station receiver of 900 or DCS 1800 BTS.

The present invention also includes double tuned resonators to eliminate the current source that is the main noise of the VCO and to prevent the switching pair from entering the triode region, In a mobile communication system configured to suppress phase noise by filtering out second harmonic noise from a common mode node of a VCO to a small size inductor, Phase noise CMOS voltage controlled oscillator for use in a low-noise,

In general, a fully monolithic voltage-controlled oscillator (VCO) implemented in current CMOS technology is used to provide an oscillator (RX) of a base station (BTS) receiver (RX) ) Phase noise criterion is not easy to meet.

More specifically, in the GSM standard, the GSM 900 micro and the normal BTS require the most stringent phase noise performance of a 3 MHz offset frequency at 600 kHz, and especially GSM 900 BTS at 800 kHz offset The specifications of the RX and DCS 1800 BTS RX are known to be the most difficult to meet.

Further, to satisfy such phase noise performance, it is conventionally possible to increase the Q factor of an integrated inductor or use other circuit techniques, for example, Various studies have been conducted to improve the phase noise performance.

As a result, it is known that the dominant phase noise source of the VCO is the tail current source (see References 1 and 2), thereby eliminating the terminal current source as a way to improve the phase noise of the VCO (See Reference 3).

However, when the terminal current source is removed as described above, there is a problem that the load impedance of the tank decreases when the oscillation swing is large, thereby reducing the phase noise performance.

Alternatively, there is a harmonic tuned method, but this requires a large number of inductors to filter the harmonics, which results in a disadvantage that the chip area is consumed as much as this (see Reference 1 and Reference 4).

Therefore, in order to solve the problems of the conventional VCOs described above, the method of removing the terminal current source has a problem that the load impedance of the tank is reduced when the oscillation swing is large, and the phase noise performance is deteriorated. The inductance of the conventional VCO, which requires a large area of the chip, can be solved, and the severe phase noise performance required in the GSM standard such as the GSM 900 BTS RX and the DCS 1800 BTS RX Phase noise CMOS voltage controlled oscillator for application to a mobile communication of a new structure which is configured to satisfy the above-mentioned needs. However, a device or a method that satisfies all of such requirements has not yet been provided.

[references]

1. A. Hajimiri and T. H. Lee, "A general theory of phase noise in electrical oscillators ", IEEE J. Solid-States, vol. 33, no. 2, pp. 179-194, Feb. 1998.

2. E. Hegazi and A. A. Abidi, "Varactor characteristics, oscillator tuning curves and AM-FM conversion", IEEE J. Solid-State Circuits, vol. 38, no. 6, pp. 1033-1039, Jun. 2003.

3. S. Levantino, C. Samori, A. Bonfanti, and SLJ Gierkink, AL Lacaita, and V. Boccuzzi, "Frequency dependence on bias current in 5-GHz CMOS VCOs: impact on tuning range and flicker noise upconversion", IEEE J. Solid-State Circuits, vol. 37, no. 8, pp. 1003-1011, Aug. 2002.

4. H. Kim, W. Kim, S. Ryu, B.-H. Park, and B. Kim, "A low phase noise

LC VCO in 65 nm CMOS process using rectangular switching technique ", IEEE Micro. Wireless Components Lett., Vol. 17, no. 8, pp. 610-612, Aug. 2007.

5. D. B. Leeson, "A simple model of feedback oscillator noise spectrum ", Proc. IEEE, vol. 54, no. 2, pp. 329-330, Feb. 1966.

6. J. J. Rael and A. A. Abidi, "Physical processes of phase noise in differential LC oscillators ", in Proc. Custom Integrated Circuit Conf., May 2000, pp. 569-572.

7. T. Song and E. Yoon, "A 1-V 5 GHz low phase noise LC-VCO using voltage-dividing and bias-level shifting technique", in Silicon Monolithic Integrated Circuits in RF Systems, Dig. Papers, Sep. 2004, pp. 87-90.

8. S. Levantino, M. Zanuso, C. Samori, and A. Lacaita, "Suppression of flicker noise upconversion in a 65nm CMOS VCO in the 3.0-to-3.6GHz band", ISSCC Dig. Tech. Papers, Feb. 2010, pp. 50-52.

9. J. Lin, "An integrated low-phase-noise voltage controlled oscillator for base station applications ", ISSCC Dig. Tech. Papers, Feb. 2000, pp. 432-433.

10. A. Wagemans, P. Baltus, R. Dekker, A. Hoogstraate, H. Maas, A. Tombeur, and J. van Sinderen, "A 3.5 mW 2.5 GHz diversity receiver and a 1.2 mW 3.6 GHz VCO in silicon- on-anything ", ISSCC Dig. Tech. Papers, Feb. 1998, pp. 250-251.

11. J. Steinkamp, F. Henkel, P. Wallow, et al., "A Colpitts oscillator design for a GSM base station synthesizer", IEEE Radio Frequency Integrated Circuits Symp., June 2007, pp. 405-408.

12. Andre Andreani, K. Kozmin, P. Sandrup, M. Nilsson, and T. Mattsson, "A TX VCO for WCDMA / EDGE in 90 nm RF CMOS", IEEE J. Solid-State Circuits, vol. 46, no. 7, pp. 1618-1626, Jul. 2011.

13. P. Andreani and A. Fard, "More on the 1 / f ² phase noise performance of CMOS differential-pair LC-tank oscillators", IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2703-2712, Dec. 2006.

14. A. Visweswaran, R. B. Staszewski, and J. R. Long, "A clip-and-restore technique for phase desensitization in a 1.2V 65nm CMOS oscillator for cellular mobile and base stations", ISSCC Dig. Tech. Papers, Feb. 2012, pp. 350-352.

15. L. Fanori, A. Liscidini, and P. Andreani, "A 6.7-to-9.2 GHz 55 nm CMOS hybrid class-B / class-C cellular TX VCO", ISSCC Dig. Tech. Papers, Feb. 2012, pp. 354-356.

IEEE J. Solid-State, IEEE Transactions on Solid-State Circuits, vol. 16, no. Circuits, vol. 42, no. 8, pp. 1635-1641, Aug. 2007.

[Prior Art Literature]

1. Patent Publication No. 10-1205717 (November 22, 2012)

2. Patent Publication No. 10-1190313 (Oct. 05, 2012)

3. Open Patent Publication No. 10-2009-0016093 (Feb. 23, 2009)

4. Patent Registration No. 10-0763733 (September 27, 2007)

5. Patent Registration No. 10-0473265 (Feb. 16, 2005)

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of removing an end current source in which a load impedance of a tank is reduced when an oscillation swing is large, The harmonic tuning method can solve the problems of conventional VCOs which require a large number of inductors and consume a lot of chip area, and at the same time, it is possible to solve the problems of the conventional VCOs that are required for the GSM standards such as GSM 900 BTS RX and DCS 1800 BTS RX Phase noise CMOS voltage controlled oscillator for application to a mobile communication of a new structure which is configured to satisfy the phase noise performance.

In order to achieve the above-mentioned object, according to the present invention, a phase-noise performance is improved compared to a conventional voltage-controlled oscillator (VCO), and a GSM 900 and a DCS 1800 BTS receiver ) a first capacitor (C _11, C ₁₂₎ in the ultra-low phase noise CMOS voltage controlled oscillator for application to a mobile communication configured to be able to meet the phase noise based on the GSM standard, the pair including the of the first inductor (L ₁ ); A second inductor L ₂ connected in parallel to the first LC and including a pair of second capacitors C ₂₁ and C ₂₂ and a second inductor L ₂ and a pair of variable capacitors C _var1 and C _var2 , An LC portion; A transistor portion including a pair of transistors M _p1 and M _p2 and connected in series with the second LC portion; And a filtering unit including a noise filtering inductor (L _filter ) and connected in series to the transistor unit. The ultra low noise CMOS voltage controlled oscillator for mobile communication is provided.

Here, the first LC unit comprises: a first capacitor of the pair (C _11, C ₁₂₎ is connected in series with each other, the first capacitor of the pair connected in series (C _11, C ₁₂₎ and the first And the inductor L ₁ are connected in parallel.

The second LC unit may further include a second inductor L ₂ connected in series between the pair of second capacitors C ₂₁ and C ₂₂ and a pair of variable capacitors C _var1 and C _var2) are connected in series and the other end of each of said variable capacitor (C _var1, C _var2) to each other are connected in parallel to both ends of the second inductor (L _2), the second capacitor of the pair connected in series ( C _21, C ₂₂₎ the other end drain V voltage _{(d +} a, V _d-) is output, respectively, the second inductor (L ₂₎ there is applied a bias power source (Vbias), the variable of the pair connected in series, And a tuning power source (V _tune ) is applied between the capacitors C _var1 and C _var2 .

The transistor unit may include a pair of transistors M _p1 and M _{p2 at} nodes connected to the drain voltages V _{d +} and V _d- at the other ends of the pair of second capacitors C ₂₁ and C ₂₂ connected in series, M and _p2) is connected to each respective drain terminal of a transistor of the variable capacitor of the pair (C _var1, C _var2) and the second inductor (L ₂₎ is one wherein the nodes are connected in parallel with each other pair (M _p1 And M _p2 are cross-coupled, and the source terminals of the pair of transistors M _p1 and M _p2 are connected in series to each other, and the gate terminals of the pair of transistors M _p1 and M _p2 are connected to each other. And the gate voltages _Vg- and Vg ₊ are respectively outputted to the gate electrode of the transistor.

Further, the filtering unit, wherein the noise filtering inductor (L _filter) is connected between the source terminal of the transistor (M _p1, M _p2) of the pair, the supply voltage (V other end of the noise filter inductor (L _{filter) DD} ) is applied.

In addition, the voltage-controlled oscillator may be configured such that a pair of transistors of the transistor unit is zero-excited by forming a series resonant LC resonator in the second LC unit by removing a current source of a main noise from a conventional VCO, The output voltage swing is amplified while the conduction at the zero crossing point and the entry into the triode region are prevented and the noise filtering inductor of the filtering section is amplified, The second harmonic noise component of the oscillation frequency is filtered out by the second harmonic frequency component to reduce the phase noise.

As described above, according to the present invention, there is provided an ultra low noise CMOS voltage controlled oscillator for application to mobile communication, whereby a method of removing an end current source reduces the load impedance of the tank when the oscillation swing is large, And the harmonic tuning method can solve the problems of the conventional VCOs which require a large number of inductors and consume a large chip area. In addition, it is possible to solve the problems of the conventional VCOs and also to satisfy the GSM standards such as GSM 900 BTS RX and DCS 1800 BTS RX So that it is possible to satisfy the strict phase noise performance required in the first embodiment.

1 is a diagram schematically showing the overall configuration of a conventional voltage-controlled oscillator.
2 is a diagram schematically showing the overall structure of an ultra-low phase noise CMOS voltage controlled oscillator for application to mobile communication according to an embodiment of the present invention.
3 is a graph showing a result of comparing noise performance with respect to each VCO shown in Figs. 1 and 2. Fig.
Fig. 4 is a view showing a resonator of the VCO shown in Fig. 2 including an equivalent parallel resistor.
5 is a view showing the impedances viewed from the drain node and the gate node.
FIG. 6 is a diagram illustrating a small signal equal half circuit model for a half circuit of a VCO according to an embodiment of the present invention shown in FIG. 2; FIG.
7 schematically shows the overall configuration of an ac cross-coupled differential VCO without a current source.
8 is a diagram showing the gate and drain node voltages of the ac cross-coupled differential VCO shown in FIG. 7 and the drain currents of the switching pair, respectively.
9 is a diagram showing voltage waveforms at drain and gate nodes of a VCO according to an embodiment of the present invention.
10 is a graph showing the results of simulating the drain-source voltage and the drain current with and without the second harmonic filtering inductor L _filter , respectively.
11 is a graph showing simulation results of the phase noise performance of the VCO according to the embodiment of the present invention with and without the inductor L _filter , respectively.
12 is a diagram showing an example of a circuit parameter configuration when the VCO according to the embodiment of the present invention is implemented through an actual circuit design.
Figure 13 is a tabular representation of VCO phase noise required in various GSM standards operating in the 900 MHz and 1800 MHz frequency bands.
FIG. 14 is a diagram showing a result of simulating the phase noise of a normal BTS VCO according to the present invention having a varactor tuning voltage of 0 to 0.7 V. FIG.
Figure 15 is a diagram showing the supply pushing characteristic of the supply voltage sweeping the supply voltage from 0.65V to 0.75V.
16 is a diagram illustrating phase noise performance normalized to 900 MHz and 1800 MHz for a VCO according to an embodiment of the present invention, respectively.
17 is a table summarizing performance of a VCO according to an embodiment of the present invention and performance comparison of an oscillator designed in state-of-the-art for GSM application.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, referring to the accompanying drawings, a specific embodiment of an ultra low noise CMOS voltage controlled oscillator for mobile communication according to the present invention will be described.

Hereinafter, it is to be noted that the following description is only an embodiment for carrying out the present invention, and the present invention is not limited to the contents of the embodiments described below.

In the following description of the embodiments of the present invention, parts that are the same as or similar to those of the prior art, or which can be easily understood and practiced by a person skilled in the art, It is important to bear in mind that we omit.

That is, according to the present invention, as described later, the method of removing the terminal current source decreases the load impedance of the tank when the oscillation swing is large, thereby deteriorating the phase noise performance. When the harmonic tuning method is applied, a large number of inductors are required The present invention can solve the problems of the conventional VCOs which have a disadvantage of consuming a large chip area and at the same time can realize a new structure of mobile communication system which is configured to satisfy the strict phase noise performance required in the GSM standard such as GSM 900 BTS RX and DCS 1800 BTS RX Phase noise CMOS voltage controlled oscillator for communication applications.

A detailed configuration of an ultra low noise CMOS voltage controlled oscillator for application to mobile communication according to the present invention will be described with reference to the drawings.

First, the phase noise model of the VCO will be described. The phase noise model of the VCO can be expressed as a modified semi-empirical model from Leeson's equation as shown in the following equation (1) have.

[Equation 1]

은 플리커잡음 코너주파수(flicker noise corner frequency)이다.
Where F is the noise factor, k is the Boltzmann's constant, T is the absolute temperature, P _s is the average power consumed in the tank, f ₀ is the oscillation frequency, Q _L is the effective quality factor of the tank, Δf is the offset from the carrier,

Is the flicker noise corner frequency.

In Equation (1), the noise factor F is a constant that depends on a circuit topology and is recognized in terms of device size, current, and other circuit parameters. It needs to be identified.

That is, the above noise factor F can be expressed by the following equation (2).

&Quot; (2) "

In Equation (2), I is the bias current,? Is the channel noise coefficient of the transistor (equal to 2/3 with respect to the long-channel transistor, R is the load resistance, and g _mbias is the transconductance of the terminal current source (see ref. 6).

Further, in Equation (2), the first term represents the noise contribution from the tank resistance and the second term represents the noise contribution from the differential pair transistor And the third term represents the phase noise from the terminal current source, respectively.

Here, the first term can be eliminated by improving the Q factor of the inductor, the second term can also be eliminated by increasing the tank voltage, and in a typical oscillator, the terminal current source noise dominates over the other noise sources, The differential pair of conventional VCO applies noise to the tank only at zero crossing while both transistors conduct (see Reference 2).

Thus, this third term can also be eliminated by excluding the current source from the VCO.

However, in this case, the switching pair transistor enters the triode region while lowering the average tank quality factor while undergoing a full oscillation cycle, so that the overall phase noise performance .

Here, this problem can be solved by applying a circuit technique such as, for example, dc bias-level shifting (see ref. 7) or inserting a resistor at the drain output Can be avoided by preventing the transistor from entering the triode region. However, this method also has limitations in improving the phase noise performance, and further, there is also a problem that the power consumption is increased.

More specifically, referring to FIG. 1, FIG. 1 is a diagram schematically showing the overall configuration of a conventional voltage-controlled oscillator.

As shown in Figure 1, the VCO tank is generally a parallel LC tank, and the VCO configuration shown in Figure 1 shows the configuration of a voltage-biased VCO with a PLC tank Document 2). Such a PLC VCO has an advantage that it is easy to implement, but has the above-described problems.

Accordingly, the present inventors have proposed a novel ultra-low phase noise VCO having improved phase noise performance by having a series LC tank (SLC) as described later.

That is, referring to FIG. 2, FIG. 2 is a diagram schematically showing the overall configuration of an ultra-low phase noise CMOS voltage controlled oscillator for application to mobile communication according to an embodiment of the present invention.

As shown in FIG. 2, an ultra low noise CMOS voltage controlled oscillator for mobile communication according to an embodiment of the present invention includes an inductor choke (SLC) having an SLC and consuming a zero voltage headroom choke), and the SLC tank requires a dc current flow path through the inductor choke or resistor.

The VCO according to the embodiment of the present invention configured as shown in FIG. 2 can be configured to have a low phase in consideration of the noise sources in the above-mentioned [Equation 1] and [Equation 2] by the following three mechanisms Noise becomes possible.

The first is to remove the current source that is the main noise of the VCO and the second is to use a series tuned LC resonator to prevent both transistors in the switching pair from conducting in the zero crossing and entering the triode region. resonator. By doing so, it is possible to obtain an effect that the output voltage swing is amplified at the series resonator and the LC connection node.

The third is to apply a noise filtering inductor to have a high impedance at the second harmonic of the oscillation frequency.

3, FIG. 3 is a diagram showing a result of comparing noise performance with respect to each VCO constructed as shown in FIG. 1 and FIG. 2. As shown in FIG.

That is, the present inventors have found that the conventional PLC VCO shown in FIG. 1 and the VCO having the SLC tank according to the present embodiment, as shown in FIG. 2, have the same device size and power consumption The noise performance is compared and the results are shown in FIG.

As shown in FIG. 3, according to the embodiment of the present invention, the VCO having the SLC tank exhibits 20 dB better phase noise performance than the conventional PLC VCO even in the absence of the second harmonic filtering inductor .

The low noise performance of such a conventional PLC VCO is mainly due to the lowered loaded Q factor, i.e. the switching transistor continuously enters the triode region and degrades the Q factor of the PLC tank.

On the other hand, the Q factor of the VCO according to the embodiment of the present invention is buffered through the capacitor C ₂ , the switching transistor is not turned on at the same time, and the drain node impedance is lowered at the series resonance oscillation frequency Do not.

Also, as with single-balanced mixer analysis (see Reference 2), low frequency noise such as flicker noise is up-converted to the oscillation frequency, The noise components near the even harmonics are up- and down-converted to the mixed output with the odd harmonics of the oscillation frequency.

Further, in the PLC VCO, when a large current flows, an odd harmonic component of the output is increased, which causes a more distorted waveform than a sinusoidal waveform. However, according to the present embodiment, a VCO , The harmonic components are greatly suppressed as compared with the PLC VCO, thereby causing a more pronounced sine wave.

Furthermore, in the above-mentioned expression (2), the phase noise performance can be improved by providing a second harmonic noise filtering inductor, ≪ / RTI >

More specifically, as shown in FIG. 3, the phase noise of the PLC VCO is improved by about 20 to 32 dB when the noise filter L _filter is present, and the output odd harmonic frequency is sufficiently suppressed, whereby a waveform more like a sinusoidal wave .

In the VCO according to the present embodiment, the phase noise is improved by 5 to 16 dB and the oscillation frequency and the average power consumption do not greatly vary when the noise filter L _filter is present. However, in the conventional PLC VCO, the parasitic ) Due to the gate-source capacitance (C _gs ), the oscillation frequency changes by 900 MHz or more with the same power consumption.

In addition, increasing the supply voltage from 0.9V to 2V to achieve the same average dc power dissipation for the PLC VCO far exceeds the 1V supply voltage allowed in 65nm CMOS processes.

Therefore, in order to realize a high-performance low-phase noise VCO from the above description, the SLC tank VCO is advantageous in terms of phase noise and supply voltage as compared with the conventional PLC tank VCO.

4, there is shown a resonator of the VCO shown in FIG. 2 including an equivalent parallel resistor for the inductor.

Here, in FIG. 4, the equivalent parallel resistances R1 and R2 for the inductor can be expressed by the following equations (3) and (4).

&Quot; (3) "

&Quot; (4) "

In Equations (3) and (4), Rs1 and Rs2 are series resistances of the inductors, respectively.

In FIG. 4, a parallel resonator is formed by C ₁ and 2L ₁ , wherein the inductor 2L ₁ is for dc biasing, which may be integrated on-chip or integrated into a chip inductor chip inductor).

In addition, the inductor L _filter filters out the second harmonic noise component to further reduce the phase noise.

Furthermore, a series resonator is formed by C ₂ , C _var, and 2L ₂ , and this series resonator also plays a role of determining the oscillation frequency of the VCO and performing the voltage amplification from the drain node to the gate.

In addition, except for the varactor capacitance, the voltage transfer function from the drain to the gate can be expressed by the following equation (5).

&Quot; (5) "

In Equation (5), R ₂ is the equivalent parallel resistance of the inductor L ₂ .

In addition, the voltage gain can be expressed by the following equation (6).

&Quot; (6) "

In general, since R _s2 >> ω ₀ ² L ₂ C _var , Equation (6) can be simplified as follows at the oscillation frequency.

&Quot; (7) "

5, FIG. 5 is a view showing impedances viewed from drain nodes A and B and gate nodes C and D. In FIG.

As shown in FIG. 5, the parallel resonator resonates near half of the series resonance frequency, and the series resistance increases as the value of L ₂ increases, whereby the voltage swing at the gate node and the phase noise reduction .

Referring to FIG. 6, FIG. 6 is a diagram illustrating a small signal equivalent half circuit model for a half circuit of a VCO according to an embodiment of the present invention shown in FIG. 2. Referring to FIG.

That is, the present inventors, from the oscillation start condition (startup condition) and were configured to an equivalent circuit model as shown in Figure 6 to derive the oscillation frequency, small-signal analysis (small-signal analysis), v between _i and v _o Is given by the following equations (8) and (9).

&Quot; (8) "

&Quot; (9) "

Here, in the above-mentioned expressions (8) and (9)

to be.

Since the voltage gain must be -1 in order for the VCO to oscillate, the above Equation (9) can be expressed as Equation (10) below.

&Quot; (10) "

Further, if the terms are appropriately summarized, the above-mentioned expression (10) can be expressed as a real part of the following expressions (11) and (12) as follows.

&Quot; (11) "

&Quot; (12) "

Further, the oscillation frequency can be derived from the above-mentioned equation (11) as shown in the following equation (13).

&Quot; (13) "

Further, the transconductance g _m required to maintain the oscillation is given by the following equation (14).

&Quot; (14) "

In general, differential VCOs are known to be most susceptible to insertion noise in zero crossing when all switching transistors are turned on. In a conventional differential VCO, the switching transistors are either directly or ac cross coupled ), So that the drain and gate voltages become equal in the zero crossing.

7 and 8, FIG. 7 is a diagram schematically showing the overall configuration of an ac cross-coupled differential VCO without a current source, and FIG. 8 is a schematic view showing the gate and drain node voltages And the drain current of the switching pair, respectively.

Here, in Fig. 8, Fig. 8A shows the gate and drain node voltages, and Fig. 8B shows the drain currents of the switching pair, respectively.

As shown in FIG. 8, when the signal swing increases, the switching transistor enters the triode region and the zero crossing point at the drain and gate nodes is aligned at a certain time in the oscillation period .

Also, in order to improve the phase noise performance of a VCO, various studies have been conducted. For example, in order to allow a switching transistor to operate in a saturation region for most of the oscillation period, a bias level shifting technique ) Has been developed (see Reference 7).

As another example, a method for shortening the time interval at the zero crossing point has been proposed (see Reference 4), more specifically, the series resonator is tuned to the second harmonic and the parallel resonator Tuned to the third harmonic so that the output waveform is made rectangular by the tank tuned to this harmonic so that the slope of the switching pair output voltage at the zero crossing point can be effectively maximized.

On the other hand, the VCO according to the present embodiment adopts a new technique for separating the zero crossing points of the drain and gate nodes so that the switching transistors can not be conducted simultaneously during one oscillation period.

Referring to FIG. 9, FIG. 9 illustrates voltage waveforms at drain and gate nodes of a VCO according to an exemplary embodiment of the present invention. Referring to FIG.

As shown in FIG. 9, when the gate voltage is the same, one of the drain voltages is high (low) and the other is low (high). By the second harmonic filtering inductor L _filter shown in FIG. 2, And a zero crossing point of the gate node, and also the gate voltage swing increases.

10, the drain-source voltage and the drain current are simulated when the second harmonic filtering inductor L _filter is present and when the second harmonic filtering inductor L _filter is not present.

Here, in Fig. 10, Fig. 10A shows a drain current waveform and Fig. 10B shows a drain-source voltage waveform, respectively.

10A, the drain-source voltage in the absence of the inductor L _filter stays in the saturation region (i.e., does not reach the 0V level), and if the inductor L _filter is present, the waveform is a rectangle .

In addition, each of the differential drain and gate voltages can be approximated as shown in the following equations (15) and (16).

&Quot; (15) "

&Quot; (16) "

From Equation (16), it can be seen that a very large output swing is obtained at the gate node.

Therefore, it can be seen from the above that the VCO according to the present invention can significantly improve the phase noise performance by increasing the output swing and preventing the switching transistor from entering the triode region through the series resonator.

11, FIG. 11 is a graph showing simulation results of the phase noise performance of the VCO according to the embodiment of the present invention with and without the inductor L _filter , respectively.

That is, the present inventors simulated the phase noise performance of the VCO according to the present embodiment at 600 kHz, 800 kHz and 3 MHz offset with a tuning voltage, and the results are shown in Fig.

More specifically, as shown in FIG. 11, in the case of the second high-order filtering inductor L _filter , phase noise was improved by more than 7.5 dB at 600 kHz and 800 kHz offset and improved by more than 5 dB at 3 MHz offset.

Also, from the simulation results in the absence of the second high-order filtering inductor L _filter , it can be seen that the contribution of the flicker noise is the most conspicuous and the contribution of the other noise sources is somewhat less than the noise amount.

Next, the result of verifying the phase noise performance by applying the VCO according to the embodiment of the present invention to the design of the actual VCO as described above and simulating it will be described.

That is, in order to verify the phase noise performance of the VCO according to the embodiment of the present invention as described above, the VCO was designed using TSMC 1P9M 65 nm CMOS technology and its performance was verified through simulation.

Also, for better phase noise performance, an octagonal shape symmetric inductor was used to have a higher Q factor, wherein the above inductor was implemented with thick copper (thickness 3.4 μm).

In addition, since the on-chip inductor takes a lot of die size, a chip inductor is used for a printed circuit board (PBC) substrate and a parallel tuning inductor 2L ₁ and can be configured to have a larger Q factor (greater than or equal to 50) compared to the on-chip inductor.

Alternatively, it may be implemented using a bonding wire (rule of thumb 1 nH / mm), where even if the bonding wire inductor has a reliability problem, A change in the inductance value (difference of 50% or more) of the wire inductor and that the center tap point does not seriously affect the performance of the VCO according to this embodiment between 600 kHz and 3 MHz offset.

Moreover, the small inductance value of the second harmonic filtering inductor L _filter is much less than the use of a single-ended spiral inductor of the standard type provided in the design kit, Can be implemented as a zigzag type in order to reduce the size of the substrate.

In addition, the switching transistor is implemented as a PMOS FET having better noise characteristics than the NMOS, wherein the size of the PMOS transistor is 208 μm / 90 nm, and the capacitors C ₁ and C ₂ are implemented as metal-inductor-metal (MIM) capacitors.

In addition, the tuning range can be changed by MOS varactor capacitors having variable capacitances of 136 fF to 670 fF, and the device parameters are as shown in the table of Fig.

That is, referring to FIG. 12, FIG. 12 is a diagram showing an example of a circuit parameter configuration when the VCO according to the embodiment of the present invention is implemented through an actual circuit design.

Referring to FIG. 13, FIG. 13 is a table showing the phase noise of a VCO required in various GSM standards operating in the 900 MHz and 1800 MHz frequency bands.

As shown in Fig. 13, the GSM 900 normal BTS and the DCS 1800 normal BTS each require -147 dB / Hz and -138 dB / Hz, and this performance is considered to be the most difficult to satisfy with currently available CMO technology On the other hand, the phase noise requirement for the MS is relatively low compared to the BTS.

Referring to FIG. 14, FIG. 14 shows a simulation result of a phase noise of a normal BTS VCO according to the present invention having a varactor tuning voltage of 0 to 0.7V.

As shown in FIG. 14, in the case of the L _filter , close-in phase noise performance is improved by 10 dB or more up to 100 kHz offset, 7 dB improvement at 1 MHz offset and 4 dB improvement at 10 MHz offset.

Also, 27 mW is consumed from the 0.7 V supply voltage, and the normal BTS VCO according to the present invention achieves phase noise of -134.6 dBc / Hz, -137 dBc / Hz and 148.6 dBc / Hz at 600 kHz, 800 kHz and 1 MHz offset, respectively Able to know.

Next, referring to FIG. 15, FIG. 15 is a diagram showing a supply pushing characteristic for sweeping a supply voltage from 0.65 V to 0.75 V. FIG.

15, the oscillation frequency pushing is 33.2 MHz / V, and the phase noise is almost constant with respect to the change of the supply voltage.

In addition, the inventors have normalized the phase noise to 900 MHz and 1800 MHz to verify that the VCO according to the embodiment of the present invention satisfies the phase noise performance required by the GSM standard.

That is, referring to FIG. 16, FIG. 16 is a diagram illustrating phase noise performance normalized to 900 MHz and 1800 MHz for a VCO according to an embodiment of the present invention, respectively.

Here, in FIG. 16, FIG. 16A shows a case of 900 MHz, and FIG. 16B shows a case of 1800 MHz.

More specifically, as shown in FIG. 16, at a 3 MHz offset, the normalized phase noise of the VCO according to this embodiment is -161 dBc / Hz, the VCO according to the embodiment of the present invention has some margins It can be confirmed that the above-mentioned phase noise performance is satisfied.

17, FIG. 17 is a table summarizing the performance comparison between a VCO according to an embodiment of the present invention and an oscillator designed with a state-of-the-art technology for GSM application to be.

In addition, in Fig. 17, the FOM (forugre of merit) is defined as follows.

&Quot; (17) "

In this case, the one equation 17], L (△ f) is a frequency offset △ f phase noise in, P _dc dc power consumption is represented by the unit of mW, f ₀ is the oscillation frequency.

As described above, it can be seen that the VCO according to the present invention satisfies the GSM phase noise requirement and achieves the best FOM.

That is, according to the present invention, a new technique for designing an ultra low-phase noise LC VCO using CMOS technology is proposed. In the VCO according to the present invention, the elimination of the terminal current source, the application of the double tuning resonator and the filtering of the second harmonic noise The phase noise performance is remarkably improved.

More specifically, the switching transistor is suppressed to operate in the saturation region by the dual tuning resonator, and the series resonator also amplifies the voltage at the LC junction node by greatly increasing the output swing, and further, the second harmonic filtering inductor The drain-source voltage waveform of the switching pair becomes more rectangular.

In addition, the VCO according to the embodiment of the present invention is implemented using 65-nm CMOS technology for GSM application and operates at an oscillation frequency of 3.8 GHz to exhibit excellent phase noise performance, and at the same time, -206dBc / Hz, which can satisfy the most stringent phase noise requirements of the GSM standard.

Therefore, an ultra-low noise CMOS voltage controlled oscillator for mobile communication according to the present invention can be implemented as described above.

In addition, according to the present invention, by implementing the ultra-low phase noise CMOS voltage controlled oscillator for mobile communication according to the present invention as described above, according to the present invention, a method of removing the terminal current source, It is possible to solve the problem of the conventional VCO which has a disadvantage that the impedance is decreased and the phase noise performance is deteriorated and the harmonic tuning method requires a lot of inductors and consumes a large chip area, DCS 1800 BTS RX, and so on.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. It will be understood by those skilled in the art that various changes, modifications, combinations, and substitutions may be made without departing from the scope of the present invention as set forth in the following claims. I will.

Claims (6)

Phase noise performance of the GSM standard, including the GSM 900 and DCS 1800 BTS receiver (base-station receiver), while improving phase noise performance compared to conventional voltage-controlled oscillators (VCOs) An ultra-low phase noise CMOS voltage controlled oscillator for application to mobile communication comprising:
A first LC unit including a pair of first capacitors (C ₁₁ , C ₁₂ ) and a first inductor (L ₁ );
A second inductor L ₂ and a pair of variable capacitors C _var1 and C _var2 which are connected in parallel to the first LC unit, each of the first and second capacitors C ₂₁ and C ₂₂ , 2 LC portion;
A transistor portion including a pair of transistors M _p1 and M _p2 and connected in series with the second LC portion; And
And a filtering unit including a noise filtering inductor (L _filter ) and connected in series to the transistor unit,
The second LC unit includes:
The second inductor L ₂ is connected in series between the pair of second capacitors C ₂₁ and C ₂₂ ,
The pair of variable capacitors C _var1 and C _var2 are connected in series and the other ends of the variable capacitors C _var1 and C _var2 are connected in parallel at both ends of the second inductor L ₂ ,
The drain voltages V _{d +} and V _d- are respectively output to the other ends of the pair of second capacitors C ₂₁ and C ₂₂ connected in series,
A bias power supply (Vbias) is applied to the second inductor (L ₂ )
And a tuning power supply (V _tune ) is applied between the pair of variable capacitors (C _var1 , C _var2 ) connected in series.
The method according to claim 1,
The first LC unit includes:
The pair of first capacitors C ₁₁ and C ₁₂ are connected in series with each other,
And the first inductor (L ₁ ) and the first capacitor (C ₁₁ , C ₁₂ ) connected in series are connected in parallel. The ultra low phase noise CMOS voltage controlled oscillator .
delete The method according to claim 1,
The transistor unit includes:
(M _p1 , M _p2 ) is connected to a node connected to the drain voltage (V _{d +} , V _d- ) at the other end of the pair of second capacitors (C ₂₁ , C ₂₂ ) Drain terminals are respectively connected,
A gate terminal of the pair of transistors M _p1 and M _p2 is cross-coupled to a node where the pair of variable capacitors C _var1 and C _var2 and the second inductor L ₂ are connected in parallel,
The source terminals of the pair of transistors M _p1 and M _p2 are connected in series with each other,
And the gate voltages V _g- and V _{g +} are output to the gate terminals of the pair of transistors M _p1 and M _p2 , respectively.
The method according to claim 1,
Wherein the filtering unit comprises:
The noise filtering inductor (L _filter ) is connected between the source terminals of the pair of transistors (M _p1 , M _p2 )
And the supply voltage (V _DD ) is applied to the other end of the noise filtering inductor (L _filter ).
The method according to claim 1,
Wherein the voltage-
By removing the main noise source current from the conventional VCO and forming a series resonant LC resonator in the second LC section, a pair of transistors of the transistor section are arranged at a zero crossing point The output voltage swing is amplified while the conduction and the entrance into the triode region are prevented,
And to reduce phase noise by filtering out a second harmonic noise component of an oscillation frequency by the noise filtering inductor of the filtering unit. Ultra Low Phase Noise CMOS Voltage Controlled Oscillator for Communication Applications.

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