CN105679261B - Shifting deposit unit, the shift register and array substrate for including it - Google Patents
Shifting deposit unit, the shift register and array substrate for including it Download PDFInfo
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- CN105679261B CN105679261B CN201511000235.1A CN201511000235A CN105679261B CN 105679261 B CN105679261 B CN 105679261B CN 201511000235 A CN201511000235 A CN 201511000235A CN 105679261 B CN105679261 B CN 105679261B
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- capacitor
- conductor layer
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- bus
- deposit unit
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
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- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
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- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
This application discloses a kind of shifting deposit unit, include its shift register and array substrate.One embodiment of the shifting deposit unit includes the first capacitor parallel with one another, the second capacitor, third capacitor, the electric signal that the first capacitor, the second capacitor and third capacitor provide for the first bus of reception；Wherein, the first capacitor includes being formed in the first pole plate of the first conductor layer and is formed in the second pole plate of the second conductor layer, and the second capacitor includes being formed in the third pole plate of third conductor layer and is formed in the quadripolar plate of the 4th conductor layer；Third capacitor is made of the second pole plate and third pole plate；First bus is formed in the second conductor layer or third conductor layer.According to the scheme of the application, the cabling area needed for shifting deposit unit can be reduced, conducive to the realization of the narrow frame of display panel.
Description
Technical field
The disclosure relates generally to display technology more particularly to shifting deposit unit, includes its shift register and array
Substrate.
Background technology
In existing liquid crystal display panel, usually scanning signal is realized by cascade multiple shifting deposit units
Displacement, so as to drive each pixel column in pel array.
One or more capacity cells are generally comprised in the circuit of shifting deposit unit, to receive the telecommunications of bus output
Number.In addition, shifting deposit unit further includes multiple thin film transistor (TFT)s, to be used for based on the generation of the electric signal of each bus received
Drive the scanning signal of each pixel column in pel array.
As shown in Figure 1, for bus 110, capacity cell 120 and thin film transistor (TFT) in a kind of existing shifting deposit unit
130 relative position relation schematic diagram.In Fig. 1, bus 110 is formed in grid layer, and two pole plates 121 of capacity cell 120
Grid layer and source-drain electrode layer are respectively formed in 122.Since grid layer and source-drain electrode layer are made of lighttight metal,
So that UV (Ultra Violet, ultraviolet) light can not penetrate grid layer and source-drain electrode layer is irradiated on sealing frame, and then cause
The non-display area sealing frame curing of display panel where shifting deposit unit is bad.In addition, shift LD as shown in Figure 1
In unit, the area that capacity cell 120 occupies is larger, is unfavorable for the narrow frame of liquid crystal display panel.
In order to improve the transmitance of shifting deposit unit shown in FIG. 1, the prior art additionally provides a kind of as shown in Figure 2
Shifting deposit unit.In Fig. 2, two pole plates 221 and 222 of capacity cell 220 are respectively formed in two transparent conductor layers.So
And although two pole plates 221 and 222 of capacity cell are formed in transparent conductor layer can partially promote transmitance,
Since transparent conductor layer is relatively low to the transmitance of UV light, it still can not solve the problems, such as that the curing of sealing frame is bad.
It is asked in order to which the curing of non-display area sealing frame is undesirable caused by improving Fig. 1, shifting deposit unit shown in Fig. 2
Topic, the prior art further provide a kind of shifting deposit unit as shown in Figure 3.With shifting deposit unit phase shown in FIG. 1
Than two pole plates 321 and 322 of the capacitance in the shifting deposit unit of Fig. 3 are designed using hollow out, so as to improve UV light
Transmitance.However, in Fig. 3, due to the presence of void region 323 on the pole plate of capacitance so that providing same capacitance capacity
Under the premise of, the cabling area of bigger is needed, is unfavorable for the narrow frame of liquid crystal display panel.
Invention content
In view of drawbacks described above of the prior art or deficiency, are intended to provide a kind of shifting deposit unit, the displacement for including it
Register and array substrate, to solve at least part technical problem described in background technology.
In a first aspect, the embodiment of the present application provides a kind of shifting deposit unit, including the first capacitor parallel with one another,
Second capacitor, third capacitor, what the first capacitor, the second capacitor and third capacitor provided for receiving the first bus
Electric signal；Wherein, the first capacitor includes being formed in the first pole plate of the first conductor layer and is formed in the second of the second conductor layer
Pole plate, the second capacitor include being formed in the third pole plate of third conductor layer and are formed in the quadripolar plate of the 4th conductor layer；The
Three capacitors are made of the second pole plate and third pole plate；First bus is formed in the second conductor layer or third conductor layer.
Second aspect, the embodiment of the present application additionally provide a kind of shift register, including cascade 0th grade~N-1 grades
N number of shifting deposit unit as described above.
The third aspect, the embodiment of the present application additionally provides a kind of array substrate, including viewing area and non-display area；Wherein,
Non-display area includes shift register as described above.
Scheme provided by the embodiments of the present application passes through the upper and lower layer in the routing layer where the bus with capacitance connection
Multiple shunt capacitances folded with total wire clamp are formed, so as to reduce the cabling area needed for shifting deposit unit, conducive to display panel
Narrow frame.Further, since the cabling area needed for the shifting deposit unit of the application is smaller so that is irradiated to shift LD
The UV light of the non-display area of display panel where unit increased, and then improve the non-of existing liquid crystal display panel
The problem of sealing frame curing of display area is bad.
Description of the drawings
By reading the detailed description made to non-limiting example made with reference to the following drawings, the application's is other
Feature, objects and advantages will become more apparent upon：
Fig. 1 is shown in a kind of shifting deposit unit in the prior art between bus, capacity cell and thin film transistor (TFT)
Relative position relation；
Fig. 2 shows in another shifting deposit unit in the prior art between bus, capacity cell and thin film transistor (TFT)
Relative position relation；
Fig. 3 is shown in another shifting deposit unit in the prior art between bus, capacity cell and thin film transistor (TFT)
Relative position relation；
Fig. 4 A show the capacitance being connect in the shifting deposit unit of the application one embodiment with bus and are attached thereto
Bus between relative position relation schematic diagram；
Fig. 4 B are the sectional view along broken line A-B-C-D of Fig. 4 A；
Fig. 5 A show the capacitance being connect in the shifting deposit unit of another embodiment of the application with bus and connect therewith
Relative position relation schematic diagram between the bus connect；
Fig. 5 B are the sectional view along broken line A-B-C of Fig. 5 A；
Fig. 6 shows the capacitance being connect in the shifting deposit unit of the application further embodiment with bus and is attached thereto
Bus between relative position relation schematic diagram；
Fig. 7 shows the capacitance being connect in the shifting deposit unit of another embodiment of the application with bus and is attached thereto
Bus between relative position relation schematic diagram；
Fig. 8 shows the capacitance being connect in the shifting deposit unit of the application a still further embodiment with bus and is attached thereto
Bus between relative position relation schematic diagram；
Fig. 9 shows the schematic circuit of the shifting deposit unit of each embodiment of the application；
Figure 10 shows the schematic diagram of the shift register of the application；
Figure 11 shows the schematic diagram of the array substrate of the application.
Specific embodiment
The application is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining related invention rather than the restriction to the invention.It also should be noted that in order to
Convenient for description, illustrated only in attached drawing with inventing relevant part.
It should be noted that in the absence of conflict, the feature in embodiment and embodiment in the application can phase
Mutually combination.The application is described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
Referring to the capacitance shown in Fig. 4 A, being connect in the shifting deposit unit for being the application one embodiment with bus and therewith
Relative position relation schematic diagram between the bus of connection, Fig. 4 B show the sectional view along the broken line A-B-C-D in Fig. 4 A.
In the present embodiment, shifting deposit unit includes the first capacitor parallel with one another, the second capacitor, third capacitance
Device.The electric signal that first capacitor, the second capacitor and third capacitor provide for the first bus of reception.
Wherein, the first capacitor includes the first pole plate 410 for being formed in the first conductor layer and is formed in the second conductor layer
Second pole plate 420.
Second capacitor includes being formed in the third pole plate 430 of third conductor layer and is formed in the quadrupole of the 4th conductor layer
Plate 440.
Third capacitor is made of the second pole plate 420 and third pole plate 430.First bus can be formed in the second conductor layer or
Third conductor layer.
As can be seen that the first conductor layer 410, the second conductor layer 420,430 and the 4th conductor of third conductor layer from Fig. 4 B
Layer 440 is stacked on top of each other and parallel to each other.It can include insulating layer (such as silicon nitride) between adjacent conductor layer, to avoid adjacent
Short circuit between conductor layer.The first pole plate 410 and the second pole plate 420 for forming the first capacitance are adjacent, form the of the second capacitance
Tri-electrode 430 and quadripolar plate 440 are adjacent, and formed third capacitance the second pole plate 420 and third pole plate 430 it is also adjacent.
So, in the relatively small routing region between such as Fig. 4 B midpoints A and point D, three are formd mutually
First capacitor, the second capacitor and third capacitor in parallel, folder is folded, it is in parallel after capacitance be the first capacitor, the
The summation of two capacitors and third condenser capacity.
Further, since the first bus can be formed in the second conductor layer 420 or third conductor layer 430 so that the first bus
Upper and lower both sides can be formed and press from both sides folded capacitance therewith so that the shifting deposit unit of the present embodiment can not increase film
Under the premise of layer number, the larger capacitance capacity in smaller routing region is realized.
Compared with the shifting deposit unit unit of the prior art as shown in FIG. 1 to 3, the shift LD list of the present embodiment
Member can realize that the capacitor being connect with the first bus does not need to occupy beside the first bus on the basis of capacitance is ensured
The technique effect of additional cabling area, so that the routing region needed for shifting deposit unit reduces, conducive to display panel
Narrow frame.Further, since the cabling area needed for the shifting deposit unit of the present embodiment is smaller so that is irradiated to shift LD
The UV light of the non-display area of display panel where unit increased, and then improve the non-of existing liquid crystal display panel
The problem of sealing frame curing of display area is bad.
It should be noted that in the description of the present application attached drawing, identical the fill style represent identical film layer (for example,
First conductor layer, the second conductor layer, third conductor layer or the 4th conductor layer).
In addition, one skilled in the art may determine that the shifting deposit unit of the application is in addition to including tying as described above
Except structure, structure well known to others can also be included, for example, being formed in below each film layer to provide the glass of bearing to each film layer
Glass substrate 450.In order not to obscure the application core content, will not be described in great detail in the technical solution of the application with prior art phase
Same part.
In some optional realization methods, the first pole plate 410 can be by being formed in the first conductor with third pole plate 430
The first via 460 between layer and third conductor layer is electrically connected.Similarly, the second pole plate 420 can pass through with quadripolar plate 440
The second via 470 being formed between the second conductor layer and the 4th conductor layer is electrically connected.
By the via being formed between two different conductor layers, electronics can be caused to be moved between two conductor layers,
So that two conductor layers have equal current potential.
Referring to shown in Fig. 5 A, the capacitance that is connect in the shifting deposit unit for another embodiment of the application with bus and with
Connection bus between relative position relation schematic diagram.Fig. 5 B are the sectional view along the broken line A-B-C in Fig. 5 A.
Identical with the embodiment shown in Fig. 4 A and Fig. 4 B, the shifting deposit unit of the present embodiment equally includes parallel with one another
The first capacitor, the second capacitor, third capacitor.First capacitor, the second capacitor and third capacitor are used to receive
The electric signal that first bus provides.Wherein, the first capacitor includes the first pole plate 510 for being formed in the first conductor layer and is formed in
Second pole plate 520 of the second conductor layer.Second capacitor includes being formed in the third pole plate 530 of third conductor layer and is formed in the
The quadripolar plate 540 of four conductor layers.Third capacitor is made of the second pole plate 520 and third pole plate 530.
Unlike the embodiment shown in Fig. 4 A and Fig. 4 B, the first bus 51 is further defined in the present embodiment and is formed
In third conductor layer, and at least part that third pole plate 530 is the first bus.First via 560 is formed in the first pole plate 510
Between the first bus 51.
Compared with the shifting deposit unit unit of the prior art as shown in FIG. 1 to 3, the shift LD list of the present embodiment
Member can realize that the capacitor being connect with the first bus does not need to occupy beside the first bus on the basis of capacitance is ensured
The technique effect of additional cabling area, so that the routing region needed for shifting deposit unit reduces, conducive to display panel
Narrow frame.Further, since the cabling area needed for the shifting deposit unit of the present embodiment is smaller so that is irradiated to shift LD
The UV light of the non-display area of display panel where unit increased, and then improve the non-of existing liquid crystal display panel
The problem of sealing frame curing of display area is bad.
In addition, by the way that the first via 560 is arranged between the first pole plate 510 and the first bus 51, third can be saved and led
On body layer, the cabling of the connection of the first via 560 is reached from the first bus 51, and then can further reduce cabling area.
It is shown in Figure 6, for the capacitance that is connect with bus in the shifting deposit unit of the application further embodiment and with
Connection bus between relative position relation schematic diagram.
Identical with the embodiment shown in Fig. 4 A and Fig. 4 B, the shifting deposit unit of the present embodiment equally includes parallel with one another
The first capacitor, the second capacitor, third capacitor.First capacitor, the second capacitor and third capacitor are used to receive
The electric signal that first bus provides.Wherein, the first capacitor includes the first pole plate 610 for being formed in the first conductor layer and is formed in
Second pole plate 620 of the second conductor layer.Second capacitor includes being formed in the third pole plate 630 of third conductor layer and is formed in the
The quadripolar plate 640 of four conductor layers.Third capacitor is made of the second pole plate 620 and third pole plate 630.
In addition, in the present embodiment, the first pole plate 610 again may be by being formed in the first conductor layer with third pole plate 630
The first via 660 between third conductor layer is electrically connected.Second pole plate 620 can also be by being formed in quadripolar plate 640
The second via 670 between second conductor layer and the 4th conductor layer is electrically connected.
Unlike the embodiment shown in Fig. 4 A and Fig. 4 B, the first bus 61 is further defined in the present embodiment and is formed
In third conductor layer.In addition, in the present embodiment, the second pole plate 620 is connected to the second via 670 by the first conducting wire 621, the
Quadripolar plate 640 is connected to the second via 670 by the second conducting wire 641.
Compared with the shifting deposit unit unit of the prior art as shown in FIG. 1 to 3, the shift LD list of the present embodiment
Member can realize that the capacitor being connect with the first bus does not need to occupy beside the first bus on the basis of capacitance is ensured
The technique effect of additional cabling area, so that the routing region needed for shifting deposit unit reduces, conducive to display panel
Narrow frame.Further, since the cabling area needed for the shifting deposit unit of the present embodiment is smaller so that is irradiated to shift LD
The UV light of the non-display area of display panel where unit increased, and then improve the non-of existing liquid crystal display panel
The problem of sealing frame curing of display area is bad.
In addition, when the shifting deposit unit of the present embodiment needs to be received simultaneously comprising more buses including the first bus 61
During 61~63 electric signal, can the second via 670 and the second pole plate 620 be connected, and pass through second and lead by the first conducting wire 621
Line 641 connects the second via 670 and quadripolar plate 640, so that receiving in parallel first of the first bus 61 electric signal
The position of capacitor, the second capacitor and third capacitor does not influence other buses (reference numeral 62 and reference numeral in such as Fig. 6
Bus shown in 63) cabling.
It is shown in Figure 7, for the capacitance that is connect in the shifting deposit unit of the application another embodiment with bus and with
Connection bus between relative position relation schematic diagram.
Identical with the embodiment shown in Fig. 4 A and Fig. 4 B, the shifting deposit unit of the present embodiment equally includes parallel with one another
The first capacitor, the second capacitor, third capacitor.First capacitor, the second capacitor and third capacitor are used to receive
The electric signal that first bus provides.Wherein, the first capacitor includes the first pole plate 710 for being formed in the first conductor layer and is formed in
Second pole plate 720 of the second conductor layer.Second capacitor includes being formed in the third pole plate 730 of third conductor layer and is formed in the
The quadripolar plate 740 of four conductor layers.Third capacitor is made of the second pole plate 720 and third pole plate 730.
In addition, in the present embodiment, the first pole plate 710 again may be by being formed in the first conductor layer with third pole plate 730
The first via 760 between third conductor layer is electrically connected.Second pole plate 720 can also be by being formed in quadripolar plate 740
The second via 770 between second conductor layer and the 4th conductor layer is electrically connected.
Unlike the embodiment shown in Fig. 4 A and Fig. 4 B, the first bus 71 is further defined in the present embodiment and is formed
In the second conductor layer.And second pole plate 720 be the first bus 71 at least part.Second via 770 is formed in the first bus
Between 71 and quadripolar plate.
The shift LD list of the present embodiment compared with the shifting deposit unit unit of the prior art as shown in FIG. 1 to 3
Member can realize that the capacitor being connect with the first bus does not need to occupy beside the first bus on the basis of capacitance is ensured
The technique effect of additional cabling area, so that the routing region needed for shifting deposit unit reduces, conducive to display panel
Narrow frame.Further, since the cabling area needed for the shifting deposit unit of the present embodiment is smaller so that is irradiated to shift LD
The UV light of the non-display area of display panel where unit increased, and then improve the non-of existing liquid crystal display panel
The problem of sealing frame curing of display area is bad.
In addition, by the way that the second via 770 is arranged between the second pole plate 720 and the first bus 71, second can be saved and led
On body layer, the cabling of the connection of the second via 770 is reached from the first bus 71, and then can further reduce cabling area.
It is shown in Figure 8, for the capacitance that is connect with bus in the shifting deposit unit of the application a still further embodiment and with
Connection bus between relative position relation schematic diagram.
Identical with embodiment shown in Fig. 7, in the present embodiment, the first bus 81 is similarly formed in the second conductor layer, and
Two vias 870 are similarly formed between the first bus 81 and quadripolar plate 840.
The difference lies in the present embodiment, the first pole plate 810 passes through privates 811 with embodiment shown in Fig. 7
The first via 860 is connected to, third pole plate 830 is connected to the first via 860 by privates 831.
Compared with the shifting deposit unit unit of the prior art as shown in FIG. 1 to 3, the displacement of each embodiment of the application
Deposit unit can realize that the capacitor being connect with the first bus does not need to occupy the first bus on the basis of capacitance is ensured
The technique effect of the additional cabling area on side, so that the routing region needed for shifting deposit unit reduces, conducive to display
The narrow frame of panel.Further, since the cabling area needed for the shifting deposit unit of the present embodiment is smaller so that is irradiated to shifting
The UV light of the non-display area of display panel where the deposit unit of position increased, and then improve existing LCD display
The problem of sealing frame curing of the non-display area of plate is bad.
In addition, when the shifting deposit unit of the present embodiment needs to be received simultaneously comprising more buses including the first bus 81
During 81~83 electric signal, can the first via 860 and the first pole plate 810 be connected, and pass through the 4th by privates 811
Line 831 connects the first via 860 and third pole plate 830, so that receiving in parallel first of the first bus 81 electric signal
The position of capacitor, the second capacitor and third capacitor does not influence other buses (reference numeral 82 and reference numeral in such as Fig. 8
Bus shown in 83) cabling.
In application scenes, the first bus in the shifting deposit unit of the application can be used for the first capacitor,
Second capacitor and third capacitor provide clock signal.
It is shown in Figure 9, it is the schematic circuit of the shifting deposit unit of each embodiment of the application.
In Fig. 9, buses of the CKB to provide clock signal to shifting deposit unit, C1 is used to receive the clock letter of CKB inputs
Number.Between CKB and C1 in Fig. 9 can apply each embodiment of the application as described above shifting deposit unit in the first bus and
Cabling mode between first capacitor, the second capacitor, third capacitor is electrically connected.In Fig. 9, it is clear that the electricity of C1
Appearance capacity is the first capacitor, the sum of capacitance of the second capacitor, third capacitor, and input clock signal CKB
Signal bus is the first bus in the shifting deposit unit of upper each embodiment of the application.
It should be noted that the circuit diagram in Fig. 9 is only illustrative, it is intended to illustrate the shifting described in each embodiment of the application
Cabling mode in the deposit unit of position between the first bus and the first capacitor, the second capacitor, third capacitor is in a certain tool
Application in body circuit.Those skilled in the art can disclosed in each embodiment of the application is obtained the first bus and the first capacitance
On the basis of cabling mode between device, the second capacitor, third capacitor, by this cabling mode be applied to arbitrary bus and
On the capacitance being connect with bus, to reach the technique effect for reducing cabling area.Therefore, no matter by disclosed in the present application first
Which physical circuit cabling mode between bus and the first capacitor, the second capacitor, third capacitor is applied among,
It is accordingly to be regarded as falling within the protection domain of the application.
It is shown in Figure 10, it is the schematic diagram of the shift register of the application.
Shift register shown in Fig. 10 includes cascade 0th grade~N-1 grades of N number of shift LD list as described above
First R0~RN-1。
It should be noted that although each shifting deposit unit R in Figure 100~RN-1Schematically show only one it is defeated
Go out signal OUT [0]~OUT [N-1], however in practical application scene, each shifting deposit unit can have that there are one export
Signal, it is possible to have the output signal more than one.In addition, shifting deposit units at different levels received bus signals IN,
CK1, XCK1, CK2 and XCK2 are also only illustrative.In practical applications, it can be moved according to specific application scenarios to design
The position particular circuit configurations of deposit unit and the type and quantity of the bus signals needed for it.
As shown in figure 11, the schematic diagram for one embodiment of the array substrate of the application.
The array substrate of the present embodiment includes viewing area and non-display area；Wherein, non-display area includes as described above move
Bit register.
In some optional realization methods, viewing area may include a plurality of gate line S1~Sn and with each gate line intersect to set
Data line D1~the Dn put.Gate line S1~Sn may be disposed at the first conductor layer；Data line D1~Dn is set to the second conductor layer.
In other words, in these optional realization methods, gate line S1~Sn can be with the shifting of each embodiment of the application
The first pole plate same layer setting of position deposit unit, data line D1~Dn can be with the shifting deposit unit of each embodiment of the application
Second pole plate same layer is set.First conductor layer and the second conductor layer for example can be metal layers.Same layer mentioned here is set
Using with along with processing step, to identical material carry out etching manufacturing process.
In some optional realization methods, viewing area can also include multiple touch control electrodes 11 and with touch control electrode 11
Correspond the touching signals line (not shown) of electrical connection.Touching signals line is used to transmit touch-control letter to touch control electrode 11
Number.Usually, in order to prevent pressure drop or load on touching signals line the problems such as caused touch-control it is bad, touching signals line
Metal material can be used, be made using individual one of technique, optionally, touching signals line is set to third conductor layer,
I.e. third conductor layer can be metal layer.
In other words, in these optional realization methods, touching signals line can be with the displacement of each embodiment of the application
The third pole plate same layer setting of deposit unit.
In some optional realization methods, the 4th conductor layer can be common electrode layer, and common electrode layer is in viewing area
It is divided into multiple block type electrodes insulated from each other, block type electrode is multiplexed with touch control electrode 11, and in the touch-control stage, block type electrode connects
Receive touch-control drive signal, at the same the signal after the capacitive coupling that the touch-control drive signal received and touch point are occurred as
Touch control detection signal realizes the detection to touch point；In the display stage, block type electrode receives common signal, and same array arrangement
Pixel electrode 12 formed voltage difference, to drive the rotation of liquid crystal, realize the display of image.In other words, such optional
In realization method, public electrode can be set with the quadripolar plate same layer of the shifting deposit unit of each embodiment of the application.4th
Conductor layer for example can be transparent conducting glass layer, such as tin indium oxide (ITO) glassy layer.
In other optional realization methods, pixel electrode 12 can be set to the 4th conductor layer.In other words, at this
In a little optional realization methods, pixel electrode 12 can be with the quadripolar plate same layer of the shifting deposit unit of each embodiment of the application
Setting.And in these optional realization methods, public electrode 11 can be set to other film layers.
The preferred embodiment and the explanation to institute's application technology principle that above description is only the application.People in the art
Member should be appreciated that invention scope involved in the application, however it is not limited to the technology that the specific combination of above-mentioned technical characteristic forms
Scheme, while should also cover in the case where not departing from the inventive concept, it is carried out by above-mentioned technical characteristic or its equivalent feature
The other technical solutions for arbitrarily combining and being formed.Such as features described above has similar work(with (but not limited to) disclosed herein
The technical solution that the technical characteristic of energy is replaced mutually and formed.
Claims (10)
1. a kind of shifting deposit unit, including the first capacitor parallel with one another, the second capacitor, third capacitor, described
The electric signal that one capacitor, the second capacitor and third capacitor provide for the first bus of reception；
Wherein,
First capacitor includes being formed in the first pole plate of the first conductor layer and is formed in the second pole plate of the second conductor layer,
Second capacitor includes being formed in the third pole plate of third conductor layer and is formed in the quadripolar plate of the 4th conductor layer；
The third capacitor is made of second pole plate and the third pole plate；
First pole plate and the third pole plate are by being formed between first conductor layer and the third conductor layer
First via is electrically connected；
Second pole plate and the quadripolar plate are by being formed between second conductor layer and the 4th conductor layer
Second via is electrically connected；
First bus is formed in the third conductor layer, and at least one that the third pole plate is first bus
Point, first via is formed between first pole plate and first bus；Alternatively, first bus is formed in institute
The second conductor layer is stated, and at least part that second pole plate is first bus, second via are formed in described
Between first bus and the quadripolar plate.
2. shifting deposit unit according to claim 1, wherein：
First bus is used to provide clock letter to first capacitor, second capacitor and the third capacitor
Number.
3. shifting deposit unit according to claim 1, wherein：
Second pole plate is connected to second via by the first conducting wire, and the quadripolar plate is connected to by the second conducting wire
Second via.
4. shifting deposit unit according to claim 1, wherein：
First pole plate is connected to first via by privates, and the third pole plate is connected to by privates
First via.
It is N number of as described in claim 1-4 any one including cascade 0th grade~N-1 grades 5. a kind of shift register
Shifting deposit unit.
6. a kind of array substrate, including viewing area and non-display area；
Wherein, the non-display area includes shift register as claimed in claim 5.
7. array substrate according to claim 6, wherein：
The viewing area includes a plurality of gate line and the data line arranged in a crossed manner with each gate line；
The gate line is set to first conductor layer；
The data line is set to second conductor layer.
8. array substrate according to claim 7, wherein：
The viewing area includes multiple touch control electrodes and the touching signals line being electrically connected with touch control electrode one-to-one correspondence, institute
Touching signals line is stated for transmitting touching signals to the touch control electrode, the touching signals line is set to the third conductor
Layer.
9. array substrate according to claim 8, wherein：
4th conductor layer is common electrode layer, and the common electrode layer is divided into multiple insulated from each other in the viewing area
Block type electrode, the block type electrode is multiplexed with the touch control electrode.
10. according to the array substrate described in claim 6 to 9 any one, wherein：
The viewing area further includes multiple pixel electrodes of array arrangement；
The pixel electrode is set to the 4th conductor layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511000235.1A CN105679261B (en) | 2015-12-28 | 2015-12-28 | Shifting deposit unit, the shift register and array substrate for including it |
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| CN108962181A (en) * | 2018-09-21 | 2018-12-07 | 京东方科技集团股份有限公司 | Shift register, gate driving circuit and display device |
| CN110675832A (en) * | 2019-09-12 | 2020-01-10 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit layout |
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| JP5458351B2 (en) * | 2009-07-09 | 2014-04-02 | 医療環境テクノ株式会社 | Simple liquid spray device |
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| CN103941507A (en) * | 2014-04-02 | 2014-07-23 | 上海天马微电子有限公司 | Array substrate, display panel and display device |
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