CN105677053B - Independent keyboard operation identification and coding circuit - Google Patents
Independent keyboard operation identification and coding circuit Download PDFInfo
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- CN105677053B CN105677053B CN201610003686.9A CN201610003686A CN105677053B CN 105677053 B CN105677053 B CN 105677053B CN 201610003686 A CN201610003686 A CN 201610003686A CN 105677053 B CN105677053 B CN 105677053B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/02—Input arrangements using manually operated switches, e.g. using keyboards or dials
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M11/00—Coding in connection with keyboards or like devices, i.e. coding of the position of operated keys
- H03M11/20—Dynamic coding, i.e. by key scanning
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Abstract
A kind of independent keyboard operation identification and coding circuit, are made of independent keyboard, the first shift register, the second shift register, state Code memory, encoder.The circuit is via the control for meeting scanning impulse, shift pulse, latch pulse that specific time sequence requires, the positioning of state operation will be maintained to single key stroke, combination key operation, keyboard, the effective status code of same binary length and disarmed state code are converted into, output effective key number corresponding with each effective status code either exports invalid key number corresponding with all disarmed state codes after encoded device coding；Different single key stroke, combination key operation, keyboard maintain state operation to be only embodied in not being same as above for conditional code；Button operation function is either adjusted if necessary to increase and decrease button operation function, keyboard scanning circuit structure need not be changed, only need to encoder be changed according to the correspondence between the conditional code after increase and decrease and key number.The invention circuit does not have to write and operation program, reliable operation.
Description
Technical field
The present invention relates to a kind of scanning circuit of keyboard, especially a kind of independent keyboard operation identification and coding circuit.
Background technology
With the continuous development of embedded technology, current each electronic product is generally using microcontroller as control core
The heart, keyboard are widely used as main input equipment.
Current keyboard scan mainly controlled by microcontroller, it is necessary to by run the program in microcontroller come into
Row, runs into interference, program is caused to run fast, and scanning imaging system is by cisco unity malfunction.
A kind of patent of invention " fast scanning and positioning method of matrix keyboard " of Application No. CN201010153560.2 is adopted
Enter the Scan orientation process of keyboard with the mode that keyboard interrupt triggers, judged using the method that keyboard scan step is repeated several times
Whether button is effective, and the key assignments to being obtained carries out condition adjudgement；If multiple repairing weld state is identical, it is in and stablizes shape
State, key assignments are effective；If multiple repairing weld state is different, key assignments is invalid.Single key stroke or combination key operation need individually judgement, such as
It is single key stroke, then into singly-bound tupe；Key operation is combined in this way, then into Macintosh tupe.Described in the patent
Method solves since keyboard caused by the mechanical property of keyboard itself is shaken and causes the Problem-Errors such as wrong key, continuous touching,
And the support issue to Macintosh and repeat key.But the method single key stroke needs to handle respectively with combining key operation；
Not accounting for keyboard state maintains a period of time just to perform the keyboard operation function of effectively operating after；Increase and decrease button operation function
, it is necessary to change keyboard scan finder structure when either adjusting button operation function.
The content of the invention
In order to solve above-mentioned technical problem existing for existing keyboard scan localization method, the present invention provides a kind of stand alone types
Keyboard operation identification and coding circuit, which is characterized in that by independent keyboard, the first shift register, the second shift register,
State Code memory, encoder composition.
The independent keyboard operation identification and coding circuit are synchronized by scanning impulse, shift pulse and latch pulse
Control.
The independent keyboard shares N number of button, equipped with N bit keyboard status signal outputs；The N bit keyboards state letter
Number be level signal.
First shift register has the function of the input of N parallel-by-bits, the output of N parallel-by-bits and Serial output；Described second
Shift register has serial input, N parallel-by-bit output functions.
The N parallel-by-bit input terminals of first shift register are connected to N bit keyboard status signal outputs；Second displacement
The serial input terminal of register is connected to the serial output terminal of the first shift register；First shift register, the second displacement are posted
The shift pulse input terminal of storage is connected to shift pulse, and the presetting pulse input terminal of the first shift register is connected to scanning
Pulse.The presetting pulse of first shift register is used to carry out the N parallel-by-bits input data of the first shift register defeated
Enter to latch.
The state Code memory is 2 × N binary registers；N positions data input pin in state Code memory connects
The N parallel-by-bit output terminals of the first shift register are connected to, in addition N data input pins are connected to the N positions of the second shift register
Parallel output terminal；The reception pulse input end of the state Code memory is connected to latch pulse.
The encoder has 2 × N coding input ends, and the 2 × N coding input end is connected to state Code memory
2 × N data output ends.
The sequential of the scanning impulse, shift pulse and latch pulse meets claimed below：In one cycle, arteries and veins is scanned
Punching has 1 pulse, and shift pulse has N number of pulse, and latch pulse has 1 pulse；The scanning impulse, shift pulse and latch arteries and veins
Punching according to 1 scanning impulse, 1 latch pulse, N number of shift pulse order in cycles；The scanning impulse and latch arteries and veins
The cycle of punching is 20~100ms.
First shift register, the shift pulse edge of the second shift register are effective；The state Code memory
Reception porch it is effective.
The presetting pulse edge of first shift register effectively either level is effective；First shift register
Presetting pulse high level it is effective when, the scanning impulse be positive pulse；The low electricity of presetting pulse of first shift register
When flat effective, the scanning impulse is negative pulse.
The encoder is read-only memory.
2 × N positions data output end of the state Code memory exports the conditional code of 2 × N；The conditional code is by effective
Conditional code and disarmed state code composition；The key number of the encoder output is made of effective key number and invalid key number；It is described effective
Conditional code is generated by effective keyboard operation or state, and encoder corresponds to output when inputting each effective status code corresponding effective
Key number；The disarmed state code is generated by invalid keyboard operation or state, and encoder inputs all corresponding during all disarmed state codes
Export invalid key number.
The encoder has M key output terminals, and the selection of M values should meet 2MMore than or equal to effective key number and invalid key number
The sum of quantity.
The independent keyboard operation identification and coding circuit further include keyboard state change pulse generation unit, for sentencing
Whether the key number of disconnected independent keyboard output changes, and when the key number of independent keyboard output changes, exports keyboard
State change pulse.
The keyboard state change pulse generation unit is made of OR gate, M delay buffers and M XOR gate；M are prolonged
Slow buffer is used to carry out signal delay respectively to the M positions key number of independent keyboard output；The input of M XOR gate is respectively M
The input of position delay buffer, output signal；The output of M XOR gate is respectively connected to the input terminal of OR gate；The output of OR gate
End output keyboard state change pulse.
Meet one-to-one relationship between the N bit keyboards status signal and N number of button.
The N positions, 2 × N, M refer both to binary digit data.
The beneficial effects of the invention are as follows：The positioning of state operation will be maintained to single key stroke, combination key operation, keyboard, by
Scanning impulse, shift pulse, the latch pulse control for meeting specific time sequence requirement are converted into the conditional code of same binary length,
It is handled by the way of Unified coding, single key stroke, combination key operation, keyboard maintain state operation to be only embodied in conditional code
Be not same as above；Button operation function is either adjusted if necessary to increase and decrease button operation function, keyboard scan electricity need not be changed
Line structure need to only change encoder according to the correspondence between the conditional code after increase and decrease and key number, re-write read-only deposit
The storage content of reservoir.The invention circuit is not using microcontrollers such as microcontroller, ARM, without operation program, work
Reliably.
Description of the drawings
Fig. 1 is independent keyboard operation identification and coding circuit functional block diagram；
Fig. 2 is the independent keyboard circuit diagram of the embodiment of the present invention；
Fig. 3 is the Scan orientation circuit diagram of the embodiment of the present invention；
Fig. 4 is the first shift-register circuit figure of the embodiment of the present invention；
Fig. 5 is the pulse sequence figure of the embodiment of the present invention；
Fig. 6 is the impulse circuit schematic diagram of the embodiment of the present invention；
Fig. 7 is the circuit diagram of the keyboard state change pulse generation unit of the embodiment of the present invention；
Fig. 8 is the waveform correlation schematic diagram that the keyboard of the embodiment of the present invention effectively operates.
Specific embodiment
Below in conjunction with attached drawing, the invention will be further described.
Fig. 1 is independent keyboard operation identification and coding circuit functional block diagram, is posted by the displacement of independent keyboard 400, first
Storage 100, the second shift register 200, state Code memory 500, encoder 300 form.
Fig. 2 is the circuit diagram of the independent keyboard 400 of the embodiment of the present invention, shares 4 buttons, by button S1, button S2,
Button S3, button S4 and it is connected to the pull-up resistor R1 of power supply+VCC, pull-up resistor R2, pull-up resistor R3, pull-up resistor R4 groups
Into.4 output terminals of independent keyboard 400 correspond output key S1, button S2, button S3, the state of button S4 respectively
Signal I1, I2, I3, I4, during by key pressing, the status signal of corresponding output end is low level；It is corresponding to export when button is not pressed
The status signal at end is high level.
The first shift register 100, the second shift register 200, state Code memory 500, encoder 300 in Fig. 1
Scan orientation circuit is formed, embodiment circuit diagram is as shown in Figure 3.The status signal of embodiment independent keyboard circuit output has
4, therefore, the first shift register 100, the second shift register 200 are all 4 binary shift registers, wherein, first
Shift register 100 has the function of input, parallel output and Serial output parallel, and the second shift register 200 has serial defeated
Enter, parallel output function；4 parallel input terminal L0~L3 of the first shift register 100 are sequentially connected to I1, I2, I3, I4,
The serial input terminal D2 of second shift register 200 is connected to the serial output terminal Q13 of the first shift register 100.First moves
Bit register 100, shift pulse input terminal CLK1, CLK2 of the second shift register 200 are connected to shift pulse CP2, the
The presetting pulse input terminal CLK0 of one shift register 100 is connected to scanning impulse CP1.
Requirement 8 bit binary datas of deposit of state Code memory 500,4 companies in 8 data input pin D57~D50
Be connected to parallel output terminal Q13~Q10 of the first shift register 100, in addition 4 be connected to the second shift register 200 and
Row output terminal Q23~Q20；In embodiment, D57~D54 is connected to Q23~Q20, and D53~D50 is connected to Q13~Q10.State
The reception pulse input end CLK5 of Code memory 500 is connected to latch pulse CP3.
8 input terminal A7~A0 of encoder 300 be connected to 8 data output end Q57 of state Code memory 500~
Q50.Encoder 300, which exports, is scanned through 4 definite binary system keys number of positioning.
In Fig. 3 embodiments, the second shift register 200 can select to be made of various medium-scale integration shift registers,
Or it is made of edge triggered flip flop；When forming the second shift register 200 by edge triggered flip flop, preferably touched by the D of edging trigger
Send out device composition.State Code memory 500 is made of edge triggered flip flop, is preferably made of the d type flip flop of edging trigger, for example, by
Double D trigger 74HC74,4D trigger 74HC175,8D trigger 74HC273 is formed.
Fig. 4 is the circuit diagram of the first shift register 100 of the embodiment of the present invention, by the low electricity of 4 set, reset functions
Flat effective 101~104,8 NAND gates 105~112 of d type flip flop form.In embodiment, the double D of the selection of d type flip flop 101~104
Trigger 74HC74, trigger pulse rising edge are effective.Scanning impulse CP1 controls d type flip flop by 8 NAND gates 105~112
101~104 set, reset function.By taking d type flip flop 101 as an example, scanning impulse CP1 be low level when, NAND gate 105, with it is non-
Door 106 exports high level, and the set of d type flip flop 101, reset function are invalid；When scanning impulse CP1 is high level and L0=0, with
The output of NOT gate 105 isThe output of NAND gate 106 is L0, i.e. the set function of d type flip flop 101 is invalid, reset function has
Effect, makes Q10=0；When scanning impulse CP1 is high level and L0=1, the output of NAND gate 105 isThe output of NAND gate 106
For L0, i.e. the set function of d type flip flop 101 is effective, reset function is invalid, makes Q10=1.The work of d type flip flop 102~104 is former
Reason is as d type flip flop 101, when scanning impulse CP1 is high level, Q10=L0, Q11=L1, Q12=L2, Q13=L3；When
Scanning impulse CP1 be low level when, due to trigger pulse input terminal CLK10, CLK11 of d type flip flop 101~104, CLK12,
CLK13 is connected to CP2, and therefore, in the rising edge of each shift pulse CP2, the first shift register 100 moves once position, i.e.,
Q13=Q12, Q12=Q11, Q11=Q10, Q10=0.
In Fig. 3 embodiments, encoder 300 is read-only memory.Address input end A7~A0 of read-only memory is coding
The input terminal of device 300, data output end D3~D0 of read-only memory are coding output terminal C3~C0 of encoder 300.
The operation principle of independent keyboard operation identification and coding circuit is as follows：
Scan orientation circuit scanning impulse CP1, shift pulse CP2, latch pulse CP3 control under work, it is relevant
Pulse sequence figure is as shown in Figure 5.
The sequential of CP1, CP2, CP3 meet claimed below in embodiment：In one cycle, CP1 has 1 pulse, and CP2 has
4 pulses, CP3 have 1 pulse；Each pulse according to 1 CP1 pulse, 1 CP3 pulse, 4 CP2 pulses order Zhou Erfu
Begin.
Meeting CP1, CP2, CP3 pulse of timing requirements can be generated by various pulsqe distributors, and Fig. 6 is implementation of the present invention
The impulse circuit schematic diagram of example, is made of oscillator 801, counter 802, pulsqe distributor 803.Clock pulse CP in Fig. 5
Generated by oscillator, CP send to counter 802 and is counted, counter 802 be 12 system Counters, 12 shapes of result P
State (numerical value) is followed successively by P0 → P11, as shown in Figure 5.Pulsqe distributor 803 in embodiment uses ROM memory to realize, herein
Referred to as pulse distribution ROM memory.The address input of pulse distribution ROM memory is connected to the counting output of counter 802, arteries and veins
3 data output ends of punching distribution ROM memory are exported respectively as CP1 pulses, CP2 pulses, CP3 pulses.Pulse distribution ROM is deposited
The write-in content of reservoir is shown in Table 1.
1 pulse distribution ROM memory tables of data of table
The output of ROM memory address in table 1, i.e. counter is at least 4 binary codes.Under normal circumstances, counter
If 802 using binary addition rule, corresponding 4 binary codes 0000~1011 of P0~P11 orders, i.e. ROM memory
Address range is 0000~1011, and the storage content of address 0000~1011 is the corresponding contents of P0~P11 in table 1.
Pulse distribution ROM memory needs 3 data outputs.If the address input of pulse distribution ROM memory has R,
When independent keyboard has the output of N bit keyboards status signal, the selection of R needs satisfaction 2RMore than or equal to 2 × (N+2).
Oscillator 801 is multivibrator.CP1 scanning impulses, the cycle of CP3 latch pulses are 20~100ms.CP1、
CP2, CP3 can also be operated the circuit or device offer outside identification and coding circuit by independent keyboard.
First shift register 100 is under the control of scanning impulse CP1, to the status signal of the output of independent keyboard 400
I1, I2, I3, I4 carry out data latch, and the output of the first shift register 100 at this time is known as now state key assignments；Second shift LD
Upper periodic scanning pulses CP1, via the control of 4 CP2 pulses, was latching to the first shift register by device 200 in a upper cycle
100 output is displaced to 200 output terminal of the second shift register, therefore, before the output of the second shift register 200 at this time is known as
State key assignments.
Existing state key assignments that latch pulse CP3 after scanning impulse CP1 exports the first shift register 100, second move
The preceding state key assignments that bit register 200 exports is latched in the output terminal of state Code memory 500, the output of state Code memory 500
State key assignments and existing state key assignments before being similarly.
First shift register 100, the equal edge of shift pulse of the second shift register 200 are effective, and therefore, CP2 can be with
It is positive pulse or negative pulse；The reception porch of state Code memory 500 is effective, and therefore, CP3 can be positive arteries and veins
Punching or negative pulse.When the presetting pulse of first shift register 100 is that edge is effective, scanning impulse CP1 can be just
Pulse or negative pulse.When the presetting pulse of first shift register 100 is that high level is effective, it is desirable that scanning impulse CP1
For positive pulse；When the presetting pulse of first shift register 100 is that low level is effective, it is desirable that scanning impulse CP1 is negative pulse；It is real
It applies in example, the presetting pulse of the first shift register 100 is effective for high level, so, scanning impulse CP1 uses positive pulse.
In embodiment, the 4 existing state key assignments and 4 preceding state key assignments of 500 data output end of state Code memory output are common
Form 8 conditional codes.8 conditional codes are used to identify the current state and mode of operation of independent keyboard.For example, this reality
It applies in example, the conditional code of no key pressing is 11111111；The conditional code of S1 key singly-bound pushes is 11111110；S1 key singly-bounds
The conditional code pressed and maintained is 11101110；The conditional code of S1 keys singly-bound release operation is 11101111；S2 key singly-bounds are pressed
The conditional code of operation is 11111101；The conditional code of S4 key singly-bound pushes is 11110111；The S1 of S2+S1 combination operations is pressed
Lower operation after expression first presses S2, presses the operation of S1, the conditional code of the operation is again in the state that S2 maintenances are pressed
11011100。
Encoder 300 is used to conditional code being converted to key number.In embodiment, equipped with 7 effective keyboard operations and state,
Including：
Operation 0：The singly-bound push of button S1, key number are 0000；
Operation 1：The singly-bound push of button S2, key number are 0001；
Operation 2：The singly-bound push of button S3, key number are 0010；
Operation 3：Button S3 singly-bounds press after maintenance state, key number be 0011；
Operation 4：After button S4 singly-bounds are pressed, then the combination key operation of S1 is pushed button, key number is 0100；
Operation 5：After button S4 singly-bounds are pressed, then the combination key operation of S2 is pushed button, key number is 0101；
Operation 6：The singly-bound release operation of button S1, key number is 0110.
The conditional code and key number obtained according to above-mentioned regulation is shown in coding schedule 2：
2 coding schedule of table
| Keyboard operation | Conditional code (address) | Key number (storage data) |
| S1 singly-bounds are pressed | 11111110 | 0000 |
| S2 singly-bounds are pressed | 11111101 | 0001 |
| S3 singly-bounds are pressed | 11111011 | 0010 |
| S3 singly-bounds press maintenance | 10111011 | 0011 |
| S4+S1 combination operations | 01110110 | 0100 |
| S4+S2 combination operations | 01110101 | 0101 |
| S1 singly-bounds discharge | 11101111 | 0110 |
| Other operations or state | ******** | 1111 |
Encoder 300 is combinational logic circuit, and the circuit of design meets the logical relation of table 2.
The encoder 300 of embodiment is preferably made of read-only memory.Selected read-only memory has 8 bit address, and totally 28A 4
Position binary storage cell.7 effective keyboard operations have 7 effective status codes, corresponding 7 effective keys number with state；It will
Address A7~A0 of the conditional code as read-only memory, in 7 corresponding storage units of effective status code, inciting somebody to action accordingly
Key number is as storage data write-in.7 effective keyboard operations are disarmed state code, i.e. table with the conditional code generated outside state
It is disarmed state code caused by other operations or state in 2；In other storage units, invalid key number, nothing are all write
Key number is imitated as a value outside 7 effective keys number, in embodiment, invalid key number is 1111.
Read-only memory always works at data output state.When there is read-only memory piece selected control system, data output to delay
When rushing control function, its piece selected control system, data output cushioning control should be made to be in effective status.
Key number in embodiment is 4 binary codes.The number of bits of key number can increase or subtract as needed
It is few, at this point, need to only select the read-only memory to match with this.If the number of bits of key number is M, the selection of M values should
Meet 2MMore than or equal to the sum of effective key number and quantity of invalid key number.When independent keyboard has the output of N bit keyboards status signal
When, read-only memory needs the input of 2 × N bit address, M-bit data output.
Button operation function is either adjusted if necessary to increase and decrease button operation function, only need to change table 2 as needed, it will
Amended content re-writes the storage content of read-only memory.
The edge of latch pulse CP3 at the time of state Code memory 500 is carried out data latch is known as state latch edge,
It is the rising edge of CP3 in embodiment.In embodiment, when independent keyboard S1 singly-bounds are pressed, encoder 300 is pressed in S1 singly-bounds
Under, after the latch of CP1, CP3 two-stage, since the state latch of CP3 along, until the state latch edge of next CP3, compile
Code output terminal C3~C0 run-out keies number 0000；When independent keyboard S2 singly-bounds are pressed, encoder 300 is pressed in S2 singly-bounds, warp
After crossing the latch of CP1, CP3 two-stage, since the state latch of CP3 along, until the state latch edge of next CP3, run-out key
Number 0001；After independent keyboard first presses S4, then S1 is pressed, encoder 300 combines key pressing in S1, by CP1, CP3 two
After grade latches, since the state latch of CP3 along, until the state latch edge of next CP3, run-out key number 0100；When only
After vertical keyboard first presses S4, then S2 is pressed, encoder 300 combines key pressing in S2, after the latch of CP1, CP3 two-stage, from
The state latch edge of CP3 starts, until the state latch edge of next CP3, run-out key number 0101；When independent keyboard S1 is mono-
When key discharges, encoder 300 is discharged in S1 singly-bounds, after the latch of CP1, CP3 two-stage, since the state latch of CP3 along, until
Until the state latch edge of next CP3, run-out key number 0110；It can therefore be seen that when what is identified is having for independent keyboard
When imitating button operation, the state latch edge of CP3 of the encoder 300 after effective button operation starts, until the shape of next CP3
Until state latches edge, output duration is effective key number of a CP3 periodic width.
In embodiment, when independent keyboard S3 singly-bounds are pressed, encoder 300 is pressed in S3 singly-bounds, by CP1, CP3 two
After grade latches, since the state latch of CP3 along, until the state latch edge of next CP3, run-out key number 0010；It is connecing
The state latch edge of the CP3 to get off starts, and terminates until S3 singly-bounds press maintenance state, the CP3 after the latch of CP1, CP3 two-stage
Until state latch edge, 300 run-out key number 0011 of encoder；It can therefore be seen that work as identification is the maintenance of independent keyboard
During state, encoder 300 exports the duration of effective key number and the duration of the maintenance state is adapted.
When outside the state of keyboard or operation is 7 effective keyboard operations described in table 2 and states, encoder
300 output invalid keys number 1111.Effective key number or output invalid key number are either exported, encoder 300 changes output content
At the time of for CP3 state latch edge；In embodiment, encoder 300 changes at the time of exporting content as the rising edge of CP3.
The cycle of CP3 is the scan period of independent keyboard.The keyboard scan cycle in more than 20ms, can effectively keep away
The influence of key point disk key jitter；The keyboard scan cycle in below 100ms, is unlikely to omit keyboard operation；Therefore, CP3
Cycle should be controlled in 20~100ms.
Fig. 7 is the circuit diagram of the keyboard state change pulse generation unit of the embodiment of the present invention.What it is when identification is stand alone type
During effective button operation of keyboard, the state latch edge of CP3 of the encoder 300 after effective button operation starts, until next
Until the state latch edge of a CP3, output duration is effective key number of a CP3 periodic width.Receive the stand alone type
The device of keyboard output is, it is necessary to which the output of moment inquiry independent keyboard, obtains key number.The period distances of inquiry are necessarily less than
The cycle of CP3.
Circuit shown in Fig. 7 is used to judge whether the key number of independent keyboard output changes, when independent keyboard exports
Key number when changing, keyboard state change pulse is exported, for the reception device of independent keyboard to be aided in receive stand alone type
The key number of keyboard output, for example, using keyboard state change pulse as the interrupt request singal of reception device.
Circuit shown in Fig. 7 by delay buffer 601, XOR gate 602, XOR gate 603, XOR gate 604, XOR gate 605 or
Door 606 forms.By only having 4 edge triggered flip flops of Trigger Function to form, 4 edge triggered flip flops touch delay buffer 601
The reception pulse input end that input terminal is delay buffer 601 is sent out, is connected to CP3；Delay buffer 601 is in the state of CP3
It latches along progress data latch.
Delay buffer 601 is used to carry out at delay 4 data C3~C0 of the coding output terminal of encoder 300 respectively
Reason.4 data input pin D63~D60 of delay buffer 601 are connected to coding output terminal C3~C0 of encoder 300, delay
The data that 4 data output end Q63~Q60 of buffer 601 are accordingly exported are C31~C01；C31~C01 is buffered by delay
After the first-level buffer of device 601, signal postpones a CP3 pulse period than C3~C0, and Fig. 8 show the key of the embodiment of the present invention
The waveform correlation schematic diagram that disk effectively operates.The T1 sections of CP3 pulses are located at, independent keyboard has once effectively operation, real
Applying effective operation of example includes：S1 singly-bounds are pressed, S2 singly-bounds are pressed, S3 singly-bounds are pressed, the S1 of S4+S1 combination operations is pressed, S4+
The S2 of S2 combination operations is pressed, the release of S1 singly-bounds.On the next state latch edge once effectively operated, i.e. CP3 pulses in Fig. 8
Rising edge after T1 sections, coding C3~C0 that encoder 300 exports change；In T2 sections, the output of encoder 300 one
Efficient coding C3~C0 of a CP3 pulse periods；In T3, T4 and section afterwards, coding C3~C0 that encoder 300 exports is another
Secondary change and enter maintenance state, which may be that such as S1 singly-bounds press maintenance state below, export invalid key
Number, it is also possible to S3 singly-bounds press maintenance state below, export effective key number, until effectively operation next time.
Coding C3~C0 that D6 pulses in Fig. 8 schematically illustrate the output of encoder 300 is in maintenance state, is not become
Change, still change, the D6 pulses are not present in actual circuit.As shown in figure 8, D6 pulses are low level, illustrate table
Show that coding C3~C0 that encoder 300 exports is in maintenance state, do not change；D6 pulses are high level, schematically illustrate volume
Code device 300 exports efficient coding C3~C0 of a cycle.What the Q6 in Fig. 8 reflected is the situation of change of C31~C01, it is clear that
Q6 postpones a CP3 pulse period than D6.Equally, the Q6 pulses are not present in actual circuit.
In Fig. 8, coding C3~C0 that encoder 300 exports is in maintenance state, does not change, still changes,
Really by 606 4 delay buffers 601, XOR gate 602, XOR gate 603, XOR gate 604, XOR gate 605, OR gate groups
Into logic circuit complete.1 corresponding, input point that 4 XOR gates encode in output terminal C3~C0 respectively with encoder 300
Not Wei 4 delay buffers 601 input, output signal.For example, two input signals of XOR gate 602 be respectively C0 and
C01, C01 postpone a CP3 pulse period than C0, and therefore, when C0 changes, XOR gate 602 exports 1 CP3 pulses week
The positive pulse of phase width；When C0 is a CP3 pulse period change width signal, XOR gate 602 exports 2 CP3 pulses weeks
The positive pulse of phase width.XOR gate 603, XOR gate 604, XOR gate 605 judge whether C1~C3 changes respectively, principle with
It is identical to judge whether C0 changes.XOR gate 602, XOR gate 603, XOR gate 604, the output terminal of XOR gate 605 connect respectively
The input terminal of OR gate 606 is connected to, whether OR gate 606 changes for comprehensive descision C0~C3, as long as C0~C3 changes,
OR gate 606 exports keyboard state change pulse F, which is positive pulse.
In embodiment, delay buffer 601 selects the 8D triggers 74HC273 of rising edge triggering.
Delay buffer 601 can also use other schemes, for example, using RC circuits, using 4 RC circuits respectively to C0
~C3 is postponed；If the time delay of RC circuits is less than a CP3 pulse period, encoder 300 exports a cycle
Efficient coding C3~C0 when, output efficient coding C3~C0 start and export efficient coding C3~C0 terminate all generation one
Keyboard state change pulse, the width of keyboard state change pulse are equal to RC circuit delay times；If during the delay of RC circuits
Between be more than or equal to a CP3 pulse period, then encoder 300 export a cycle efficient coding C3~C0 when, have in output
Effect coding C3~C0 generates a keyboard state change pulse when starting, which is more than or equal to 2 CP3 pulse periods.
It is required that the time delay of RC circuits is no more than 2 CP3 pulse periods, failed to report in order to avoid generating.
In the invention circuit, the positioning of state operation will be maintained to single key stroke, combination key operation, keyboard, by full
3 Pulse Width Controls of sufficient specific time sequence requirement are converted into the conditional code of same binary length, by the way of Unified coding into
Row processing, single key stroke, combination key operation, keyboard maintain state operation to be only embodied in not being same as above for conditional code；If necessary to increase
Subtract button operation function and either adjust button operation function, keyboard scanning circuit structure need not be changed, it only need to be according to increase and decrease
State code table afterwards updates encoder 300, the storage content for re-writing update read-only memory.The invention circuit
Not using microcontrollers such as microcontroller, ARM, without operation program, reliable operation.
Claims (10)
1. a kind of independent keyboard operation identification and coding circuit, which is characterized in that by independent keyboard, the first shift LD
Device, the second shift register, state Code memory, encoder composition；
The independent keyboard operation identification and coding circuit synchronize control by scanning impulse, shift pulse and latch pulse
System；
The independent keyboard shares N number of button, equipped with N bit keyboard status signal outputs；The N bit keyboards status signal is
Level signal；
First shift register has the function of the input of N parallel-by-bits, the output of N parallel-by-bits and Serial output；Second displacement
Register has serial input, N parallel-by-bit output functions；
The N parallel-by-bit input terminals of first shift register are connected to N bit keyboard status signal outputs；Second shift LD
The serial input terminal of device is connected to the serial output terminal of the first shift register；First shift register, the second shift register
Shift pulse input terminal be connected to shift pulse, the presetting pulse input terminal of the first shift register is connected to scanning arteries and veins
Punching；
The state Code memory is 2 × N binary registers；N positions data input pin in state Code memory is connected to
The N parallel-by-bit output terminals of first shift register, in addition N data input pins be connected to the N parallel-by-bits of the second shift register
Output terminal；The reception pulse input end of the state Code memory is connected to latch pulse；
The encoder has 2 × N coding input ends, and the 2 × N coding input end is connected to 2 × N of state Code memory
Position data output end；
The sequential of the scanning impulse, shift pulse and latch pulse meets claimed below：In one cycle, scanning impulse has
1 pulse, shift pulse have N number of pulse, and latch pulse has 1 pulse；The scanning impulse, shift pulse and latch pulse are pressed
According to 1 scanning impulse, 1 latch pulse, N number of shift pulse order in cycles.
2. independent keyboard operation identification according to claim 1 and coding circuit, it is characterised in that：The scanning impulse
Cycle with latch pulse is 20~100ms.
3. independent keyboard operation identification according to claim 1 and coding circuit, it is characterised in that：First displacement
Register, the shift pulse edge of the second shift register are effective；The reception porch of the state Code memory is effective；Institute
The presetting pulse edge for stating the first shift register is effective.
4. independent keyboard operation identification according to claim 1 and coding circuit, it is characterised in that：First displacement
Register, the shift pulse edge of the second shift register are effective；The reception porch of the state Code memory is effective；Institute
State the first shift register presetting pulse high level it is effective when, the scanning impulse be positive pulse；First shift LD
When the presetting pulse low level of device is effective, the scanning impulse is negative pulse.
5. independent keyboard operation identification according to claim 1 and coding circuit, it is characterised in that：The encoder is
Read-only memory.
6. independent keyboard operation identification according to claim 1 and coding circuit, it is characterised in that：The conditional code is posted
2 × N positions data output end of storage exports the conditional code of 2 × N；The conditional code is by effective status code and disarmed state code character
Into；The key number of the encoder output is made of effective key number and invalid key number；The effective status code is by effective keyboard operation
Or state generates, encoder corresponds to output corresponding effectively key number when inputting each effective status code；The disarmed state code
It is generated by invalid keyboard operation or state, encoder inputs all corresponding output invalid key number during all disarmed state codes.
7. independent keyboard operation identification according to claim 6 and coding circuit, it is characterised in that：The encoder has
M key output terminals, the selection of M values should meet 2MMore than or equal to the sum of effective key number and quantity of invalid key number.
8. independent keyboard operation identification according to claim 7 and coding circuit, it is characterised in that：Further include keyboard shape
Whether state change pulse generation unit, the key number for judging independent keyboard output change, when independent keyboard exports
Key number when changing, export keyboard state change pulse.
9. independent keyboard operation identification according to claim 8 and coding circuit, it is characterised in that：The keyboard state
Change pulse generation unit is made of OR gate, M delay buffers and M XOR gate；M delay buffers are used for stand alone type
The M positions key number of keyboard output carries out signal delay respectively；The input of M XOR gate is respectively inputting, being defeated for M delay buffers
Go out signal；The output of M XOR gate is respectively connected to the input terminal of OR gate；The output terminal output keyboard state variation arteries and veins of OR gate
Punching.
10. independent keyboard operation identification according to claim 1 and coding circuit, it is characterised in that：The N bit keyboards
Meet one-to-one relationship between status signal and N number of button.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610003686.9A CN105677053B (en) | 2016-01-05 | 2016-01-05 | Independent keyboard operation identification and coding circuit |
| CN201810346591.6A CN108388353B (en) | 2016-01-05 | 2016-01-05 | Independent keyboard operation identification and coding method |
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| CN201610003686.9A CN105677053B (en) | 2016-01-05 | 2016-01-05 | Independent keyboard operation identification and coding circuit |
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| CN110703352B (en) * | 2017-11-16 | 2021-05-25 | 湖南工业大学 | Automatic production line product counting signal generating circuit |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0188151A1 (en) * | 1984-12-20 | 1986-07-23 | Automobiles Peugeot | Keyboard device |
| CN101510127A (en) * | 2009-03-30 | 2009-08-19 | 北京中星微电子有限公司 | Method, apparatus and chip for implementing keyboard module composite key function |
| CN101840268A (en) * | 2010-04-23 | 2010-09-22 | 中国电子科技集团公司第五十四研究所 | Method for fast scanning and positioning of matrix keyboard |
| CN101943948A (en) * | 2009-07-07 | 2011-01-12 | 扬智科技股份有限公司 | Keyboard scanning device and keyboard scanning method |
| CN103226391A (en) * | 2013-05-22 | 2013-07-31 | 湖南工业大学 | Scan locating method for independent keyboard |
| CN103279197A (en) * | 2013-06-08 | 2013-09-04 | 湖南工业大学 | Keyboard scanning positioning method |
| CN103631244A (en) * | 2013-12-22 | 2014-03-12 | 贺义方 | Master and slave type keyboard controller based on MCU (microprogrammed control unit) and CPLD (complex programmable logic device) |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4291385A (en) * | 1973-12-17 | 1981-09-22 | Hewlett-Packard Company | Calculator having merged key codes |
| JPH0682314B2 (en) * | 1985-05-17 | 1994-10-19 | 富士通株式会社 | Keyboard simultaneous keystroke shift processing method |
| CN1159641C (en) * | 2001-07-11 | 2004-07-28 | 威盛电子股份有限公司 | Keyboard instruction fetch device for notebook computer |
| CN1192300C (en) * | 2002-11-20 | 2005-03-09 | 威盛电子股份有限公司 | Keyboard control circuit of universal serial bus interface |
| US20090128373A1 (en) * | 2007-11-15 | 2009-05-21 | Polycom, Inc. | Twin-contact keyboard arrangement |
-
2016
- 2016-01-05 CN CN201610003686.9A patent/CN105677053B/en active Active
- 2016-01-05 CN CN201810346591.6A patent/CN108388353B/en not_active Expired - Fee Related
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0188151A1 (en) * | 1984-12-20 | 1986-07-23 | Automobiles Peugeot | Keyboard device |
| CN101510127A (en) * | 2009-03-30 | 2009-08-19 | 北京中星微电子有限公司 | Method, apparatus and chip for implementing keyboard module composite key function |
| CN101943948A (en) * | 2009-07-07 | 2011-01-12 | 扬智科技股份有限公司 | Keyboard scanning device and keyboard scanning method |
| CN101840268A (en) * | 2010-04-23 | 2010-09-22 | 中国电子科技集团公司第五十四研究所 | Method for fast scanning and positioning of matrix keyboard |
| CN103226391A (en) * | 2013-05-22 | 2013-07-31 | 湖南工业大学 | Scan locating method for independent keyboard |
| CN103279197A (en) * | 2013-06-08 | 2013-09-04 | 湖南工业大学 | Keyboard scanning positioning method |
| CN103631244A (en) * | 2013-12-22 | 2014-03-12 | 贺义方 | Master and slave type keyboard controller based on MCU (microprogrammed control unit) and CPLD (complex programmable logic device) |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108388353B (en) | 2021-03-16 |
| CN108388353A (en) | 2018-08-10 |
| CN105677053A (en) | 2016-06-15 |
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