CN105632534A - Solid-state drive with mixed use of DRAM (Dynamic Random Access Memory) and MRAM (Magnetic Random Access Memory) - Google Patents
Solid-state drive with mixed use of DRAM (Dynamic Random Access Memory) and MRAM (Magnetic Random Access Memory) Download PDFInfo
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- CN105632534A CN105632534A CN201510131302.7A CN201510131302A CN105632534A CN 105632534 A CN105632534 A CN 105632534A CN 201510131302 A CN201510131302 A CN 201510131302A CN 105632534 A CN105632534 A CN 105632534A
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- G—PHYSICS
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- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
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Abstract
The invention provides a solid-state drive with mixed use of a DRAM (Dynamic Random Access Memory) and an MRAM (Magnetic Random Access Memory). The solid-state drive comprises a main control chip, a group of NAND chips used for storing data, and the DRAM, wherein the NAND chips and the DRAM are connected with the main control chip. The solid-state drive further comprises the MRAM, wherein the MRAM is connected with the main control chip and used for a write cache; and the DRAM is used for storing a logic address and physical address comparison table. According to the solid-state drive provided by the invention, the MRAM and the DRAM are subjected to mixed use; on one hand, the MRAM is used for the write cache and can persistently reserve data after power failure like a Flash, so that an expensive and large-volume power failure protection system is no longer used and the cost of the solid-state drive is reduced; and on the other hand, the logic-physical address comparison table with the highest memory consumption is stored in the DRAM with the relatively low cost, so that the cost of the solid-state drive is further reduced and the cost-benefit ratio of the solid-state drive is increased.
Description
Technical field
The present invention relates to solid state hard disc, particularly relate to a kind of solid state hard disc mixing and using DRAM and MRAM.
Background technology
Currently, the development of nand flash memory technology has promoted SSD industry. As it is shown in figure 1, use the technology such as HSSI High-Speed Serial Interface such as SATA, PICe between SSD and main frame. Internal by being used for storing one group of NAND chip of data, for supporting to calculate and data cached DDRDRAM (internal memory), and main control chip (SSDController) composition. Sometimes also need to circuit breaking protective system.
NAND is the storage device of a kind of monoblock read-write, the unit that minimum readable takes is page, minimum erasable unit is block, and a block is often made up of a lot of page, and after block erasing, the page of the inside can carry out independent write (program) operation. Write operation is very slow, more more slowly than reading, and it is more more slowly than write to wipe operation.
One problem of nand flash memory is that NAND has the limited life-span. The inside each page through certain number of times erasable after, will permanent failure can not be continuing with. The current trend of industry development is the capacity of NAND and packing density increases very fast, but to reduce the life-span for cost. Erasable number of times is reduced to about current 3000 time from initial 100,000 times.
Because the above characteristic of nand flash memory, it is complicated that the NAND within SSD manages comparison. In order to not make some that the block premature deterioration of write operation often occurs, it is necessary to carry out writing equilibrium treatment. Logical address and physical address that file system software identifies are different, it is necessary to a table is mapped the two. Owing to NAND erasing is too slow, not updating in original block district, but new content is write a Ge Xinkuai district during general amendment one content, it is invalid that Jiu Kuai district is labeled as, and waits the CPU free time to get off to wipe it again. So, the synopsis of logical address physical address is constantly dynamically to update. This table is proportional to the total capacity of SSD, exists in DDRDRAM, additionally also has corresponding labelling inside NAND. Along with the increasing sharply of SSD capacity on market, this telogenesis is the consumer that DRAM is maximum.
Owing to the read or write speed of NAND is more more slowly than DRAM, it is also possible to utilize a part of dram space to make the buffer memory (Cache) of reading and writing, improve the performance of whole SSD. But introducing is write buffer memory and is created new problem: once there is power-off, the content not yet writing NAND in DRAM cache can be lost, and causes the damage of the even whole file system of system loss data. So costliness, bulky circuit breaking protective system (being generally made up of battery or substantial amounts of capacitor) must be used simultaneously. And logical-physical address synopsis, after there is power-off, the data being available with in NAND re-construct, although time consuming.
From described above it can be seen that the design of SSD encounters awkward: writing buffer memory if do not used, the write performance of product is had a greatly reduced quality; If using and writing buffer memory, it is necessary to use costliness to account for again the power-off protection equipment of volume, cause cost effectiveness very poor simultaneously.
Therefore, those skilled in the art is devoted to develop the solid state hard disc that a kind of cost effectiveness is high, can either ensure write performance, can reduce again solid state hard disc cost.
Summary of the invention
Because the drawbacks described above of prior art, the technical problem to be solved is to provide a kind of solid state hard disc, can either ensure write performance, can reduce again solid state hard disc cost.
MRAM is a kind of new internal memory and memory technology, it is possible to quick random read-write as SRAM/DRAM, it is also possible to forever retain data as Flash flash memory after a loss of power.
If operating speed is fast and keeps the MRAM of content to replace DRAM after power-off, no doubt can ensure that write performance, but in following significant period of time, MRAM still can than DRAM expensive a lot, therefore use substantial amounts of MRAM can dramatically increase the cost of solid state hard disc equally.
The present invention is in solid state hard disc, and mixing uses MRAM and DRAM, can either ensure write performance, can reduce again solid state hard disc cost.
The present invention provides a kind of solid state hard disc, including main control chip, for storing one group of NAND chip and the DRAM of data, NAND chip, DRAM are connected with main control chip respectively, solid state hard disc also includes MRAM, MRAM is connected with main control chip, MRAM is used for writing buffer memory, and DRAM is used for preserving logical address and physical address synopsis.
Solid state hard disc provided by the invention, mixing uses MRAM and DRAM, is used for writing buffer memory by MRAM on the one hand, owing to MRAM can forever retain data after a loss of power as Flash flash memory, therefore not in use by expensive, bulky circuit breaking protective system, the cost of solid state hard disc is reduced; On the other hand the logical-physical address synopsis consuming internal memory maximum being saved in less costly DRAM, reduce further the cost of solid state hard disc, thus improve the cost effectiveness of solid state hard disc.
Further, MRAM is additionally operable to information crucial in storage file system, also is able to ensure the safety of file system when power is off, and information crucial in file system refers to the information such as partition table, root.
Further, DRAM is additionally operable to read buffer memory, improves the reading performance of solid state hard disc.
Further, MRAM uses DRAM interface, is connected with main control chip by DRAM interface.
Further, main control chip is operated by chip selection signal or different address choice MRAM and DRAM.
Further, MRAM and main control chip are integrated in a chip, due to MRAM unlike DRAM and Flash with standard CMOS semiconductor technique incompatible, MRAM can be integrated in a chip with logic circuit, thus can be integrated in a chip with main control chip, simplify the structure of solid state hard disc.
Compared with prior art, solid state hard disc provided by the invention has the advantages that
(1) mixing uses MRAM and DRAM, it is used for writing buffer memory by MRAM on the one hand, owing to MRAM can forever retain data after a loss of power as Flash flash memory, therefore not in use by expensive, bulky circuit breaking protective system, reduce the cost of solid state hard disc; On the other hand the logical-physical address synopsis consuming internal memory maximum being saved in less costly DRAM, reduce further the cost of solid state hard disc, thus improve the cost effectiveness of solid state hard disc;
(2) MRAM and main control chip are integrated in a chip, simplify the structure of solid state hard disc.
Below with reference to accompanying drawing, the technique effect of the design of the present invention, concrete structure and generation is described further, to be fully understood from the purpose of the present invention, feature and effect.
Accompanying drawing explanation
Fig. 1 is the structural representation of solid state hard disc in prior art;
Fig. 2 is the structural representation of the solid state hard disc of one embodiment of the present of invention;
Fig. 3 is the structural representation of the solid state hard disc of an alternative embodiment of the invention.
Detailed description of the invention
As shown in Figure 2, the solid state hard disc of one embodiment of the present of invention, including main control chip, for storing one group of NAND chip and the DRAM of data, NAND chip, DRAM are connected with main control chip respectively, solid state hard disc also includes MRAM, MRAM is connected with main control chip, and MRAM is used for writing buffer memory, and DRAM is used for preserving logical address and physical address synopsis.
MRAM arranges DRAM interface, is connected with main control chip by DRAM interface, and main control chip is operated by chip selection signal or different address choice MRAM and DRAM.
MRAM is additionally operable to information crucial in storage file system, also is able to ensure the safety of file system when power is off.
DRAM is additionally operable to read buffer memory, improves the reading performance of solid state hard disc. After solid state hard disc receives reading instruction, first the reading buffer memory in DRAM is found, then buffer memory of writing in a mram is found, and both of which can not find and then reads from NAND, then this page can be saved in reading buffer memory.
As shown in Figure 3, in the solid state hard disc of an alternative embodiment of the invention, MRAM and main control chip are integrated in a chip, due to MRAM unlike DRAM and Flash with standard CMOS semiconductor technique incompatible, MRAM can be integrated in a chip with logic circuit, thus can be integrated in a chip with main control chip, simplify the structure of solid state hard disc.
The preferred embodiment of the present invention described in detail above. Should be appreciated that those of ordinary skill in the art just can make many modifications and variations according to the design of the present invention without creative work. Therefore, all technical staff in the art, all should in the protection domain being defined in the patent claims under this invention's idea on the basis of existing technology by the available technical scheme of logical analysis, reasoning, or a limited experiment.
Claims (6)
1. a solid state hard disc, including main control chip, for storing one group of NAND chip and the DRAM of data, described NAND chip, described DRAM are connected with described main control chip respectively, it is characterized in that, described solid state hard disc also includes MRAM, described MRAM is connected with described main control chip, and described MRAM is used for writing buffer memory, and described DRAM is used for preserving logical address and physical address synopsis.
2. solid state hard disc as claimed in claim 1, it is characterised in that described MRAM is additionally operable to information crucial in storage file system.
3. solid state hard disc as claimed in claim 1, it is characterised in that described DRAM is additionally operable to read buffer memory.
4. solid state hard disc as claimed in claim 1, it is characterised in that described MRAM uses DRAM interface, is connected with described main control chip by DRAM interface.
5. solid state hard disc as claimed in claim 4, it is characterised in that described main control chip is operated by MRAM and described DRAM described in chip selection signal or different address choice.
6. solid state hard disc as claimed in claim 1, it is characterised in that described MRAM and described main control chip are integrated in a chip.
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Cited By (6)
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CN105630700A (en) * | 2015-04-29 | 2016-06-01 | 上海磁宇信息科技有限公司 | Storage system with second-level cache structure and reading/writing method |
CN107643987A (en) * | 2016-07-20 | 2018-01-30 | 衡宇科技股份有限公司 | Reduce the method and use its solid state hard disc that DRAM is used in solid state hard disc |
CN109284070A (en) * | 2018-08-24 | 2019-01-29 | 中电海康集团有限公司 | One kind being based on STT-MRAM solid-state memory power interruption recovering method |
CN110196782A (en) * | 2018-02-27 | 2019-09-03 | 上海磁宇信息科技有限公司 | A kind of storage device and the method for keeping data in the mram memory of storage device |
CN114442960A (en) * | 2022-01-27 | 2022-05-06 | 新拓尼克科技(成都)有限公司 | Solid-state storage scheme free of fear abnormal power failure and capable of prolonging service life |
CN117093159A (en) * | 2023-10-18 | 2023-11-21 | 同方威视科技江苏有限公司 | Method and apparatus for accelerating a storage device |
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US20110222339A1 (en) * | 2010-03-11 | 2011-09-15 | Sung-Hoon Kim | Nonvolatile memory device for reducing interference between word lines and operation method thereof |
CN103377152A (en) * | 2012-04-26 | 2013-10-30 | 深圳市朗科科技股份有限公司 | Write operation control method and write operation device for solid state disk |
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Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
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CN105630700A (en) * | 2015-04-29 | 2016-06-01 | 上海磁宇信息科技有限公司 | Storage system with second-level cache structure and reading/writing method |
CN105630700B (en) * | 2015-04-29 | 2019-03-19 | 上海磁宇信息科技有限公司 | A kind of storage system and reading/writing method with secondary cache structure |
CN107643987A (en) * | 2016-07-20 | 2018-01-30 | 衡宇科技股份有限公司 | Reduce the method and use its solid state hard disc that DRAM is used in solid state hard disc |
CN107643987B (en) * | 2016-07-20 | 2020-06-05 | 深圳衡宇芯片科技有限公司 | Method for reducing DRAM (dynamic random Access memory) usage in solid state disk and solid state disk using same |
CN110196782A (en) * | 2018-02-27 | 2019-09-03 | 上海磁宇信息科技有限公司 | A kind of storage device and the method for keeping data in the mram memory of storage device |
CN110196782B (en) * | 2018-02-27 | 2023-11-24 | 上海磁宇信息科技有限公司 | Memory device and method for maintaining data in MRAM (magnetic random Access memory) of memory device |
CN109284070A (en) * | 2018-08-24 | 2019-01-29 | 中电海康集团有限公司 | One kind being based on STT-MRAM solid-state memory power interruption recovering method |
CN109284070B (en) * | 2018-08-24 | 2021-12-10 | 中电海康集团有限公司 | Solid-state storage device power-off recovery method based on STT-MRAM |
CN114442960A (en) * | 2022-01-27 | 2022-05-06 | 新拓尼克科技(成都)有限公司 | Solid-state storage scheme free of fear abnormal power failure and capable of prolonging service life |
CN117093159A (en) * | 2023-10-18 | 2023-11-21 | 同方威视科技江苏有限公司 | Method and apparatus for accelerating a storage device |
CN117093159B (en) * | 2023-10-18 | 2024-01-26 | 同方威视科技江苏有限公司 | Method and apparatus for accelerating a storage device |
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Application publication date: 20160601 |