CN105631965A - Vehicle-mounted WTB message recorder - Google Patents
Vehicle-mounted WTB message recorder Download PDFInfo
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Abstract
The invention provides a vehicle-mounted WTB message recorder. The vehicle-mounted WTB message recorder comprises a WTB interface, a WTB decoder, a first processor, a high speed RAM, a voltage measuring circuit, a capacitor circuit, and a power supply circuit; the WTB interface, the WTB decoder, and the first processor are connected successively; the first processor is connected with the high speed RAM; the voltage measuring circuit is connected with the power supply circuit, the first processor, and the capacitor circuit respectively; and the capacitor circuit is connected with the high speed RAM. According to the vehicle-mounted WTB message recorder, when it is detected by the voltage measuring circuit that the voltage of the power supply circuit is lower than a threshold value, read-write message recording is stopped, and the RAM is supplied with electricity so as to avoid message record loss caused by sudden power failure or low voltage, and incomplete message recording caused by message record loss; and in addition, the writing speed of the high speed RAM is high, so that timeliness of write operation of message recording is improved, message recording loss caused by non-timely processing is avoided, and incomplete message recording caused by message recording loss is avoided.
Description
Technical Field
The embodiment of the invention relates to the technical field of train-level communication, in particular to a vehicle-mounted WTB message recorder.
Background
A twisted Wire Train (WTB) bus is a train bus specified in IEC61375, and is used for train reconnection and automatic marshalling. When locomotive reconnection debugging and reconnection operation have faults, the WTB bus message needs to be checked.
In the prior art, a WTB bus message is acquired through a vehicle-mounted WTB message recorder, as shown in fig. 1, a structure diagram of a vehicle-mounted WTB message recorder 15 in the prior art is shown, the vehicle-mounted WTB message recorder 15 includes a WTB interface 11, a WTB decoder 12, a processor 13, a memory 14 and a power supply circuit 16, where the WTB interface 11 is used to convert a differential signal on the WTB bus 10 into a level signal that can be recognized by the WTB decoder 12; the WTB decoder 12 is configured to analyze the level signal, convert the level signal into message data, add a timestamp to the message data to obtain a message record, and write the message record into a first-in first-out (FIFO) queue connected to the WTB decoder 12; the processor 13 is configured to read a message record in the FIFO queue, and write the message record into the memory 14, where the memory 14 is specifically a Nand-flash memory; the power supply circuit 16 is used for supplying power to the vehicle-mounted WTB message recorder 15.
In the prior art, the processor 13 reads the message record from the FIFO queue, and then writes the message record into the Nand-flash memory, and if the power supply circuit 16 is suddenly powered off or the voltage is suddenly reduced, the processor 13 is performing read-write operation of the message record, which results in the loss of the message record and the incomplete record of the finally stored message; in addition, due to the slow writing speed of the Nand-flash memory, the processor 13 cannot write the message records in time, and the message records are easily lost, so that the finally stored message records are incomplete.
Disclosure of Invention
The embodiment of the invention provides a vehicle-mounted WTB message recorder, which aims to improve the integrity of message recording.
One aspect of the embodiments of the present invention is to provide a vehicle-mounted WTB message recorder, including:
the system comprises a WTB interface, a WTB decoder, a first processor, a high-speed RAM, a voltage detection circuit, a capacitor circuit and a power supply circuit; wherein,
the WTB interface, the WTB decoder and the first processor are connected in sequence;
the WTB interface is used for converting the differential signals on the WTB bus into level signals which can be identified by the WTB decoder;
the WTB decoder is used for analyzing the level signal into message data and adding a timestamp to the message data to obtain a message record;
the first processor is connected with the high-speed RAM and used for reading the message record from the WTB decoder and writing the message record into the high-speed RAM;
the power supply circuit is used for supplying power to the vehicle-mounted WTB message recorder;
the voltage detection circuit is respectively connected with the power supply circuit and the first processor and is used for detecting the voltage of the power supply circuit, and when the voltage is lower than a threshold value, a first interrupt signal is sent to the first processor so that the first processor stops reading and writing the message record;
the capacitor circuit is respectively connected with the high-speed RAM and the voltage detection circuit and used for supplying power to the high-speed RAM when the voltage detection circuit detects that the voltage of the power supply circuit is lower than a threshold value.
Another aspect of the embodiments of the present invention provides a method for recording a vehicle-mounted WTB packet, including:
the WTB interface converts the differential signals on the WTB bus into level signals which can be recognized by a WTB decoder;
the WTB decoder analyzes the level signal into message data, and adds a timestamp to the message data to obtain a message record;
the first processor reads the message record from the WTB decoder and writes the message record into a high-speed RAM;
and the voltage detection circuit detects the voltage of the power supply circuit, and when the voltage is lower than a threshold value, a first interrupt signal is sent to the first processor so that the first processor stops reading and writing the message record, and meanwhile, the capacitor circuit supplies power to the high-speed RAM.
According to the vehicle-mounted WTB message recorder provided by the embodiment of the invention, the voltage of the power supply circuit is detected through the voltage detection circuit, when the voltage is lower than the threshold value, the first processor stops reading and writing the message record, and meanwhile, the capacitor circuit supplies power to the high-speed RAM which stores the message record, so that the incomplete finally stored message record caused by the loss of the message record due to sudden power failure or low voltage of the power supply circuit is prevented; in addition, the writing speed of the high-speed RAM is higher than that of the Nand-flash memory, so that the timeliness of writing operation of the first processor on the message records is improved, and incomplete finally stored message records caused by message record loss due to untimely message record processing of the first processor are prevented.
Drawings
Fig. 1 is a structural diagram of a vehicle-mounted WTB message recorder provided in the background art;
fig. 2 is a structural diagram of a vehicle-mounted WTB message recorder according to an embodiment of the present invention;
fig. 3 is a structural diagram of a vehicle-mounted WTB message recorder according to another embodiment of the present invention;
fig. 4 is a structural diagram of a vehicle-mounted WTB message recorder according to another embodiment of the present invention;
fig. 5 is a structural diagram of a vehicle-mounted WTB message recorder according to another embodiment of the present invention;
fig. 6 is a flowchart of a method for recording a vehicle WTB message according to an embodiment of the present invention.
Detailed Description
Fig. 2 is a structural diagram of a vehicle-mounted WTB message recorder according to an embodiment of the present invention. The embodiment of the invention provides a vehicle-mounted WTB message recorder 20 as shown in fig. 2, aiming at the problems of low message recording and storing efficiency and incomplete message recording of the vehicle-mounted WTB message recorder in the prior art.
As shown in fig. 2, the vehicle WTB message recorder 20 includes: a WTB interface 11, a WTB decoder 12, a first processor 21, a high-speed Random-access memory (RAM) 23, a voltage detection circuit 25, a capacitor circuit 27, and a power supply circuit 16; wherein, the WTB interface 11, the WTB decoder 12 and the first processor 21 are connected in sequence; the WTB interface 11 is configured to convert the differential signal on the WTB bus 10 into a level signal that can be recognized by the WTB decoder 12; the WTB decoder 12 is configured to parse the level signal into message data, and add a timestamp to the message data to obtain a message record; the first processor 21 is connected to the high-speed RAM23, and is configured to read the message record from the WTB decoder 12 and write the message record into the high-speed RAM 23; the power supply circuit 16 is used for supplying power to the vehicle-mounted WTB message recorder 20; the voltage detection circuit 25 is respectively connected to the power supply circuit 16 and the first processor 21, and is configured to detect a voltage of the power supply circuit 16, and when the voltage is lower than a threshold value, send a first interrupt signal to the first processor 21, so that the first processor 21 stops reading and writing the message record; the capacitor circuit 27 is respectively connected to the high-speed RAM23 and the voltage detection circuit 25, and is configured to supply power to the high-speed RAM23 when the voltage detection circuit 25 detects that the voltage of the power supply circuit 16 is lower than a threshold value.
The WTB interface 11 converts the differential signal on the WTB bus 10 into a level signal that can be recognized by the WTB decoder 12, where the level signal is a Complementary Metal Oxide Semiconductor (CMOS) level signal, and the CMOS level signal is specifically a WTB signal encoded according to manchester, the WTB decoder 12 parses the manchester encoded WTB signal into a 16-ary number composed of 0 and 1 to obtain message data, for example, the obtained message data is 01020304, and the WTB decoder 12 adds a time stamp to the message data to obtain a message record, for example, adds the time stamp 2014-09-20-14-30-24:30 to form the message record 2014-09-20-14-30-24:30, 01,02,03,04 in front of the message data 01020304.
The first processor 21 reads the message record from the WTB decoder 12 and writes the message record into the high speed RAM 23.
The power supply circuit 16 supplies power to the vehicle-mounted WTB message recorder 20, the voltage detection circuit 25 detects the voltage of the power supply circuit 16 by using a hysteresis comparison circuit, when the voltage is lower than a threshold value, specifically 4.75V, a first interrupt signal is sent to the first processor 21 and the capacitor circuit 27, and after the first processor 21 receives the first interrupt signal, the reading of the message record from the WTB decoder 12 is stopped immediately, and the writing of the message record into the high-speed RAM23 is stopped; meanwhile, the capacitor circuit 27 starts to continuously supply power to the high-speed RAM23 after receiving the first interrupt signal, so that the message record in the high-speed RAM23 is prevented from being lost. The embodiment of the invention detects the voltage of the power supply circuit through the voltage detection circuit, when the voltage is lower than the threshold value, the first processor stops reading and writing the message record, and meanwhile, the capacitor circuit supplies power to the high-speed RAM which stores the message record, so that the finally stored message record is prevented from being incomplete because the message record is lost due to sudden power failure or low voltage of the power supply circuit; in addition, the writing speed of the high-speed RAM is higher than that of the Nand-flash memory, so that the timeliness of writing operation of the first processor on the message records is improved, and incomplete finally stored message records caused by message record loss due to untimely message record processing of the first processor are prevented.
Fig. 3 is a structural diagram of a vehicle-mounted WTB message recorder according to another embodiment of the present invention; as shown in fig. 3, the vehicle WTB message recorder 20 further includes a second processor 22 and a solid-state memory 24, where the second processor 22 is respectively connected to the high-speed RAM23 and the solid-state memory 24, and is configured to read the message record from the high-speed RAM23 and write the message record into the solid-state memory 24; the voltage detection circuit 25 is further connected to the second processor 22, and configured to send the first interrupt signal to the second processor 22 when detecting that the voltage of the power supply circuit 16 is lower than a threshold value, so that the second processor 22 stops reading and writing the message record.
In the embodiment of the present invention, the first processor 21 and the second processor 22 both use low-power ARM processors, and process the message records in parallel; when the voltage detection circuit 25 detects that the voltage of the power supply circuit 16 is lower than the threshold value, a first interrupt signal is sent to the first processor 21 and the second processor 22, the first processor 21 stops reading the message record from the WTB decoder 12 and stops writing the message record into the high-speed RAM23 immediately after receiving the first interrupt signal, and the second processor 22 stops reading the message record from the high-speed RAM23 and stops writing the message record into the solid-state memory 24 immediately after receiving the first interrupt signal. When the voltage of the power supply circuit 16 is recovered to 4.95V, the two processors process the message records again in parallel, continue to transfer the message records in the high-speed RAM to the solid-state memory, and finally complete message records are stored in the solid-state memory, wherein the solid-state memory has the characteristics of large capacity and impact resistance.
According to the embodiment of the invention, the message record is read from the high-speed RAM through the second processor and written into the solid-state memory, and the storage capacity of the message record can be improved through the solid-state memory because the solid-state memory is larger than the storage capacity of the high-speed RAM.
On the basis of the above example, the first processor 21 is connected with the second processor 22; the first processor 21 is further configured to send a notification signal to the second processor 22 when the number of message records in the high-speed RAM23 is greater than or equal to a first threshold, so that the second processor 22 reads the message records from the high-speed RAM23 according to the notification signal; the second processor 22 is specifically configured to write the message record read from the high-speed RAM23 into a record file in the solid-state memory 24; the second processor 22 is further configured to compress the record file while creating a new record file in the solid-state memory 24 when the size of the record file is greater than or equal to a second threshold.
When the number of the message records in the high-speed RAM23 is greater than or equal to a first threshold, the first processor 21 notifies the second processor 22 through a serial peripheral interface (SPI for short) bus, the second processor 22 reads the message records from the high-speed RAM23 according to a notification signal, writes the message records into a record file in the solid-state memory 24, for example, the name of the record file is f1, when the size of f1 is greater than or equal to a second threshold, specifically, 50M bytes, compresses the record file, specifically, compresses the record file into a tar.gz format by using a tar program, and sets a new record file f2 in the solid-state memory 24, where the name of the compressed record file is f1 — compression time.
When the number of the message records in the high-speed RAM is larger than or equal to a first threshold value, a notification signal is sent to the second processor through the first processor, so that the second processor reads the message records according to the notification signal, and resource waste caused by unsuccessful reading of the message records by the second processor is prevented; the second processor compresses the record file, so that the recording space can be saved, and the utilization rate of storage resources is improved.
Fig. 4 is a structural diagram of a vehicle-mounted WTB message recorder according to another embodiment of the present invention; as shown in fig. 4, the vehicle WTB message recorder 20 further includes a RAM arbiter 26, and the RAM arbiter 26 is respectively connected to the first processor 21, the second processor 22 and the high-speed RAM23, and is configured to control an access sequence of the first processor 21 and the second processor 22 to the high-speed RAM 23.
When the first processor 21 and the second processor 22 simultaneously access the high-speed RAM23, the RAM arbiter 26 gives priority to the first processor 21 for access while the second processor 22 performs bus wait.
According to the embodiment of the invention, the access sequence of the first processor and the second processor to the high-speed RAM is controlled through the RAM arbiter, so that the integrity of the same message record can be avoided.
Fig. 5 is a structural diagram of a vehicle-mounted WTB message recorder according to another embodiment of the present invention; as shown in fig. 5, the vehicle-mounted WTB message recorder 20 further includes an ethernet interface 29 and a recording configuration module 28; the record configuration module 28 is connected to the ethernet interface 29 and the first processor 21, and configured to download a configuration file through the ethernet interface 29, where the configuration file includes a preset packet type, and send the preset packet type to the first processor 21, so that the type of the packet record obtained by the first processor 21 from the WTB decoder 12 is the preset packet type.
The record configuration module 28 stores a configuration file, specifically, the record configuration module 28 may download the configuration file through the ethernet interface 29, where the configuration file includes a preset packet type, and the preset packet type at least includes a data packet, a control packet, a monitoring packet, and an error packet, the record configuration module 28 sends the preset packet type to the first processor 21, and the first processor 21 obtains a packet record corresponding to the data packet, the control packet, the monitoring packet, or the error packet from the WTB decoder 12 according to the preset packet type.
According to the embodiment of the invention, the first processor acquires the message record with the same type as the preset message from the WTB decoder according to the preset message type provided by the record configuration module, so that the flexibility of message recording is improved.
On the basis of the above embodiment, the WTB decoder 12 is connected to a first-in first-out queue, and the first-in first-out queue is used for storing the message records obtained by the WTB decoder 12; the WTB decoder 12 is further configured to send a second interrupt signal to the first processor 21 after obtaining the message record, so that the first processor 21 reads the message record from the fifo queue according to the second interrupt signal.
The WTB decoder 12 writes the obtained message record into the fifo queue and simultaneously sends a second interrupt signal to the first processor 21 to notify the first processor 21 to read the message record from the fifo queue.
In the embodiment of the invention, the second interrupt signal is sent to the first processor through the WTB decoder to inform the first processor to read the message record from the first-in first-out queue, so that the resource waste caused by unsuccessful reading of the message record by the first processor is avoided, and meanwhile, the storage capacity of the message record is improved through the first-in first-out queue, the high-speed RAM and the multi-stage storage mechanism of the solid-state memory.
Fig. 6 is a flowchart of a method for recording a vehicle WTB message according to an embodiment of the present invention. The method for recording the vehicle-mounted WTB message provided by the embodiment of the invention comprises the following specific steps:
step S601, the WTB interface converts the differential signal on the WTB bus into a level signal which can be identified by a WTB decoder;
step S602, the WTB decoder analyzes the level signal into message data, and adds a timestamp to the message data to obtain a message record;
step S603, the first processor reads the message record from the WTB decoder and writes the message record into a high-speed RAM;
step S604, the voltage detection circuit detects the voltage of the power supply circuit, and when the voltage is lower than a threshold value, a first interrupt signal is sent to the first processor, so that the first processor stops reading and writing the message record, and meanwhile, the capacitor circuit supplies power to the high-speed RAM.
Each step of the vehicle-mounted WTB message recording method provided in the embodiment of the present invention is consistent with the function executed by the WTB interface, the WTB decoder, the first processor, the voltage detection circuit, and the capacitor circuit in the embodiment corresponding to fig. 2, that is, the vehicle-mounted WTB message recording method provided in the embodiment of the present invention may be executed by the vehicle-mounted WTB message recorder provided in fig. 2, and the specific process is not repeated here.
The embodiment of the invention detects the voltage of the power supply circuit through the voltage detection circuit, when the voltage is lower than the threshold value, the first processor stops reading and writing the message record, and meanwhile, the capacitor circuit supplies power to the high-speed RAM which stores the message record, so that the finally stored message record is prevented from being incomplete because the message record is lost due to sudden power failure or low voltage of the power supply circuit; in addition, the writing speed of the high-speed RAM is higher than that of the Nand-flash memory, so that the timeliness of writing operation of the first processor on the message records is improved, and incomplete finally stored message records caused by message record loss due to untimely message record processing of the first processor are prevented.
On the basis of the embodiment shown in fig. 6, after the step S603, the first processor reads the message record from the WTB decoder and writes the message record into the high-speed RAM, the method further includes:
when the number of the message records in the high-speed RAM is larger than or equal to a first threshold value, the first processor sends a notification signal to a second processor, so that the second processor reads the message records from the high-speed RAM according to the notification signal;
the second processor writes the message record into a record file in a solid-state memory;
when the size of the recording file is larger than or equal to a second threshold value, the second processor compresses the recording file and simultaneously establishes a new recording file in the solid-state memory.
The vehicle-mounted WTB message recording method provided in the embodiment of the present invention may be executed by the vehicle-mounted WTB message recorder provided in fig. 2, and the specific process is not described herein again.
When the number of the message records in the high-speed RAM is larger than or equal to a first threshold value, a notification signal is sent to the second processor through the first processor, so that the second processor reads the message records according to the notification signal, and resource waste caused by unsuccessful reading of the message records by the second processor is prevented; the second processor compresses the record file, so that the recording space can be saved, and the utilization rate of storage resources is improved.
On the basis of the above embodiment, the method for recording the vehicle-mounted WTB message further includes: determining, by a RAM arbiter, an order of access to the high-speed RAM by the first processor and the second processor when the first processor and the second processor access the high-speed RAM simultaneously;
when the voltage detection circuit detects that the voltage of the power supply circuit is lower than a threshold value, the first interrupt signal is sent to the second processor, so that the second processor stops reading and writing the message record;
and the record configuration module sends a preset message type to the first processor, so that the type of the message record acquired by the first processor from the WTB decoder is the preset message type, and the preset message type is stored in a configuration file downloaded from an Ethernet interface by the record configuration module.
The vehicle-mounted WTB message recording method provided in the embodiment of the present invention may be executed by the vehicle-mounted WTB message recorder provided in fig. 3 to 5, and the specific process is not described herein again
According to the embodiment of the invention, the access sequence of the first processor and the second processor to the high-speed RAM is controlled through the RAM arbiter, so that the integrity of the same message record can be avoided; the first processor obtains the message record with the same type as the preset message from the WTB decoder according to the preset message type provided by the record configuration module, so that the flexibility of message recording is improved.
On the basis of the embodiment corresponding to fig. 6, after the step S602 in which the WTB decoder parses the level signal into the message data and adds a timestamp to the message data to obtain a message record, the method further includes:
the WTB decoder stores the message record in an advanced outbound queue;
and the WTB decoder sends a second interrupt signal to the first processor so that the first processor reads the message record from the first-in first-out queue according to the second interrupt signal.
The vehicle-mounted WTB message recording method provided in the embodiment of the present invention may be executed by the vehicle-mounted WTB message recorder provided in fig. 2, and the specific process is not described herein again.
In the embodiment of the invention, the second interrupt signal is sent to the first processor through the WTB decoder to inform the first processor to read the message record from the first-in first-out queue, so that the resource waste caused by unsuccessful reading of the message record by the first processor is avoided, and meanwhile, the storage capacity of the message record is improved through the first-in first-out queue, the high-speed RAM and the multi-stage storage mechanism of the solid-state memory.
In summary, in the embodiment of the present invention, the voltage detection circuit detects the voltage of the power supply circuit, when the voltage is lower than the threshold value, the first processor stops reading and writing the message record, and the capacitor circuit supplies power to the high-speed RAM in which the message record is stored, so as to prevent incomplete finally stored message record caused by loss of the message record due to sudden power failure or low voltage of the power supply circuit; in addition, the writing speed of the high-speed RAM is higher than that of the Nand-flash memory, so that the timeliness of the first processor in writing the message records is improved, and incomplete final stored message records caused by message record loss due to untimely message record processing of the first processor are prevented; reading the message record from the high-speed RAM through the second processor, and writing the message record into the solid-state memory, wherein the solid-state memory has larger storage capacity than the high-speed RAM, so that the storage capacity of the message record can be improved through the solid-state memory; when the number of the message records in the high-speed RAM is larger than or equal to a first threshold value, a notification signal is sent to the second processor through the first processor, so that the second processor reads the message records according to the notification signal, and resource waste caused by unsuccessful reading of the message records by the second processor is prevented; the recording file is compressed by the second processor, so that the recording space can be saved, and the utilization rate of storage resources is improved; the access sequence of the first processor and the second processor to the high-speed RAM is controlled through the RAM arbiter, so that the integrity of the same message record can be avoided; the first processor obtains the message record with the same type as the preset message from the WTB decoder according to the preset message type provided by the record configuration module, so that the flexibility of message recording is improved; and sending a second interrupt signal to the first processor through the WTB decoder to inform the first processor to read the message record from the first-in first-out queue, so that the resource waste caused by unsuccessful reading of the message record by the first processor is avoided, and meanwhile, the storage capacity of the message record is improved through the first-in first-out queue, the high-speed RAM and a solid-state memory multi-level storage mechanism.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
The integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions to enable a computer device (which may be a personal computer, a server, or a network device) or a processor (processor) to execute some steps of the methods according to the embodiments of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
It is obvious to those skilled in the art that, for convenience and simplicity of description, the foregoing division of the functional modules is merely used as an example, and in practical applications, the above function distribution may be performed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to perform all or part of the above described functions. For the specific working process of the device described above, reference may be made to the corresponding process in the foregoing method embodiment, which is not described herein again.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A vehicle-mounted WTB message recorder is characterized by comprising: the system comprises a WTB interface, a WTB decoder, a first processor, a high-speed RAM, a voltage detection circuit, a capacitor circuit and a power supply circuit; wherein,
the WTB interface, the WTB decoder and the first processor are connected in sequence;
the WTB interface is used for converting the differential signals on the WTB bus into level signals which can be identified by the WTB decoder;
the WTB decoder is used for analyzing the level signal into message data and adding a timestamp to the message data to obtain a message record;
the first processor is connected with the high-speed RAM and used for reading the message record from the WTB decoder and writing the message record into the high-speed RAM;
the power supply circuit is used for supplying power to the vehicle-mounted WTB message recorder;
the voltage detection circuit is respectively connected with the power supply circuit and the first processor and is used for detecting the voltage of the power supply circuit, and when the voltage is lower than a threshold value, a first interrupt signal is sent to the first processor so that the first processor stops reading and writing the message record;
the capacitor circuit is respectively connected with the high-speed RAM and the voltage detection circuit and used for supplying power to the high-speed RAM when the voltage detection circuit detects that the voltage of the power supply circuit is lower than a threshold value.
2. The vehicle-mounted WTB message recorder of claim 1, further comprising: a second processor and a solid state memory; the second processor is respectively connected with the high-speed RAM and the solid-state memory and is used for reading the message record from the high-speed RAM and writing the message record into the solid-state memory;
the voltage detection circuit is further connected to the second processor, and configured to send the first interrupt signal to the second processor when detecting that the voltage of the power supply circuit is lower than a threshold value, so that the second processor stops reading and writing the message record.
3. The vehicle-mounted WTB message recorder according to claim 1 or 2, wherein the first processor is coupled to the second processor; the first processor is further configured to send a notification signal to the second processor when the number of the packet records in the high-speed RAM is greater than or equal to a first threshold, so that the second processor reads the packet records from the high-speed RAM according to the notification signal;
the second processor is specifically configured to write the packet record read from the high-speed RAM into a record file in the solid-state memory;
the second processor is further configured to compress the record file while creating a new record file in the solid-state memory when the size of the record file is greater than or equal to a second threshold.
4. The vehicle-mounted WTB message recorder of claim 3, further comprising:
and the RAM arbiter is respectively connected with the first processor, the second processor and the high-speed RAM and is used for controlling the access sequence of the first processor and the second processor to the high-speed RAM.
5. The vehicle-mounted WTB message recorder of claim 4, further comprising:
an Ethernet interface and a record configuration module;
the record configuration module is connected to the ethernet interface and the first processor, and configured to download a configuration file through the ethernet interface, where the configuration file includes a preset packet type, and send the preset packet type to the first processor, so that the packet record type obtained by the first processor from the WTB decoder is the preset packet type.
6. The vehicle-mounted WTB message recorder of claim 4 or 5, wherein the WTB decoder is connected to a first-in-first-out queue for storing message records obtained by the WTB decoder;
the WTB decoder is further configured to send a second interrupt signal to the first processor after obtaining the packet record, so that the first processor reads the packet record from the fifo queue according to the second interrupt signal.
7. A method for recording vehicle-mounted WTB messages is characterized by comprising the following steps:
the WTB interface converts the differential signals on the WTB bus into level signals which can be recognized by a WTB decoder;
the WTB decoder analyzes the level signal into message data, and adds a timestamp to the message data to obtain a message record;
the first processor reads the message record from the WTB decoder and writes the message record into a high-speed RAM;
and the voltage detection circuit detects the voltage of the power supply circuit, and when the voltage is lower than a threshold value, a first interrupt signal is sent to the first processor so that the first processor stops reading and writing the message record, and meanwhile, the capacitor circuit supplies power to the high-speed RAM.
8. The method according to claim 7, wherein after the first processor reads the message record from the WTB decoder and writes the message record to high speed RAM, further comprising:
when the number of the message records in the high-speed RAM is larger than or equal to a first threshold value, the first processor sends a notification signal to a second processor, so that the second processor reads the message records from the high-speed RAM according to the notification signal;
the second processor writes the message record into a record file in a solid-state memory;
when the size of the recording file is larger than or equal to a second threshold value, the second processor compresses the recording file and simultaneously establishes a new recording file in the solid-state memory.
9. The method of claim 8, further comprising:
determining, by a RAM arbiter, an order of access to the high-speed RAM by the first processor and the second processor when the first processor and the second processor access the high-speed RAM simultaneously;
when the voltage detection circuit detects that the voltage of the power supply circuit is lower than a threshold value, the first interrupt signal is sent to the second processor, so that the second processor stops reading and writing the message record;
and the record configuration module sends a preset message type to the first processor, so that the type of the message record acquired by the first processor from the WTB decoder is the preset message type, and the preset message type is stored in a configuration file downloaded from an Ethernet interface by the record configuration module.
10. The method according to any one of claims 7-9, wherein the WTB decoder, after parsing the level signal into message data and adding a timestamp to the message data to obtain a message record, further comprises:
the WTB decoder stores the message record in an advanced outbound queue;
and the WTB decoder sends a second interrupt signal to the first processor so that the first processor reads the message record from the first-in first-out queue according to the second interrupt signal.
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| CN105631965B (en) | 2018-03-16 |
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