CN105610586B - A kind of serial ports design circuit for the non-isolated power supply system meeting Power over Ethernet - Google Patents
A kind of serial ports design circuit for the non-isolated power supply system meeting Power over Ethernet Download PDFInfo
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- CN105610586B CN105610586B CN201610115138.5A CN201610115138A CN105610586B CN 105610586 B CN105610586 B CN 105610586B CN 201610115138 A CN201610115138 A CN 201610115138A CN 105610586 B CN105610586 B CN 105610586B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
- H04L12/10—Current supply arrangements
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Abstract
The present invention discloses a kind of serial ports design circuit for the non-isolated power supply system meeting Power over Ethernet, including：POE regulator circuits by the unknown direct current of the polarity from the power over Ethernet device High voltage output that generation polarity is known after rectified, and are converted to stable voltage output, by the data transmission from Ethernet to circuit system；The output of POE regulator circuits is converted to voltage needed for system by principal voltage generation module, and so that output of the voltage compared with POE regulator circuits is delayed and exported；Interface circuit is isolated with circuit system, principal voltage generation module for establishing initial stage in the output of POE regulator circuits for controllable switching array, and interface circuit is connected with principal voltage generation module, circuit system after the output foundation or circuit system start；The problem of interface circuit and circuit system, the present invention can avoid serial ports access and the interference of user terminal power grid power frequency 50Hz is brought into chip test side, unsuccessfully causes PCB electrifying startups to fail so as to cause detection.
Description
Technical field
The present invention relates to a kind of circuits, more particularly to a kind of non-isolated power supply system meeting Power over Ethernet (POE)
Serial ports design circuit.
Background technology
More and more home terminals, monitoring device and enterprise network communication product are selected successively through cable now
Mode obtains system power supply, to break away from using trouble caused by AC adapter, and will further expand Ethernet
The application field of technology is referred to as POE equipment, i.e. power on Ethernet for such power supply and powered product.Pass through
POE is also had two major classes differentiation by electricity：It is isolated and non-isolated.Do not have between the input circuit and output loop of isolated power supply
There is direct electrical connection, be the high-impedance state of insulation between outputting and inputting, without current loop, strong antijamming capability, peace
Quan Xinggao, but complicated volume is big；Internal MOS switchings can be directed or through between non-isolated power input and output
Formation current loop, poor anti jamming capability, safety are low.It will not lead to safety problem with human contact for terminal device
Situation PCB sizes can be saved using non-isolated power supply, improve transfer efficiency, reduce product cost, but also lacked there are one apparent
Sunken place be exactly below system end designer accessed by serial ports or when display system power up, serial ports access will be
The interference of power grid power frequency 50Hz on user terminal PC is brought on POE chips, this will lead to POE abnormal electrical power supplies, so as to cause PCB
Plate starts failure.
Specifically, first having a look process and principle that POE realizes power supply conversion here：Power over Ethernet starts to carry
The power supply unit (Power Sourcing Equipment, PSE) of power supply source, the equipment is by measuring its PD (Powered
Device, power receiving equipment/terminal) by electric terminals the equipment powered is needed to detect.
As shown in Figure 1, PSE can be by data to powering to PD.Since DC and data frequency are not interfere with each other, it is possible to
With a pair of circuit simultaneous transmission electric current and data.In fact, it is considered as cable a kind of " multiplexing ".It can be network interface RJ45
8 pins in 1,2 links form positive (or negative) pole, 3,6 links formed bear (or just) pole, have plenty of 4,5 and 7,8 phase groups
Conjunction forms supply line channel.As soon as a PSE for uncertain positive and negative anodes power supply, a rectification is needed by electric terminals in PD
Bridge device.After PD voltage positive and negative anodes are given in determination, before the voltage that can correctly convert output design, it is also necessary to through input
Voltage detecting is primarily used to judge whether receiving end is real PD chips, and an effective power receiving equipment (PD) must have
There are one " the detection features " close to 25k Ω common-mode resistances, then judge the required practical power power of PD using classification.
As soon as PSE judges the peak power requirements of PD with second of measurement being referred to as classified, PSE can be right after having grasped this information
The equipment that those needs are powered provides power supply, without damaging the equipment that need not be powered, and can effectively distribute available power.
PSE and PD by detection, be classified, power on three processes realize the input to rear end PD conversion chips power.I
Have a look the start-up course waveform actually powered on again, it can be found that PSE without settling at one go to PD add 48V voltages,
Wherein in detection-phase：
Allowing PSE, to before line powering, it must check featured resistance with the test source of a limited power, with
The network equipment for avoiding adding to 48V power supplys non-compatible PoE, causes damages to it.Before power-up, PSE first use 2.8V~
The detecting voltage of 10V goes whether detecting has PD accesses.When it is implemented, being by two voltages (Fig. 2, figures between 2.8V~10V
Detecting voltage 1 in 3, detecting voltage 2, are spaced in 1V or more) it is sent to network link, it is then different according to two obtained
Current value remakes operation (Δ V/ Δ I).It is identified for the ease of PSE, performances of the I EEE802.3af for PD during detecting
(feature) dictates, such as when PSE provides the voltage of 2.7V, electric current is 124uA defined in AT standards.
From the point of view of the waveform actually measured, it can be found that in the voltage very little that detection-phase PSE is provided, it is easier
It is disturbed, it is easier to be done by the 50Hz power frequency components that user terminal is brought from AC network especially in non-isolated power supply system
It disturbs.
Fig. 2 is that system end does not access serial interface to the voltage starting signal schematic representation of the PD chips test side of PC, Fig. 3
There is access serial interface to the voltage starting signal schematic representation of the PD chips test side of PC for system end, it can from above two figure
The 50Hz power frequency component interference fringes in the AC network at user's debugging end will be come in when design system terminates serial ports by going out,
This will influence PSE and judge the detection that PD equipment whether there is.Sometimes it will enter and be repeatedly detected process, and then lead to system
It cannot normally power on.
Invention content
In order to overcome the deficiencies of the above existing technologies, purpose of the present invention is to provide a kind of Power over Ethernet of meeting
The serial ports of non-isolated power supply system designs circuit, can be to avoid since system end designer is accessed or shown by serial ports
When power up of uniting, serial ports access will bring the interference of the power grid power frequency 50Hz on user terminal PC into the test side of PD chips
On, the problem of detecting and fail so as to cause PD, and then pcb board electrifying startup is caused to fail, while it can ensure that Serial Port Information is beaten
What is printed is complete.
In order to achieve the above object, the present invention proposes a kind of serial ports design electricity for the non-isolated power supply system meeting Power over Ethernet
Road, including：
POE regulator circuits, being used for will the rectified rear generation pole the unknown direct current DC of the polarity from power over Ethernet device
Property the High voltage output that knows, and the High voltage output is converted to stable voltage output, while the data from Ethernet being believed
Breath is transmitted to circuit system；
Principal voltage generation module, the burning voltage for exporting POE regulator circuits is converted to voltage needed for system, and makes
The voltage is delayed compared with the burning voltage that POE regulator circuits export and exports；
Controllable switching array, for establishing initial stage by interface circuit and system electricity in the voltage stabilizing output of the POE regulator circuits
Road, the principal voltage generation module isolation, and in the voltage stabilizing of the POE regulator circuits output establish after or the circuit system start after will
The interface circuit is connected with principal voltage generation module, the circuit system；
Interface circuit is used for and client communication or debugging；
Circuit system is controlled for system to complete product function.
Further, which includes：
The unknown direct current DC of polarity from power over Ethernet device is connected to rectifier bridge, and data is believed by network interface
Breath is connected to the circuit system；
Rectifier bridge by the input terminal of output after the unknown direct current DC rectifications of polarity to POE voltage-stablizers, while will come from Ethernet
PD detection signals are exported after the detection signal rectification of power supply unit and are connected to the test side of POE voltage-stablizers；
POE voltage-stablizers, for generating stable output voltage to the principal voltage generation module and the controllable switching array.
Further, which is RJ45 network interfaces.
Further, 1,2 pins in 8 pins of the RJ45 network interfaces are connected to form positive or negative pole, 3,6 pipes
Foot connects to form negative or positive pole, or the combined formation supply line channel of 4,5 and 7,8 pins.
Further, which includes：
System voltage generation circuit connects the POE output end of voltage stabilizer, the burning voltage for exporting POE voltage-stablizers
Voltage needed for system is converted to, and is exported to the circuit system power end and controllable switching array；
Delay circuit connects the POE output end of voltage stabilizer and the system voltage generation circuit Enable Pin, controls system electricity
Voltage needed for the pressure transformed system of generation circuit is delayed compared with the burning voltage that the POE voltage-stablizers export and exports.
Further, which is DC/DC conversion circuits.
Further, which includes controllable switch and its driving circuit, and data input pin is connected to this
The data output end of circuit system, the output of the controllable switching array are connected to the power supply and data-interface of the interface circuit.
Further, the controllable switching array is using relay or silicon-controlled realization isolation switching.
Further, which uses UART interface.
Further, which is PD chip conversion portions, is detected, is classified by completion, powered on to realize POE
Power supply conversion.
Compared with prior art, a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet of the present invention designs circuit
Disconnection is isolated with the PC at debugging end in the serial ports for designing end before powering by RJ45 network interfaces, to first ensure PD chips
5V voltages output, can thus avoid due to system end designer pass through serial ports access or display system power up
When, serial ports access will bring the interference of the power grid power frequency 50Hz on user terminal PC on the test side of PD chips into, so as to cause
PD detection failure, and then cause pcb board electrifying startup fail the problem of, while can ensure Serial Port Information printing it is complete.
Description of the drawings
Fig. 1 be PSE by data to the circuit diagram powered to PD；
Fig. 2 be system end do not access serial interface to the PD chips test side of PC voltage starting signal schematic representation；
Fig. 3 is the voltage starting signal schematic representation that system end has access serial interface to the PD chips test side of PC；
Fig. 4 is the circuit signal that a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet of the present invention designs circuit
Figure；
Fig. 5 is the schematic diagram of the POE regulator circuits of the specific embodiment of the invention；
Fig. 6 is the circuit diagram of the principal voltage generation module of the specific embodiment of the invention；
Fig. 7 is the circuit diagram of the controllable switching array of the specific embodiment of the invention.
Specific implementation mode
Below by way of specific specific example and embodiments of the present invention are described with reference to the drawings, those skilled in the art can
Understand the further advantage and effect of the present invention easily by content disclosed in the present specification.The present invention can also pass through other differences
Specific example implemented or applied, details in this specification can also be based on different perspectives and applications, without departing substantially from
Various modifications and change are carried out under the spirit of the present invention.
Before explaining the present invention, it is necessary first to understand why design system end can be the 50Hz power frequencies in AC network
Signal interference takes the powered input test sides PD to.
For this purpose, first on actual design circuit, designed using the Si3402-B-GM chips of Silicon Lab companies
A non-isolated 5V out-put supplies of POE.
Internal MOS can be directed or through between non-isolated power input and output to switch to form current loop, and
And internal diode can be all carried inside metal-oxide-semiconductor, this is mainly to prevent when there is reversed induced potential on circuit, for reversed sense
Raw voltage provides access, avoids reversed induced potential breakdown metal-oxide-semiconductor, and exactly this internal diode is by the ends user PC AC network
In 50Hz power frequency interference signals introduced by serial interface, to devise one kind according to this thinking present invention can meet
The serial ports of POE non-isolated power supply systems designs circuit.
Fig. 4 is the circuit signal that a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet of the present invention designs circuit
Figure.As shown in figure 4, a kind of serial ports design circuit of non-isolated power supply system meeting Power over Ethernet of the present invention includes POE steady
Volt circuit 10, principal voltage generation module 20, controllable switching array 30, interface circuit 40 and circuit system 50.
Wherein, POE regulator circuits 10 include RJ45 network interfaces, rectifier bridge and POE voltage-stablizers, for that will come from Ethernet
The High voltage output that knows of polarity such as+48V is generated after the rectified bridge rectifications of the unknown direct current DC of polarity of power supply unit PSE, then by
+ 48V High voltage outputs are converted to stable voltage output such as+5V by POE voltage-stablizers, while the data information from Ethernet being passed
Transport to circuit system；Principal voltage generation module 20 includes delay circuit and system voltage generation circuit, is used for POE regulator circuits
10 output burning voltages output is converted under the control of delay circuit voltage needed for system such as+3.3V, and make the voltage compared with
The burning voltage that POE regulator circuits 10 export postpones the time output of delay circuit setting；Controllable switching array 30 includes controllable
Switch and its driving circuit establish initial stage by interface circuit 40 and circuit system for the voltage stabilizing output in POE regulator circuits 10
50, principal voltage generation module 20 be isolated, and in the voltage stabilizing of POE regulator circuits 10 output establish after or circuit system 50 start after will
Interface circuit 40 is connected with principal voltage generation module 20 and circuit system 50, and in the present invention, controllable switch such as relay also may be used
To be silicon-controlled, but not limited to this；Interface circuit 40 can be, but not limited to UART interface, for communicating or adjusting with client rs PC
Examination, circuit system 50 are then used for system and control to complete product function.
The unknown direct current DC of polarity from power over Ethernet device PSE is connected to rectifier bridge by RJ45 network interfaces, and will
Data information is connected to circuit system 50, and rectifier bridge is defeated by output+48V's after the unknown direct current DC rectifications of polarity to POE voltage-stablizers
Enter end, while PD detection signals will be exported after the detection signal rectification of power over Ethernet device PSE and be connected to POE voltage stabilizings
The test side of device, what POE voltage-stablizers generated stablize output such as+5V is connected to delay circuit, system voltage generation circuit and controllable
Switch arrays 30, the principal voltage needed for system voltage generation circuit output system are connected to 50 power end of circuit system and controllably open
The power input of array 30 is closed, the data input pin of controllable switching array 30 is connected to the data output end of circuit system 50,
The output of controllable switching array 30 is connected to the power supply and data-interface of interface circuit 40.
In the specific embodiment of the invention, for RJ45 network interfaces, 1,2 in 8 pins of RJ45 network interfaces
Link forms positive (or negative) pole, 3,6 links is formed negative (or just) pole, or the combined formation power supply of 4,5 and 7,8 pins
Line channel；For the PSE of a uncertain positive and negative anodes power supply, need a rectifier bridge device by input direct-current at the ends PD
The positive and negative anodes that mode commutation is fixed as the voltage exported after one kind, that is, rectified bridge are just fixed up；POE voltage-stablizers are
PD chip conversion portions, major function are to complete detect, be classified, power on three processes to realize the power supply conversion of POE；Delay
Circuit is that power supply delay enables part, and major function is that the 5V voltages that PD conversion chips part exports are carried out one of them to lead to
Delay in path, delay time can be adjusted according to design circuit devcie, can generally be delayed to 200ms, then will
The high level of delay output gives the subsequent low pressure 5V Enable Pins for turning the DC direct current conversion chips of 3.3V, can control output 3.3V
At the time of be later than 5V supplies below the relay power switching of controllable switching array at the time of, while can ensure that Serial Port Information is beaten
What is printed is complete；System voltage generation circuit is that low voltage DC turns the parts DC, and major function is to realize that 5V turns required for cpu system plate
3.3V.Its Enable Pin is delayed by power supply enables part control；Circuit system is entire product function characteristic, for debugging
Or the Serial Port Information of display system start-up course just derives from circuit system；Controllable switching array 30 is cut using relay isolation
It changes, disconnection is isolated with the PC at debugging end in the serial ports for designing end before powering by RJ45 the purpose is to ensure entire product,
This point present invention does not have power-up state to ensure by relay in acquiescence, to first ensure the defeated of the 5V voltages of PD chips
Go out, can thus avoid accessing by serial ports due to system end designer below or when display system power up, serial ports
Access will bring the interference of the power grid power frequency 50Hz on user terminal PC on the test side of PD chips into, this will cause PD to detect
Failure, the problem of failure so as to cause pcb board electrifying startup；Interface circuit 40 use UART interface, be mainly used to debugging or
The Serial Port Information of display system start-up course.
Fig. 5 is the schematic diagram of the POE regulator circuits of the specific embodiment of the invention, and Fig. 6 is the master of the specific embodiment of the invention
The circuit diagram of voltage generating module, Fig. 7 are the circuit diagram of the controllable switching array of the specific embodiment of the invention.Specifically
Ground, delay chip U4 (MAX6820UT), resistance R25-26, capacitance C30-32 form delay circuit, and resistance R20, R24 are for connecting
Connect the control Enable Pin output and input to POE output and system voltage generation circuit；DC/DC chips U3 (MP1470), capacitance
C24-C26, resistance R21-R23, R18, inductance L3, capacitance DC1, C28-C29 form system voltage generation circuit, resistance R19 and
Capacitance C27 is for compensating；The driving circuit of triode Q3, resistance R27-R29, capacitance C33 composition controllable switching array, K1-2 are
Controllable switching array；POE voltage stabilizing chips U2 (Si3402), capacitance C10-C23, resistance R11-R17, rectifier bridge D1, D3, diode
D2, inductance L2, magnetic bead FB1 composition POE regulator circuits 10.
In conclusion a kind of serial ports design circuit of non-isolated power supply system meeting Power over Ethernet of the present invention is passing through
Disconnection is isolated with the PC at debugging end in the serial ports for designing end before the power supply of RJ45 network interfaces, to first ensure the 5V electricity of PD chips
The output of pressure, when can thus avoid due to system end designer through serial ports access or display system power up, string
Mouth access will bring the interference of the power grid power frequency 50Hz on user terminal PC on the test side of PD chips into, be detected so as to cause PD
The problem of failing, and then pcb board electrifying startup caused to fail, while can ensure the complete of Serial Port Information printing.
Any those skilled in the art can without violating the spirit and scope of the present invention repair above-described embodiment
Decorations and change.Therefore, the scope of the present invention, should be as listed in the claims.
Claims (10)
1. a kind of serial ports of non-isolated power supply system meeting Power over Ethernet designs circuit, including：
POE regulator circuits, for will the unknown direct current DC of the polarity from power over Ethernet device it is rectified after generate polarity it is true
The High voltage output known, and the High voltage output is converted to stable voltage output, while the data information from Ethernet being passed
Transport to circuit system；
Principal voltage generation module, the burning voltage for exporting POE regulator circuits are converted to voltage needed for system, and make the electricity
It presses the burning voltage exported compared with POE regulator circuits to be delayed to export；
Controllable switching array, for the voltage stabilizing output of the POE regulator circuits establish initial stage by interface circuit and circuit system, should
Principal voltage generation module is isolated, and is connect after the voltage stabilizing of POE regulator circuits output is established or after circuit system startup by this
Mouth circuit is connected with principal voltage generation module, the circuit system；
Interface circuit is used for and client communication or debugging；
Circuit system is controlled for system to complete product function.
2. a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet as described in claim 1 designs circuit, special
Sign is that the POE regulator circuits include：
The unknown direct current DC of polarity from power over Ethernet device is connected to rectifier bridge, and data information is connected by network interface
It is connected to the circuit system；
Rectifier bridge by the input terminal of output after the unknown direct current DC rectifications of polarity to POE voltage-stablizers, while will come from Power over Ethernet
PD detection signals are exported after the detection signal rectification of equipment and are connected to the test side of POE voltage-stablizers；
POE voltage-stablizers, for generating stable output voltage to the principal voltage generation module and the controllable switching array.
3. a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet as claimed in claim 2 designs circuit, special
Sign is：The network interface is RJ45 network interfaces.
4. a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet as claimed in claim 3 designs circuit, special
Sign is：1,2 pins in 8 pins of the RJ45 network interfaces are connected to form positive or negative pole, 3,6 pins are connected to be formed
Negative or positive pole, or the combined formation supply line channel of 4,5 and 7,8 pins.
5. a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet as claimed in claim 2 designs circuit, special
Sign is that the principal voltage generation module includes：
System voltage generation circuit connects the POE output end of voltage stabilizer, the burning voltage conversion for exporting POE voltage-stablizers
For voltage needed for system, and export to the circuit system power end and controllable switching array；
Delay circuit connects the POE output end of voltage stabilizer and the system voltage generation circuit Enable Pin, controls system voltage production
Voltage needed for system after raw circuit conversion is delayed compared with the burning voltage that the POE voltage-stablizers export and exports.
6. a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet as claimed in claim 5 designs circuit, special
Sign is：The system voltage generation circuit is DC/DC conversion circuits.
7. a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet as claimed in claim 5 designs circuit, special
Sign is that the controllable switching array includes controllable switch and its driving circuit, and data input pin is connected to the circuit system
Data output end, the output of the controllable switching array are connected to the power supply and data-interface of the interface circuit.
8. a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet as claimed in claim 7 designs circuit, special
Sign is：The controllable switching array is using relay or silicon-controlled realization isolation switching.
9. a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet as described in claim 1 designs circuit, special
Sign is：The interface circuit uses UART interface.
10. a kind of serial ports for the non-isolated power supply system meeting Power over Ethernet as claimed in claim 2 designs circuit, special
Sign is：The POE voltage-stablizers are PD chip conversion portions, are converted by the power supply for completing to detect, be classified, power on to realize POE.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610115138.5A CN105610586B (en) | 2016-03-01 | 2016-03-01 | A kind of serial ports design circuit for the non-isolated power supply system meeting Power over Ethernet |
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| CN201610115138.5A CN105610586B (en) | 2016-03-01 | 2016-03-01 | A kind of serial ports design circuit for the non-isolated power supply system meeting Power over Ethernet |
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| CN105610586B true CN105610586B (en) | 2018-09-28 |
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Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106100858B (en) * | 2016-08-06 | 2021-12-17 | 何明 | Standard POE and force non-standard POE integration to receive power supply circuit |
| TWI701938B (en) * | 2017-04-21 | 2020-08-11 | 緯創資通股份有限公司 | Internet telephone device, external connection card and communication method therefor |
| CN108052193A (en) * | 2018-01-02 | 2018-05-18 | 上海市共进通信技术有限公司 | Power switch sequence circuit |
| CN110266503B (en) * | 2019-06-29 | 2024-07-23 | 宁波瑞辉智能科技有限公司 | Dual-network-port embedded industrial control terminal supporting POE power supply |
| CN113049892A (en) | 2019-12-28 | 2021-06-29 | 华为技术有限公司 | Band filtering detection device, power supply equipment and system |
| CN112714005A (en) * | 2021-01-26 | 2021-04-27 | 深圳市玩视科技有限公司 | PD module and power supply system |
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