CN105610586A - Serial port circuit design satisfying power on Ethernet (POE) non-isolated power system - Google Patents
Serial port circuit design satisfying power on Ethernet (POE) non-isolated power system Download PDFInfo
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- CN105610586A CN105610586A CN201610115138.5A CN201610115138A CN105610586A CN 105610586 A CN105610586 A CN 105610586A CN 201610115138 A CN201610115138 A CN 201610115138A CN 105610586 A CN105610586 A CN 105610586A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
- H04L12/10—Current supply arrangements
Abstract
The present invention discloses a serial port circuit design satisfying a power on Ethernet (POE) non-isolated power system. The serial port circuit design includes a POE voltage stabilizing circuit, a main voltage generation module, a controllable switch array, an interface circuit and a system circuit. The POE voltage stabilizing circuit is used for rectifying a direct current with unknown polarities from an Ethernet power supply device so as to generate a high voltage with known polarities to output, converting the high voltage into a stable voltage to output, and transmitting data from the Ethernet to the system circuit. The main voltage generation module is used for converting the output of the POE voltage stabilizing circuit into a voltage required by the system, and delaying outputting of the voltage relatively to the output of the POE voltage stabilizing circuit. The controllable switch array is used for isolating the interface circuit from the system circuit and the main voltage generation module in an early establishment stage of the output of the POE voltage stabilizing circuit, and connecting the interface circuit with the main voltage generation module and the system circuit after the output establishment or starting of the system circuit. According to the serial port circuit design, a serial port path is prevented from bringing interference of a power system power frequency 50Hz of a user terminal into a chip detection terminal, so as not to cause detection failure to result in printed circuit board (PCB) powering starting failure.
Description
Technical field
The present invention relates to a kind of circuit, the serial ports that particularly relates to the non-insulating power supply system of a kind of POE of meeting is establishedMeter circuit.
Background technology
Now increasing home terminal, watch-dog and enterprise network communication product are selected to pass through successivelyThe mode of netting twine is obtained system power supply, thereby has broken away from the trouble that adopts AC adapter to bring, and willFurther expand the application of ethernet technology, be referred to as POE for such power supply and powered product and establishStandby, i.e. poweronEthernet. Be subject to electricity also to have two large classes to distinguish by POE: isolated and non-isolated. Not directly electrical connection between the input circuit of isolated power supply and output loop, input and outputBetween be the high-impedance state of insulation, there is no current loop, its antijamming capability is strong, safe, but structure is multipleAssorted volume is large; Between non-isolated power supply input and output, can directly or by inner MOS switch and formCurrent loop, its poor anti jamming capability, security is low. Can not contact with human body and cause for terminal deviceThe situation of safety problem adopts non-insulating power supply can save PCB size, improves conversion efficiency, reduces product and becomesThis, but also have the place of an open defect be exactly below system end designer access by serial ports or showWhen system power up, serial ports path will be brought POE into the interference of the electrical network power frequency 50Hz on user side PCOn chip, this will cause POE abnormal electrical power supply, loses efficacy thereby cause pcb board to start.
Specifically, first have a look POE here and realize process and the principle that power supply is changed: POE is openedStart from the power supply unit of power supply (PowerSourcingEquipment, PSE) can be provided, this equipment passes throughMeasuring its PD (PoweredDevice, power receiving equipment/terminal) is subject to electric terminals to detect the equipment that needs power supply.
As shown in Figure 1, PSE can be by data to powering to PD. Because DC and data frequency do not interfere with each other,So can be with a pair of circuit transmission current and data simultaneously. In fact, concerning cable, can regard one as" multiplexing ". In the pin of 8 of network interface RJ45 1,2 link just can formed to (or negative) utmost point, 3,6Link forms negative (or just) utmost point, has plenty of 4,5 and 7,8 combined formation supply line passages. ForThe PSE of a uncertain both positive and negative polarity power supply, is subject to electric terminals just to need a rectifier bridge device at PD. ?Determine and give after PD voltage both positive and negative polarity, before correctly changing the voltage of output design, also need through inputVoltage detecting is mainly for judging whether receiving end is real PD chip, an effective power receiving equipment(PD) must there is " a detection feature " that approaches 25k Ω common-mode resistance, and then judge PD through classificationNeeded practical power power. PSE is called measuring and judge its peak work of PD for the second time of classification with oneRate requirement, has grasped the equipment that PSE just can need to power to those after this information power supply is provided, and could notDamage the equipment that does not need power supply, and can effectively distribute available horsepower.
PSE and PD realize defeated to rear end PD conversion chip by detection, classification, three processes that power onEnter power supply. We have a look the actual start-up course waveform powering on again, can find that PSE does not settle at one goJust add 48V voltage to PD, wherein at detection-phase:
Allowing PSE to before line powering, it must check feature with the test source of a limited powerResistance, to avoid 48V power supply to add to the network equipment of non-compatible PoE, works the mischief to it. Powering upBefore, first PSE goes detecting whether to have PD access with the detecting voltage of 2.8V～10V. When concrete enforcement,By two voltages between 2.8V～10V (the detecting voltage 1 in Fig. 2, Fig. 3, detecting voltage 2, interval1V or more than) deliver to network link, then remake computing (Δ V/ according to two different current values that obtainΔ I). For the ease of PSE identification, IEEE802.3af is the performance in detecting process (feature) for PDMade regulation, for example in AT standard, having defined electric current in the time that PSE provides the voltage of 2.7V is 124uA.
In conjunction with the waveform of actual measurement, can find that the voltage providing at detection-phase PSE is very little again,More disturbed than being easier to, in non-insulating power supply system, more easily brought from AC network by user side especially50Hz power frequency component disturb.
Fig. 2 is that system end does not access serial interface and shows to the voltage starting signal of the PD chip detection end of PCIntention, Fig. 3 is that system end has access serial interface to show to the voltage starting signal of the PD chip detection end of PCIntention, can find out the interchange that user will be debugged to end in the time that design system termination enters serial ports from above two figure50Hz power frequency component interference fringe in electrical network is come in, and this will affect the inspection whether PSE exists PD equipmentSurvey judgement. Sometimes will enter testing process repeatedly, and then cause system normally not power on.
Summary of the invention
The deficiency existing for overcoming above-mentioned prior art, it is non-that the present invention's object is to provide one to meet POEThe serial ports design circuit of insulating power supply system, its can avoid accessing by serial ports due to system end designer orWhen person's display system power up, serial ports path will be the interference of the electrical network power frequency 50Hz on user side PCBring on the test side of PD chip, thereby cause PD to detect unsuccessfully, and then cause pcb board electrifying startup to loseThe problem of effect, can ensure that Serial Port Information is printed simultaneously complete.
For reaching above-mentioned purpose, the present invention proposes the serial ports design circuit of the non-insulating power supply system of a kind of POE of meeting,Comprise:
POE mu balanced circuit, for by the direct current DC of the polarity the unknown from POE equipment after rectificationThe High voltage output that polarization knows, and this High voltage output is converted to stable Voltage-output, in the future simultaneouslyFrom the data information transfer of Ethernet to circuit system;
Principal voltage generation module, for being converted to the required electricity of system by the burning voltage of POE mu balanced circuit outputPress, and make this voltage compared with the burning voltage time delay output of POE mu balanced circuit output;
Controllable switching array, for the voltage stabilizing output at this POE mu balanced circuit set up the initial stage by interface circuit withCircuit system, the isolation of this principal voltage generation module, and after the voltage stabilizing output of this POE mu balanced circuit is set up orThis circuit system is connected this interface circuit after starting with principal voltage generation module, this circuit system;
Interface circuit, for client communication or debugging;
Circuit system, for system control to complete product function.
Further, this POE mu balanced circuit comprises:
Network interface, is connected to rectifier bridge by unknown the polarity from POE equipment direct current DC, andData message is connected to this circuit system;
Rectifier bridge by exporting the input of POE voltage-stablizer after the unknown direct current DC of polarity rectification to, will simultaneouslyAfter detection signal rectification from POE equipment, export PD detection signal and be connected to POE voltage-stablizerTest side;
POE voltage-stablizer, for generation of stable output voltage to this principal voltage generation module and this gate-controlled switchArray.
Further, this network interface is RJ45 network interface.
Further, 1,2 pin in 8 pins of this RJ45 network interface is connected to form to plus or minusThe utmost point, is connected to form the negative or positive utmost point 3,6 pins, or the combined formation power supply of 4,5 and 7,8 pinLine channel.
Further, this principal voltage generation module comprises:
System voltage produces circuit, connects this POE output end of voltage stabilizer, for what POE voltage-stablizer was exportedBurning voltage is converted to system required voltage, and exports this circuit system power end and controllable switching array to;
Delay circuit, connects this POE output end of voltage stabilizer and this system voltage and produces circuit Enable Pin, controlsThis system voltage produces the stable electrical calendering of this POE voltage-stablizer output of system required voltage after circuit conversionIn time, exports.
Further, this system voltage generation circuit is DC/DC change-over circuit.
Further, this controllable switching array comprises gate-controlled switch and drive circuit thereof, and its data input pin connectsBe connected to the data output end of this circuit system, the output of this controllable switching array is connected to the electricity of this interface circuitSource and data-interface.
Further, this controllable switching array adopts relay or controllable silicon to realize isolation switching.
Further, this interface circuit adopts UART interface.
Further, this POE voltage-stablizer is PD chip conversion portion, by complete detection, classification, onElectricity is realized the power supply conversion of POE.
Compared with prior art, a kind of serial ports design circuit that meets the non-insulating power supply system of POE of the present invention existsBy before the power supply of RJ45 network interface, the serial ports of design end and the PC isolation of debugging end being disconnected, thereby firstEnsure the output of the 5V voltage of PD chip, so just can avoid because system end designer visits by serial portsAsk or when display system power up, serial ports path will be the electrical network power frequency 50Hz's on user side PCInterference is brought on the test side of PD chip, thereby causes PD to detect unsuccessfully, and then causes pcb board to power on openingThe moving problem losing efficacy, can ensure that Serial Port Information is printed simultaneously complete.
Brief description of the drawings
Fig. 1 is PSE by data to the circuit diagram to PD power supply;
Fig. 2 is that system end does not access serial interface and shows to the voltage starting signal of the PD chip detection end of PCIntention;
Fig. 3 is that system end has the voltage starting signal hint of access serial interface to the PD chip detection end of PCFigure;
Fig. 4 is the circuit diagram of a kind of serial ports design circuit that meets the non-insulating power supply system of POE of the present invention;
Fig. 5 is the schematic diagram of the POE mu balanced circuit of the specific embodiment of the invention;
Fig. 6 is the circuit diagram of the principal voltage generation module of the specific embodiment of the invention;
Fig. 7 is the circuit diagram of the controllable switching array of the specific embodiment of the invention.
Detailed description of the invention
Below by specific instantiation accompanying drawings embodiments of the present invention, art technologyPersonnel can understand other advantage of the present invention and effect easily by content disclosed in the present specification. The present inventionAlso can be implemented or be applied by other different instantiation, the every details in this description also can baseIn different viewpoints and application, under spirit of the present invention, carry out various modifications and change not deviating from.
Before explanation the present invention, first need to be appreciated that what design system end can be in AC network50Hz power frequency component disturbs and takes the powered input of PD test side to.
For this reason, first, on actual design circuit, adopt the Si3402-B-GM core of SiliconLab companySheet designs the non-isolation of a POE 5V out-put supply.
Between non-isolated power supply input and output, can directly or switch formation electric current by inner MOS returnsRoad, and metal-oxide-semiconductor inside all can be with diode in body, and this is mainly on circuit, to have reverse sense for preventingWhen raw voltage, for reverse induced potential provides path, avoid reverse induced potential to puncture metal-oxide-semiconductor, just thisIn individual, diode is introduced the 50Hz power frequency interference signals in user PC end AC network by serial interface, according to this thinking, the present invention has designed a kind of serial ports design that can meet the non-insulating power supply system of POECircuit.
Fig. 4 is the circuit signal of a kind of serial ports design circuit that meets the non-insulating power supply system of POE of the present inventionFigure. As shown in Figure 4, the serial ports design circuit of the non-insulating power supply system of a kind of POE of meeting of the present invention comprises POEMu balanced circuit 10, principal voltage generation module 20, controllable switching array 30, interface circuit 40 and system electricityRoad 50.
Wherein, POE mu balanced circuit 10 comprises RJ45 network interface, rectifier bridge and POE voltage-stablizer, forBy unknown polarity from POE equipment PSE direct current DC, after rectifier bridge rectification, polarization knowsHigh voltage output is as+48V, then by POE voltage-stablizer ,+48V High voltage output is converted to stable Voltage-outputAs+5V, simultaneously by the data information transfer from Ethernet to circuit system; Principal voltage generation module 20 wrapsDraw together delay circuit and system voltage and produce circuit, for the burning voltage output that POE mu balanced circuit 10 is exportedUnder the control of delay circuit, be converted to system required voltage as+3.3V, and make this voltage compared with POE mu balanced circuitThe burning voltage of 10 outputs postpones the time output that delay circuit is set; Controllable switching array 30 comprises controlled openingClose and drive circuit, set up the initial stage by interface circuit 40 for the voltage stabilizing output at POE mu balanced circuit 10Isolate with circuit system 50, principal voltage generation module 20, and build in the voltage stabilizing output of POE mu balanced circuit 10After vertical or circuit system 50 start after by interface circuit 40 and principal voltage generation module 20 and circuit system 50Be connected, in the present invention, gate-controlled switch is relay such as, can be also controllable silicon, but not as limit; ConnectMouth circuit 40 can be, but not limited to UART interface, for communicating by letter with client rs PC or debug, circuit system 50For system control to complete product function.
Unknown the polarity from POE equipment PSE direct current DC is connected to rectification by RJ45 network interfaceBridge, and data message is connected to circuit system 50, rectifier bridge is by output+48V after the unknown direct current DC of polarity rectificationTo the input of POE voltage-stablizer, simultaneously by defeated after the detection signal rectification from POE equipment PSEGo out PD detection signal and be connected to the test side of POE voltage-stablizer, the stable output that POE voltage-stablizer produces as+5V is connected to delay circuit, system voltage produces circuit and controllable switching array 30, and system voltage produces circuitIt is defeated that the required principal voltage of output system is connected to the power supply of circuit system 50 power ends and controllable switching array 30Enter end, the data input pin of controllable switching array 30 is connected to the data output end of circuit system 50, controlledThe output of switch arrays 30 is connected to power supply and the data-interface of interface circuit 40.
In the specific embodiment of the invention, for RJ45 network interface, 8 pipes of RJ45 network interfaceIn pin 1,2 link is just forming (or negative) utmost point, and 3,6 links are formed to negative (or just) utmost point, or 4,The combined formation of 5 and 7,8 pin supply line passage; For the PSE of a uncertain both positive and negative polarity power supply,Need a rectifier bridge device that the pattern rectification of input direct-current is fixed as to one at PD end, namely through rectificationThe both positive and negative polarity of the voltage of exporting after bridge has just been fixed up; POE voltage-stablizer is PD chip conversion portion, and it is mainThe power supply conversion that to want function be detection, classification, three processes that power on realize POE; Delay circuit isPower supply time delay enables part, and its major function is that the 5V voltage of PD conversion chip part output is carried out whereinTime delay on a channel path, delay time can be adjusted according to design circuit device, generally canTime delay is to 200ms, then gives by the high level of time delay output the DC direct current that low pressure 5V below turns 3.3V and turnChange the Enable Pin of chip, the moment that can control output 3.3V is later than 5V and supplies with continuing of controllable switching array belowIn the moment that electric power supply switches, can ensure that Serial Port Information is printed simultaneously complete; System voltage produces circuitFor low voltage DC turns DC part, its major function turns the needed 3.3V of cpu system plate for realizing 5V. It makesCan be subject to power supply time delay to enable part control by end; Circuit system is whole product function characteristic, is used for debuggingOr the Serial Port Information of display system start-up course just derives from circuit system; Controllable switching array 30 adopts and continuesElectrical equipment isolation is switched, its objective is ensure whole product before powering by RJ45 by the serial ports of design end withThe PC isolation of debugging end disconnects, and this point the present invention does not have power-up state to ensure by relay in acquiescence,Thereby first ensure the output of the 5V voltage of PD chip, so just can avoid due to system end designer belowAccess or when display system power up, serial ports path will be the electrical network work on user side PC by serial portsFrequently the interference of 50Hz is brought on the test side of PD chip, and this will cause PD to detect unsuccessfully, thereby causes PCBThe problem that plate electrifying startup lost efficacy; Interface circuit 40 adopts UART interface, is mainly used to debugging or showsThe Serial Port Information of system starting process.
Fig. 5 is the schematic diagram of the POE mu balanced circuit of the specific embodiment of the invention, and Fig. 6 is that the present invention is specifically realExecute the circuit diagram of routine principal voltage generation module, the gate-controlled switch battle array that Fig. 7 is the specific embodiment of the inventionThe circuit diagram of row. Particularly, delay chip U4 (MAX6820UT), resistance R 25-26, capacitor C 30-32Composition delay circuit, resistance R 20, R24 are used for connecting input and output to POE output and system voltage and produceThe control Enable Pin of circuit; DC/DC chip U3 (MP1470), capacitor C 24-C26, resistance R 21-R23,R18, inductance L 3, electric capacity DC1, C28-C29 composition system voltage produce circuit, resistance R 19 and capacitor C 27For compensation; Triode Q3, resistance R 27-R29, capacitor C 33 form the drive circuit of controllable switching array,K1-2 is controllable switching array; POE voltage stabilizing chip U2 (Si3402), capacitor C 10-C23, resistance R 11-R17,Rectifier bridge D1, D3, diode D2, inductance L 2, magnetic bead FB1 composition POE mu balanced circuit 10.
In sum, the serial ports design circuit of the non-insulating power supply system of a kind of POE of meeting of the present invention is passing throughBefore the power supply of RJ45 network interface, the serial ports of design end and the PC isolation of debugging end are disconnected, thereby first ensureThe output of the 5V voltage of PD chip, so just can avoid accessing by serial ports due to system end designer orWhen display system power up, serial ports path will be the interference fringe of the electrical network power frequency 50Hz on user side PCEnter on the test side of PD chip, thereby cause PD to detect unsuccessfully, and then cause pcb board electrifying startup to lose efficacyProblem, can ensure that Serial Port Information is printed complete simultaneously.
Any those skilled in the art all can be under spirit of the present invention and category, to above-described embodimentModify and change. Therefore, the scope of the present invention, should be as listed in claims.
Claims (10)
1. a serial ports design circuit that meets the non-insulating power supply system of POE, comprising:
POE mu balanced circuit, for by the direct current DC of the polarity the unknown from POE equipment after rectificationThe High voltage output that polarization knows, and this High voltage output is converted to stable Voltage-output, in the future simultaneouslyFrom the data information transfer of Ethernet to circuit system;
Principal voltage generation module, for being converted to the required electricity of system by the burning voltage of POE mu balanced circuit outputPress, and make this voltage compared with the burning voltage time delay output of POE mu balanced circuit output;
Controllable switching array, for the voltage stabilizing output at this POE mu balanced circuit set up the initial stage by interface circuit withCircuit system, the isolation of this principal voltage generation module, and after the voltage stabilizing output of this POE mu balanced circuit is set up orThis circuit system is connected this interface circuit after starting with principal voltage generation module, this circuit system;
Interface circuit, for client communication or debugging;
Circuit system, for system control to complete product function.
2. a kind of serial ports design circuit that meets the non-insulating power supply system of POE as claimed in claim 1,It is characterized in that, this POE mu balanced circuit comprises:
Network interface, is connected to rectifier bridge by unknown the polarity from POE equipment direct current DC, andData message is connected to this circuit system;
Rectifier bridge by exporting the input of POE voltage-stablizer after the unknown direct current DC of polarity rectification to, will simultaneouslyAfter detection signal rectification from POE equipment, export PD detection signal and be connected to POE voltage-stablizerTest side;
POE voltage-stablizer, for generation of stable output voltage to this principal voltage generation module and this gate-controlled switchArray.
3. a kind of serial ports design circuit that meets the non-insulating power supply system of POE as claimed in claim 2,It is characterized in that: this network interface is RJ45 network interface.
4. a kind of serial ports design circuit that meets the non-insulating power supply system of POE as claimed in claim 3,It is characterized in that: 1,2 pin in 8 pins of this RJ45 network interface is connected to form to the plus or minus utmost point,3,6 pins are connected to form to the negative or positive utmost point, or the combined formation of 4,5 and 7,8 pin supply linePassage.
5. a kind of serial ports design circuit that meets the non-insulating power supply system of POE as claimed in claim 2,It is characterized in that, this principal voltage generation module comprises:
System voltage produces circuit, connects this POE output end of voltage stabilizer, for what POE voltage-stablizer was exportedBurning voltage is converted to system required voltage, and exports this circuit system power end and controllable switching array to;
Delay circuit, connects this POE output end of voltage stabilizer and this system voltage and produces circuit Enable Pin, controlsThis system voltage produces the stable electrical calendering of this POE voltage-stablizer output of system required voltage after circuit conversionIn time, exports.
6. a kind of serial ports design circuit that meets the non-insulating power supply system of POE as claimed in claim 5,It is characterized in that: it is DC/DC change-over circuit that this system voltage produces circuit.
7. a kind of serial ports design circuit that meets the non-insulating power supply system of POE as claimed in claim 5,It is characterized in that, this controllable switching array comprises gate-controlled switch and drive circuit thereof, and its data input pin connectsTo the data output end of this circuit system, the output of this controllable switching array is connected to the power supply of this interface circuitAnd data-interface.
8. a kind of serial ports design circuit that meets the non-insulating power supply system of POE as claimed in claim 7,It is characterized in that: this controllable switching array adopts relay or controllable silicon to realize isolation switching.
9. a kind of serial ports design circuit that meets the non-insulating power supply system of POE as claimed in claim 1,It is characterized in that: this interface circuit adopts UART interface.
10. a kind of serial ports design circuit that meets the non-insulating power supply system of POE as claimed in claim 2,It is characterized in that: this POE voltage-stablizer is PD chip conversion portion, by completing detection, classification, powering onRealize the power supply conversion of POE.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610115138.5A CN105610586B (en) | 2016-03-01 | 2016-03-01 | A kind of serial ports design circuit for the non-isolated power supply system meeting Power over Ethernet |
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| CN201610115138.5A CN105610586B (en) | 2016-03-01 | 2016-03-01 | A kind of serial ports design circuit for the non-isolated power supply system meeting Power over Ethernet |
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| CN106100858A (en) * | 2016-08-06 | 2016-11-09 | 何明 | A kind of standard POE is integrated with forcing nonstandard POE by electricity power circuit |
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| CN112714005A (en) * | 2021-01-26 | 2021-04-27 | 深圳市玩视科技有限公司 | PD module and power supply system |
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| CN105610586B (en) | 2018-09-28 |
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