CN105609075A - Gray-scale voltage generation circuit and control method thereof, driving circuit, and display apparatus - Google Patents

Gray-scale voltage generation circuit and control method thereof, driving circuit, and display apparatus Download PDF

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Publication number
CN105609075A
CN105609075A CN201610053612.6A CN201610053612A CN105609075A CN 105609075 A CN105609075 A CN 105609075A CN 201610053612 A CN201610053612 A CN 201610053612A CN 105609075 A CN105609075 A CN 105609075A
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China
Prior art keywords
switch
data control
voltage
control switch
electric capacity
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CN201610053612.6A
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Chinese (zh)
Inventor
刘宝玉
孙志华
姚树林
张旭
张志豪
张洪林
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Priority to CN201610053612.6A priority Critical patent/CN105609075A/en
Publication of CN105609075A publication Critical patent/CN105609075A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0271Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention provides a gray-scale voltage generation circuit and a control method thereof, a driving circuit, and a display apparatus. The gray-scale voltage generation circuit comprises a reference voltage input end used for receiving input reference voltages and transmitting the reference voltages to a resistance conversion circuit; the resistance conversion circuit used for, according to first control signals of received pixel data, performing voltage division on the reference voltages to obtain first simulation voltages and second simulation voltages; and a capacitance conversion circuit used for controlling the first simulation voltages or the second simulation voltages to respectively charge multiple capacitors according to second control signals corresponding to the pixel data in a first time period, and in a second time period, cutting off the first simulation voltages and the second simulation voltages and controlling the multiple capacitors to discharge so as to obtain gray-scale voltages corresponding to the pixel data. The circuit provided by the invention can realize output of 255 gray-scale voltages, the chip occupied area is quite small, and the power consumption is quite small.

Description

Gray scale voltage generation circuit and control method thereof, drive circuit and display unit
Technical field
The present invention relates to drive circuit technical field, relate in particular to a kind of gray scale voltage generation circuitAnd control method, drive circuit and display unit.
Background technology
High image quality, volume are little, lightweight because having for liquid crystal display LCD, low voltage drive,The advantages such as low power consumption, are widely used. Wherein particularly tft liquid crystal showsDevice, because of the characteristic of its high display quality and low-consumption power, has almost occupied most market.
In order to show colourful picture, Thin Film Transistor-LCD demand motive circuitThe Gamma voltage that drives GTG to show is provided. Therefore Gamma voltage is concerning picture qualityMost important. Existing gamma produces in circuit, directly utilizes the mode of multiple electric resistance partial pressuresObtain 255 gray scale voltages, so, if gray scale voltage generation circuit all adopts electric resistance partial pressureMake drive circuit area occupied larger, cause chip area larger, and power consumption is higher.
Therefore, how to propose the gray scale voltage that a kind of area occupied is less and power consumption is less and produce electricityRoad becomes the problem of needing solution badly.
Summary of the invention
For the defect of prior art, the invention provides a kind of gray scale voltage generation circuit andControl method, drive circuit and display unit, can solve whole resistance that adopts in prior artThe gray scale voltage generation circuit of dividing potential drop makes circuit area occupied larger, causes chip area larger,And the problem that power consumption is higher.
First aspect, the invention provides a kind of gray scale voltage generation circuit, comprising: with reference to electricityPress input, resistance conversion circuit, electric capacity translation circuit and voltage output end;
Described reference voltage input terminal, is connected with described resistance conversion circuit, for receiving inputReference voltage, and described reference voltage is transferred to described resistance conversion circuit;
Described resistance conversion circuit, comprises the divider resistance of multiple series connection, for receiving a pixelData, divide described reference voltage according to the first control signal that described pixel data is correspondingPress, obtain the first analog voltage and the second analog voltage, and by described the first analog voltage and theTwo analog voltages transfer to described electric capacity translation circuit;
Described electric capacity translation circuit, comprises the electric capacity of multiple parallel connections, in the cycle very first timeIn, according to the first analog voltage described in the second control signal control corresponding to described pixel data orThe second analog voltage charges respectively to described multiple electric capacity; Within the second time cycle, cutThe input of disconnected described the first analog voltage and described the second analog voltage, controls described multiple electric capacityDischarge to obtain the gray scale voltage that described pixel data is corresponding, and described gray scale voltage is transferred toDescribed voltage output end.
Preferably, described pixel data is the input data of 8 bits;
Corresponding described first control signal of described input data of the first amount of bits;
Corresponding described second control signal of described input data of the second amount of bits;
Wherein, described the first amount of bits and described the second amount of bits sum are 8.
Preferably, described resistance conversion circuit comprises: multiple resistance, multiple switch, the first mouldIntend voltage output end and the second analog voltage output;
Multiple resistance, is series between described reference voltage input terminal and earth terminal;
Multiple switches, are connected to described multiple resistance and the first analog voltage output orBetween two analog voltage outputs; For disconnecting or closure according to described the first control signal, controlResistance number between the system described reference voltage input terminal of access and described the first analog voltage outputAmount, and access the resistance number between described reference voltage input terminal and the second analog voltage outputAmount, to export described the first analog voltage at described the first analog voltage output, and describedThe second analog voltage output is exported described the second analog voltage.
Preferably, described electric capacity translation circuit comprises: multiple charging capacitors, specific capacitance,Multiple clock switches and multiple data control switch;
Described multiple clock switch, is connected respectively with described multiple data control switches, usesIn within the described cycle very first time, access described the first analog voltage and described the second analog electricalPress, and described the second analog voltage is connected with described specific capacitance; And at described second o'clockBetween in the cycle, cut off the input of described the first analog voltage and described the second analog voltage, and,Described specific capacitance is connected respectively with described multiple charging capacitors, with described specific capacitanceThe described voltage output end output gray scale voltage connecting;
Described multiple data control switch, within the described cycle very first time, according to describedThe second control signal disconnects or is closed, so that described the first analog voltage or described second is simulatedVoltage is connected respectively with described multiple charging capacitors.
Preferably, described electric capacity translation circuit comprises: the first clock switch, second clockGauge tap, the 3rd clock switch, the first data control switch, the second Data Control are leftPass, the 3rd data control switch, the 4th data control switch, the 5th data control switch,Six data control switches, the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity;
Described the first analog voltage is inputted in one end of described the first clock switch, the other end withDescribed the first data control switch, described the 3rd data control switch, described the 5th Data ControlSwitch and described the 3rd clock switch connect respectively; One of described second clock gauge tapDescribed the second analog voltage of end input, the other end and described the second data control switch, described theFour data control switches, described the 6th data control switch and described the 4th electric capacity connect respectively;One end of described the 3rd clock switch is connected with described the first clock switch, the other endDivide with one end of described the 4th electric capacity, described second clock gauge tap and described voltage output endLian Jie not; The other end of described the 4th electric capacity is connected with earth terminal;
One end of one end of described the first data control switch and described the second data control switch is dividedBe not connected described first with described the first clock switch and described second clock gauge tapThe other end of data control switch is connected with the other end of described the second data control switch, simultaneouslyBe connected with one end of described the first electric capacity, the other end of described the first electric capacity is connected with earth terminal;One end of one end of described the 3rd data control switch and described the 4th data control switch respectively withDescribed the first clock switch and described second clock gauge tap connect, described the 3rd dataThe other end of gauge tap is connected with the other end of described the 4th data control switch, simultaneously with instituteOne end of stating the second electric capacity connects, and the other end of described the second electric capacity is connected with earth terminal; DescribedOne end of one end of the 5th data control switch and described the 6th data control switch is respectively with describedThe first clock switch and described second clock gauge tap connect, described the 5th Data ControlThe other end of switch is connected with the other end of described the 6th data control switch, simultaneously with described theOne end of three electric capacity connects, and the other end of described the 3rd electric capacity is connected with earth terminal.
Preferably, described the first clock switch and described second clock gauge tap homophase,Described the first clock switch and described the 3rd clock switch are anti-phase;
Described the first data control switch and described the second data control switch are anti-phase; The described the 3rdData control switch and described the 4th data control switch are anti-phase; Described the 5th data control switchAnti-phase with described the 6th data control switch.
Preferably, described the first electric capacity value is 4C, and described the second electric capacity value is 2C, described inThe 3rd electric capacity value is C, and described the 4th electric capacity value is C;
Correspondingly, the gray scale voltage VOUT of described voltage output end output is:
V O U T = ( 4 b 2 + 2 b 1 + b 0 ) ( V 1 - V 2 ) 8 + V 2
Wherein, C is default specific capacitance value, and V1 is described the first analog voltage, and V2 isTwo analog voltages, b2 represents the on off state of described the first data control switch: b2=0 represents outClose and disconnect, b2=1 represents switch closure, and b1 represents the switch shape of described the 3rd data control switchState: b1=0 represents that switch disconnects, and b1=1 represents switch closure, and b0 represents described the 5th dataThe on off state of gauge tap: b0=0 represents that switch disconnects, and b0=1 represents switch closure.
Second aspect, the invention provides a kind of control method of gray scale voltage generation circuit, instituteThe method of stating comprises:
Described reference voltage according to the first control signal corresponding to pixel data receiving to inputCarry out dividing potential drop, obtain the first analog voltage and the second analog voltage;
In the cycle very first time that is high level in the clock signal of clock end CLK, according to describedThe first analog voltage or described the second simulation described in the second control signal control corresponding to pixel dataVoltage charges respectively to multiple electric capacity;
In the clock signal of clock end CLK is low level the second time cycle, described in cut-outThe input of the first analog voltage and described the second analog voltage, controls described multiple capacitor discharge,To obtain the gray scale voltage that described pixel data is corresponding at voltage output end.
Preferably, described pixel data is the input data of 8 bits;
Corresponding described first control signal of described input data of the first amount of bits;
Corresponding described second control signal of described input data of the second amount of bits;
Wherein, described the first amount of bits and described the second amount of bits sum are 8.
The third aspect, the invention provides a kind of drive circuit, comprises described in above-mentioned any oneGray scale voltage generation circuit.
Fourth aspect, the invention provides a kind of display unit, comprises above-mentioned drive circuit.
As shown from the above technical solution, the present invention passes through resistance conversion circuit according to pixel data pairFirst control signal of answering is carried out dividing potential drop to the reference voltage of input, obtains two adjacent simulationsVoltage, and then two analog voltages are transferred to capacitance variations circuit, within the cycle very first time,Electric capacity translation circuit according to second control signal control the first analog voltage corresponding to pixel data orPerson's the second analog voltage charges respectively to multiple electric capacity, within the second time cycle, controls multipleCapacitor discharge, to obtain gray scale voltage at voltage output end. As can be seen here, the present invention is by 8 ratiosSpecial gray scale voltage generation circuit is divided into the resistance conversion electricity of the first amount of bits input Data ControlThe electric capacity translation circuit of road and the second amount of bits input Data Control, thus realize 255 ashesRank voltage, the area taking due to capacitance variations circuit is less, therefore very great Cheng of the present inventionDegree ground reduces chip area and reduces power consumption.
Brief description of the drawings
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, belowTo the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described, aobvious andEasily insight, the accompanying drawing in the following describes is only some embodiments of the present invention, for this areaThose of ordinary skill, is not paying under the prerequisite of creative work, can also be according to theseFigure obtains other accompanying drawing.
Fig. 1 is the structural representation of a kind of gray scale voltage generation circuit of providing of one embodiment of the inventionFigure;
Fig. 2 is the circuit diagram of a kind of resistance conversion circuit of providing of another embodiment of the present invention;
Fig. 3 is the circuit diagram of a kind of electric capacity translation circuit of providing of another embodiment of the present invention;
Fig. 4 is the control method of a kind of gray scale voltage generation circuit of providing of one embodiment of the inventionSchematic flow sheet.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, to the technical side in the embodiment of the present inventionCase is clearly and completely described, and obviously, described embodiment is only one of the present inventionDivide embodiment, instead of whole embodiment. Based on the embodiment in the present invention, this area is generalLogical technical staff is not making the every other embodiment obtaining under creative work prerequisite,All belong to the scope of protection of the invention.
Fig. 1 is the structural representation of a kind of gray scale voltage generation circuit in one embodiment of the invention,As shown in Figure 1, this gray scale voltage generation circuit comprises: reference voltage input terminal 101, resistance becomeChange circuit 102, electric capacity translation circuit 103 and voltage output end 104.
Described reference voltage input terminal 101, is connected with described resistance conversion circuit 102, for connecingReceive the reference voltage of input, and described reference voltage is transferred to described resistance conversion circuit 102;
Described resistance conversion circuit 102, comprises the divider resistance of multiple series connection, for receiving a picturePrime number certificate, carries out described reference voltage according to the first control signal that described pixel data is correspondingDividing potential drop, obtains the first analog voltage V1 and the second analog voltage V2, and by described the first simulationVoltage V1 and the second analog voltage V2 transfer to described electric capacity translation circuit 103;
Described electric capacity translation circuit 103, comprises the electric capacity of multiple parallel connections, in the week very first timeIn phase, according to the first analog voltage described in the second control signal control corresponding to described pixel dataV1 or the second analog voltage V2 charge respectively to described multiple electric capacity; In the second week timeIn phase, cut off the input of described the first analog voltage V1 and described the second analog voltage V2, controlMake described multiple capacitor discharge to obtain the gray scale voltage that described pixel data is corresponding, and described in inciting somebody to actionGray scale voltage transfers to described voltage output end 104.
In the present embodiment, described pixel data is the input data of 8 bits.
Thus, corresponding described the first control signal of the described input data of the first amount of bits; TheCorresponding described second control signal of described input data of two amount of bits.
Wherein, described the first amount of bits and described the second amount of bits sum are 8.
For instance, the first amount of bits is optional 5, and the second amount of bits optional 3. Particularly,High-order corresponding the first control signal of 5 bit input data, and 3 bit input data of low levelCorresponding the second control signal.
As can be seen here, in the present embodiment by resistance conversion circuit according to pixel data corresponding theOne control signal is carried out dividing potential drop to the reference voltage of input, obtains two adjacent analog voltages,And then two analog voltages are transferred to capacitance variations circuit, and within the cycle very first time, electric capacityTranslation circuit is according to second control signal control the first analog voltage corresponding to pixel data orTwo analog voltages charge respectively to multiple electric capacity, within the second time cycle, control multiple electric capacityElectric discharge, to obtain gray scale voltage at voltage output end. As can be seen here, the present invention is by 8 bitsGray scale voltage generation circuit is divided into the resistance conversion circuit and second of the first bit input Data ControlThe electric capacity translation circuit of bit input Data Control, thus realize 255 gray scale voltages, due toThe area that capacitance variations circuit takies is less, and therefore the present invention can reduce chip largelyArea and reduction power consumption.
Specifically, described resistance conversion circuit 102 comprises: multiple resistance, multiple switch,The first analog voltage output and the second analog voltage output;
Multiple resistance, is series between described reference voltage input terminal 101 and earth terminal.
Multiple switches, are connected to described multiple resistance and the first analog voltage output orBetween two analog voltage outputs; For disconnecting or closure according to described the first control signal, controlResistance number between the system described reference voltage input terminal of access and described the first analog voltage outputAmount, and access the resistance number between described reference voltage input terminal and the second analog voltage outputAmount, to export described the first analog voltage at described the first analog voltage output, and describedThe second analog voltage output is exported described the second analog voltage.
As can be seen here, multiple resistance is series between reference voltage input terminal and earth terminal, everyBetween two resistance, resistance and ground, output has multiple voltage, according to the first control signal, determinesThe value of V1 and V2, exports respectively two adjacent analog voltages to first analog voltage outputEnd and the second analog voltage output.
Specifically, described electric capacity translation circuit 103 comprises: multiple charging capacitors, a listPosition electric capacity, multiple clock switch and multiple data control switch;
Described multiple clock switch, is connected respectively with described multiple data control switches, usesIn within the described cycle very first time, access described the first analog voltage and described the second analog electricalPress, and described the second analog voltage is connected with described specific capacitance; And at described second o'clockBetween in the cycle, cut off the input of described the first analog voltage and described the second analog voltage, and,Described specific capacitance is connected respectively with described multiple charging capacitors, with described specific capacitanceThe described voltage output end output gray scale voltage connecting.
Described multiple data control switch, within the described cycle very first time, according to describedThe second control signal disconnects or is closed, so that described the first analog voltage or described second is simulatedVoltage is connected respectively with described multiple charging capacitors.
In order to be illustrated more clearly in technical scheme of the present invention, below by a concrete enforcementExample illustrates a kind of gray scale voltage generation circuit. In the present embodiment, described pixel data is 8The input data of bit, high-order corresponding the first control signal of 5 bit input data, to controlResistance conversion circuit, and corresponding second control signal of 3 bit input data of low level, to controlElectric capacity translation circuit.
In the present embodiment, as shown in Figure 2, resistance conversion circuit is included in reference voltage input terminal33 resistance R 1 of connecting between Vref and earth terminal, R2, R3 ..., R33, canExport 32 magnitudes of voltage, comprise 32 voltage output ends, and each voltage output end respectivelyBe connected with V1 and V2 by two switches, as shown in Figure 2, first Voltage-output passes throughK1a is connected with the first analog voltage output, is connected with the second analog electrical pressure side by K1b,Second Voltage-output is connected with the first analog voltage output by K2a, by K2b andTwo analog electrical pressure sides connect, and m Voltage-output is by Kma and the first analog voltage outputConnect, be connected with the second analog electrical pressure side by Kmb etc. 5 high-order bit input dataCorresponding the first control signal, determines the first analog voltage and the second analog voltage exported,Thereby disconnect or Closing Switch, select defeated to the first analog voltage output and the second analog voltageGo out termination and enter the particular location in bleeder circuit, to export the first analog voltage V1 and the second simulationVoltage V2.
It should be noted that, if consider positive polarity and the negative polarity of gray scale voltage, resistance conversionCircuit needs the first control signal corresponding to 6 bit input data, carrys out controlling resistance translation circuit,The resistance of now connecting between reference voltage input terminal Vref and earth terminal is correspondingly increased to 65Individual, there are 64 Voltage-outputs, its principle is identical with above-mentioned principle, does not repeat them here.
In the present embodiment, as shown in Figure 3, described electric capacity translation circuit comprises: first o'clock clockSwitch CLK1 processed, second clock gauge tap CLK2, the 3rd clock switch CLK3,The first data control switch K1, the second data control switch K2, the 3rd data control switch K3,The 4th data control switch K4, the 5th data control switch K5, the 6th data control switch K6,The first capacitor C 1, the second capacitor C 2, the 3rd capacitor C 3, the 4th capacitor C 4.
As shown in Figure 3, one end of described the first clock switch CLK1 inputs described firstAnalog voltage V1, the other end and described the first data control switch K1, described the 3rd data controlK switch 3 processed, described the 5th data control switch K5 and described the 3rd clock switch are respectivelyCLK3 connects; Described the second analog electrical is inputted in one end of described second clock gauge tap CLK2Press V2, the other end and described the second data control switch K2, described the 4th data control switchK4, described the 6th data control switch K6 and described the 4th capacitor C 4 connect respectively; DescribedOne end of three clock switch CLK3 is connected with described the first clock switch CLK1,One end of the other end and described the 4th capacitor C 4, described second clock gauge tap CLK2 and instituteStating voltage output end VOUT connects respectively; The other end of described the 4th capacitor C 4 and earth terminalConnect;
One end of described the first data control switch K1 and described the second data control switch K2'sOne end respectively with described the first clock switch CLK1 and described second clock gauge tapCLK2 connects, the other end of described the first data control switch K1 and described the second Data ControlThe other end of K switch 2 connects, and is connected with one end of described the first capacitor C 1 simultaneously, and described theThe other end of one capacitor C 1 is connected with earth terminal; One end of described the 3rd data control switch K3And one end of described the 4th data control switch K4 respectively with described the first clock switchCLK1 and described second clock gauge tap CLK2 connect, described the 3rd data control switchThe other end of K3 is connected with the other end of described the 4th data control switch K4, simultaneously with describedOne end of the second capacitor C 2 connects, and the other end of described the second capacitor C 2 is connected with earth terminal;One end of one end of described the 5th data control switch K5 and described the 6th data control switch K6Respectively with described the first clock switch CLK1 and described second clock gauge tap CLK2Connect the other end of described the 5th data control switch K5 and described the 6th data control switchThe other end of K6 connects, and is connected described the 3rd electricity simultaneously with one end of described the 3rd capacitor C 3The other end that holds C3 is connected with earth terminal.
Specifically, the control method of above-mentioned electric capacity translation circuit is: at CLK=1 (clock letterWhile number being high level) the cycle very first time in, CLK1 closure, CLK2 closure, CLK3Disconnect, and disconnected according to the input Data Control K1 of low 3, K2, K3, K4, K5, K6Open or closure, for example low three are followed successively by 001 by a high position to low level, control K1 disconnection, K2Closure, K3 disconnection, K4 closure, K5 closure, K6 disconnect, and now, V2 gives by K2C1 charging, V2 charges to C2 by K4, and V1 charges to C1 by K5, and V2 is directCharge to C4; Within the second time cycle of CLK=0 (when clock signal is low level),CLK1 disconnects, and CLK2 disconnects, CLK3 closure, now, electric charge C1, C2, C3,Between C4, redistribute, and export gray scale voltage corresponding to pixel data of 8bit at VOUT place.
In the present embodiment, described the first clock switch CLK1 and described second clock controlSwitch CLK2 homophase, described the first clock switch CLK1 and described the 3rd clock controlSwitch CLK3 is anti-phase.
Will be understood that, described the first clock switch CLK1, described second clock control are openedClosing CLK2 and described the 3rd clock switch CLK3 all controls by clock signal.For instance, when clock signal is high level, described the first clock switch CLK1, described inSecond clock gauge tap CLK2 is all closed, and the 3rd clock switch CLK3 disconnects;When clock signal is low level, described the first clock switch CLK1, described second clock controlSwitch CLK2 processed all disconnects, and the 3rd clock switch CLK3 closure.
In the present embodiment, described the first data control switch K1 and described the second data control switchK2 is anti-phase; Described the 3rd data control switch K3 and described the 4th data control switch K4 are anti-Phase; Described the 5th data control switch K5 and described the 6th data control switch K6 are anti-phase. ToolBody ground, when the first data control switch K1 disconnects, the second data control switch K2 closure; TheWhen one data control switch K1 is closed, the second data control switch K2 disconnects. The 3rd data controlWhen K switch 3 processed disconnects, the 4th data control switch K4 closure; The 3rd data control switchWhen K3 is closed, the second data control switch K4 disconnects. The 5th data control switch K5 disconnectsTime, the 6th data control switch K6 closure; When the 5th data control switch K5 is closed, the 6thData control switch K6 disconnects.
It should be noted that, the first data control switch K1, the second data control switch K2,The 3rd data control switch K3, the 4th data control switch K4, the 5th data control switch K5,The 6th data control switch K6 all controls according to the input data of low level 3 bits.
For instance, the input data of low level 3 bits from a high position to low level, be followed successively by b2, b1,B0, controls the first data control switch K1 and the second data control switch K2, b2=0 according to b2Time, K1 disconnects, K2 closure, and when b2=1, K1 closure, K2 disconnects; Control the according to b1Three data control switch K3 and the 4th data control switch K4, when b1=0, K3 disconnects, K4Closure, when b1=1, K3 closure, K4 disconnects; Control the 5th data control switch according to b0K5 and the 6th data control switch K6, when b0=0, K5 disconnects, K6 closure, when b0=1,K5 closure, K6 disconnects.
In the present embodiment, described the first electric capacity value C1 is 4C, described the second capacitor C 2 valuesFor 2C, described the 3rd capacitor C 3 values are C, and described the 4th capacitor C 4 values are C.
Can obtain according to principle of charge conservation:
V O U T = 1 C × [ 4 C ( b 2 · V 1 + b 2 · V 2 ) + 2 C ( b 1 · V 1 + / b 1 · V 2 ) + C ( b 0 · V 1 + b 0 · V 2 ) + C V 2 ] = ( 4 b 2 + 2 b 1 + b 0 ) ( V 1 - V 2 ) 8 + V 2
Correspondingly, the gray scale voltage VOUT of described voltage output end output is:
V O U T = ( 4 b 2 + 2 b 1 + b 0 ) ( V 1 - V 2 ) 8 + V 2
From formula, can see that electric capacity translation circuit can be by the adjacent mould of resistance conversion circuit outputIntend voltage V1 and V2 voltage and be divided into 8 parts, and therefrom select one to export as output voltage.And the exportable 32 groups of V1 of resistance variations circuit and V2, for every group of V1 and the conversion of V2 electric capacityCircuit can obtain 8 different gray scale voltages, altogether can realize 255 gray scale voltages.
Wherein, C is default specific capacitance value, and V1 is described the first analog voltage, and V2 isTwo analog voltages, b2 represents opening of described the first data control switch, the second data control switchOff status: b2=0 represents that the first data control switch disconnects, the second data control switch closure,B2=1 represents the first data control switch closure, and the second data control switch disconnects; B1 represents instituteState the on off state of the 3rd data control switch, the 4th data control switch: b1=0 represents the 3rdData control switch disconnects, the 4th data control switch closure, and b1=1 represents the 3rd Data ControlSwitch closure, the 4th data control switch disconnects; B0 represent described the 5th data control switch,The on off state of the 6th data control switch: b0=0 represents that the 5th data control switch disconnects, theSix data control switch closures, b0=1 represents the 5th data control switch closure, the 6th data controlSwitch processed disconnects.
As can be seen here, resistance conversion circuit can obtain two adjacent simulations according to the data of 5bitVoltage V1 and V2, be then transferred to them electric capacity translation circuit. Electric capacity translation circuit basis3bit data are exported one of them analog voltage between these two adjacent voltage V1 and V2. AsElectric capacity translation circuit shown in Fig. 3, mainly by three electric capacity 4C, 2C, C and a unit electricityHolding C forms. CLK is the not overlapping clock control signal of two-phase. Charge cycle CLK=1 (timeWhen clock signal is high level), three capacitor C, 2C, 4C respectively according to input data b0, b1,B2 connects V1 or V2. Discharge cycle CLK=0 (when clock signal is low level), firstClock switch and second clock gauge tap all disconnect, and the first clock switch closure,Electric charge converts output voltage VO UT to after redistributing.
For instance, produce gray scale voltage V2+ (V1-V2)/8, i.e. b2=0, b1=0, b0=1,Only need be in the time of CLK=1, K switch 5, K4, K2 closure, K switch 6, K3, K1 breakOpen, when CLK=0, can obtain this gray scale voltage. If produce gray scale voltage V2+7 (V1-V2)/8,Be b2=1, b1=1, b0=1, only need be in the time of CLK=1, K switch 5, K3, K1 closure,K switch 6, K4, K2 open, and when CLK=0, can obtain this gray scale voltage. In like manner, canRealize other gray scale voltages, do not repeat them here.
As can be seen here, in the present embodiment, input corresponding divider resistance string and the 3bit of data according to 5bitElectric capacity translation circuit corresponding to input data can be realized 255 gray scale voltages. With prior artDivider resistance string corresponding to middle 8bit input data compared, the resistor voltage divider circuit in the present embodimentIn required resistance obviously reduce, and electric capacity translation circuit area occupied corresponding to 3bit input dataAlso less, on the whole, reduce largely the area of circuit, thereby reduced coreThe area of sheet, and power consumption has also had reduction significantly.
Fig. 4 is that one in one embodiment of the invention is based on the arbitrary gray scale voltage of above-described embodiment kindThe schematic flow sheet that produces the control method of circuit, as shown in Figure 4, described method comprises as followsStep:
S1: the reference voltage according to the first control signal corresponding to pixel data receiving to inputCarry out dividing potential drop, obtain the first analog voltage and the second analog voltage;
S2: in the cycle very first time that is high level in the clock signal of clock end CLK, according toThe first analog voltage or described second described in the second control signal control corresponding to described pixel dataAnalog voltage charges respectively to multiple electric capacity;
S3: in the clock signal of clock end CLK is low level the second time cycle, cut offThe input of described the first analog voltage and described the second analog voltage, controls described multiple electric capacity and putsElectricity, to obtain the gray scale voltage that described pixel data is corresponding.
In the present embodiment, described pixel data is the input data of 8 bits;
Corresponding described first control signal of described input data of the first amount of bits;
Corresponding described second control signal of described input data of the second amount of bits;
Wherein, described the first amount of bits and described the second amount of bits sum are 8.
For instance, the first amount of bits is that 5, the second amount of bits are 3, high 5 input numbersAccording to corresponding the first control signal, low 3 corresponding the second control signals of input data. To referenceCarry out the series resistance in the resistor voltage divider circuit of dividing potential drop, obtain according to the input data dividing potential drop of 5bitObtain the first analog voltage and the second analog voltage; In the circuit that electric capacity is discharged and recharged: fillingElectricity the cycle in, according to the multiple electric capacity of input Data Control of 3bit respectively with the first analog voltage orThe second analog voltage connects; In discharge cycle, the first analog voltage and the second analog electrical breakOpen income, electric charge is redistributed and is obtained required gray scale voltage. In the present embodiment, bleeder circuit only needsCarry out dividing potential drop according to the input data of 5bit, required resistance number is significantly less than according to 8bit defeatedEnter data and carry out the resistance number in the resistor voltage divider circuit of dividing potential drop, and 3bit input data pairThe electric capacity translation circuit area occupied of answering is less, thereby has reduced chip area footprints, and reducesPower consumption.
For embodiment of the method, because it is substantially similar to device embodiment, so describeFairly simple, relevant part is referring to the part explanation of device embodiment.
Based on same inventive concept, the embodiment of the present invention provide one comprise above-mentioned any oneThe drive circuit of gray scale voltage generation circuit. This drive circuit is owing to comprising above-mentioned any one ashRank voltage generation circuit, thereby can solve same technical problem, and obtain identical technologyEffect.
Based on same inventive concept, the embodiment of the present invention provide one comprise above-mentioned any oneThe display unit of drive circuit. This display unit can be: display panels, mobile phone, flatPlate computer, television set, notebook computer, DPF, navigator etc. are any has liquid crystalShow product or the parts of function. This display unit is owing to comprising above-mentioned any one drive circuitDisplay unit, thereby can solve same technical problem, and obtain identical technique effect.
In description of the invention, it should be noted that, term " on ", the instruction such as D scoreOrientation or position relationship are based on orientation shown in the drawings or position relationship, are only for the ease of retouchingState the present invention and simplified characterization, instead of device or the element of instruction or hint indication must haveSpecific orientation, with specific orientation structure and operation, therefore can not be interpreted as of the present inventionRestriction. Unless otherwise clearly defined and limited, term " installation ", " being connected ", " connection "Should be interpreted broadly, for example, can be to be fixedly connected with, and can be also to removably connect, or oneBody ground connects; Can be mechanical connection, can be also electrical connection; Can be to be directly connected, alsoCan indirectly be connected by intermediary, can be the connection of two element internals. For abilityThe those of ordinary skill in territory, can understand above-mentioned term in the present invention as the case may beConcrete meaning.
Also it should be noted that, in this article, the relational terms such as the first and second gradesOnly be used for an entity or operation and another entity or operating space to separate, and differProvisioning request or imply these entities or operation between there is the relation of any this reality or suitableOrder. And term " comprises ", " comprising " or its any other variant are intended to contain non-exclusiveComprising of property, thus the process, method, article or the equipment that make to comprise a series of key elements are notOnly comprise those key elements, but also comprise other key elements of clearly not listing, or also wrapDraw together the key element intrinsic by this process, method, article or equipment. In not more restrictionsSituation under, the key element being limited by statement " comprising ... ", and described in being not precluded within and comprisingIn process, method, article or the equipment of key element, also there is other identical element.
Above embodiment only, in order to technical scheme of the present invention to be described, is not intended to limit; AlthoughWith reference to previous embodiment, the present invention is had been described in detail those of ordinary skill in the artBe to be understood that: its technical scheme that still can record aforementioned each embodiment is modified,Or part technical characterictic is wherein equal to replacement; And these amendments or replacement, noMake the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.

Claims (11)

1. a gray scale voltage generation circuit, is characterized in that, comprising: reference voltage input terminal,Resistance conversion circuit, electric capacity translation circuit and voltage output end;
Described reference voltage input terminal, is connected with described resistance conversion circuit, for receiving inputReference voltage, and described reference voltage is transferred to described resistance conversion circuit;
Described resistance conversion circuit, comprises the divider resistance of multiple series connection, for receiving a pixelData, divide described reference voltage according to the first control signal that described pixel data is correspondingPress, obtain the first analog voltage and the second analog voltage, and by described the first analog voltage and theTwo analog voltages transfer to described electric capacity translation circuit;
Described electric capacity translation circuit, comprises the electric capacity of multiple parallel connections, in the cycle very first timeIn, according to the first analog voltage described in the second control signal control corresponding to described pixel data orThe second analog voltage charges respectively to described multiple electric capacity; Within the second time cycle, cutThe input of disconnected described the first analog voltage and described the second analog voltage, controls described multiple electric capacityDischarge to obtain the gray scale voltage that described pixel data is corresponding, and described gray scale voltage is transferred toDescribed voltage output end.
2. gray scale voltage generation circuit according to claim 1, is characterized in that, described inPixel data is the input data of 8 bits;
Corresponding described first control signal of described input data of the first amount of bits;
Corresponding described second control signal of described input data of the second amount of bits;
Wherein, described the first amount of bits and described the second amount of bits sum are 8.
3. gray scale voltage generation circuit according to claim 1, is characterized in that, described inResistance conversion circuit comprises: multiple resistance, multiple switch, the first analog voltage output andTwo analog voltage outputs;
Multiple resistance, is series between described reference voltage input terminal and earth terminal;
Multiple switches, are connected to described multiple resistance and the first analog voltage output orBetween two analog voltage outputs; For disconnecting or closure according to described the first control signal, controlResistance number between the system described reference voltage input terminal of access and described the first analog voltage outputAmount, and access the resistance number between described reference voltage input terminal and the second analog voltage outputAmount, to export described the first analog voltage at described the first analog voltage output, and describedThe second analog voltage output is exported described the second analog voltage.
4. gray scale voltage generation circuit according to claim 1, is characterized in that, described inElectric capacity translation circuit comprises: multiple charging capacitors, specific capacitance, a multiple clock control are openedClose and multiple data control switch;
Described multiple clock switch, is connected respectively with described multiple data control switches, usesIn within the described cycle very first time, access described the first analog voltage and described the second analog electricalPress, and described the second analog voltage is connected with described specific capacitance; And at described second o'clockBetween in the cycle, cut off the input of described the first analog voltage and described the second analog voltage, and,Described specific capacitance is connected respectively with described multiple charging capacitors, with described specific capacitanceThe described voltage output end output gray scale voltage connecting;
Described multiple data control switch, within the described cycle very first time, according to describedThe second control signal disconnects or is closed, so that described the first analog voltage or described second is simulatedVoltage is connected respectively with described multiple charging capacitors.
5. gray scale voltage generation circuit according to claim 4, is characterized in that, described inElectric capacity translation circuit comprises: the first clock switch, second clock gauge tap, the 3rd o'clockClock gauge tap, the first data control switch, the second data control switch, the 3rd Data ControlSwitch, the 4th data control switch, the 5th data control switch, the 6th data control switch,The first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity;
Described the first analog voltage is inputted in one end of described the first clock switch, the other end withDescribed the first data control switch, described the 3rd data control switch, described the 5th Data ControlSwitch and described the 3rd clock switch connect respectively; One of described second clock gauge tapDescribed the second analog voltage of end input, the other end and described the second data control switch, described theFour data control switches, described the 6th data control switch and described the 4th electric capacity connect respectively;One end of described the 3rd clock switch is connected with described the first clock switch, the other endDivide with one end of described the 4th electric capacity, described second clock gauge tap and described voltage output endLian Jie not; The other end of described the 4th electric capacity is connected with earth terminal;
One end of one end of described the first data control switch and described the second data control switch is dividedBe not connected described first with described the first clock switch and described second clock gauge tapThe other end of data control switch is connected with the other end of described the second data control switch, simultaneouslyBe connected with one end of described the first electric capacity, the other end of described the first electric capacity is connected with earth terminal;One end of one end of described the 3rd data control switch and described the 4th data control switch respectively withDescribed the first clock switch and described second clock gauge tap connect, described the 3rd dataThe other end of gauge tap is connected with the other end of described the 4th data control switch, simultaneously with instituteOne end of stating the second electric capacity connects, and the other end of described the second electric capacity is connected with earth terminal; DescribedOne end of one end of the 5th data control switch and described the 6th data control switch is respectively with describedThe first clock switch and described second clock gauge tap connect, described the 5th Data ControlThe other end of switch is connected with the other end of described the 6th data control switch, simultaneously with described theOne end of three electric capacity connects, and the other end of described the 3rd electric capacity is connected with earth terminal.
6. gray scale voltage generation circuit according to claim 5, is characterized in that, described inThe first clock switch and described second clock gauge tap homophase, described the first clock controlSwitch and described the 3rd clock switch are anti-phase;
Described the first data control switch and described the second data control switch are anti-phase; The described the 3rdData control switch and described the 4th data control switch are anti-phase; Described the 5th data control switchAnti-phase with described the 6th data control switch.
7. gray scale voltage generation circuit according to claim 5, is characterized in that, described inThe first electric capacity value is 4C, and described the second electric capacity value is 2C, and described the 3rd electric capacity value is C,Described the 4th electric capacity value is C;
Correspondingly, the gray scale voltage VOUT of described voltage output end output is:
V O U T = ( 4 b 2 + 2 b 1 + b 0 ) ( V 1 - V 2 ) 8 + V 2
Wherein, C is default specific capacitance value, and V1 is described the first analog voltage, and V2 isTwo analog voltages, b2 represents the on off state of described the first data control switch: b2=0 represents outClose and disconnect, b2=1 represents switch closure, and b1 represents the switch shape of described the 3rd data control switchState: b1=0 represents that switch disconnects, and b1=1 represents switch closure, and b0 represents described the 5th dataThe on off state of gauge tap: b0=0 represents that switch disconnects, and b0=1 represents switch closure.
8. a control method for gray scale voltage generation circuit, is characterized in that, described method bagDraw together:
Described reference voltage according to the first control signal corresponding to pixel data receiving to inputCarry out dividing potential drop, obtain the first analog voltage and the second analog voltage;
In the cycle very first time that is high level in the clock signal of clock end CLK, according to describedThe first analog voltage or described the second simulation described in the second control signal control corresponding to pixel dataVoltage charges respectively to multiple electric capacity;
In the clock signal of clock end CLK is low level the second time cycle, described in cut-outThe input of the first analog voltage and described the second analog voltage, controls described multiple capacitor discharge,To obtain the gray scale voltage that described pixel data is corresponding at voltage output end.
9. control method according to claim 8, is characterized in that, described pixel dataBe the input data of 8 bits;
Corresponding described first control signal of described input data of the first amount of bits;
Corresponding described second control signal of described input data of the second amount of bits;
Wherein, described the first amount of bits and described the second amount of bits sum are 8.
10. a drive circuit, is characterized in that, comprises as arbitrary in claim 1 to 7Gray scale voltage generation circuit described in.
11. 1 kinds of display unit, is characterized in that, comprise driving as claimed in claim 10Circuit.
CN201610053612.6A 2016-01-26 2016-01-26 Gray-scale voltage generation circuit and control method thereof, driving circuit, and display apparatus Pending CN105609075A (en)

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Application publication date: 20160525