CN105609070A - Display apparatus and driving method thereof - Google Patents
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- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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Abstract
本发明提供了一种显示装置及其驱动方法,涉及显示技术领域,显示装置可避免因负载变化引起驱动电路模块输出扫描信号电压降低导致栅压降低的问题。显示装置包括多条栅线以及至少两个驱动电路模块,至少两个驱动电路模块包括第一和第二驱动电路模块,第一驱动电路模块信号输出端与连续排列的n1条栅线第一端电连接;第二驱动电路模块与连续排列的n2条栅线第二端电连接,其输出起始控制端与n2条栅线中按扫描顺序排列的第一条栅线电连接,其信号输出端与n2条栅线中剩下的n2-1条电连接,n1条栅线按扫描顺序排在最后的m1条栅线与n2条栅线按扫描顺序排在最前的m1条栅线为相同栅线,2≤m1<n1、n2。本发明适用显示装置的制作。
The present invention provides a display device and a driving method thereof, which relate to the field of display technology. The display device can avoid the problem of a decrease in the voltage of a scan signal output by a drive circuit module due to a change in load, resulting in a decrease in gate voltage. The display device includes a plurality of gate lines and at least two drive circuit modules, the at least two drive circuit modules include a first drive circuit module and a second drive circuit module, and the signal output terminal of the first drive circuit module is first connected to n1 gate lines arranged continuously. Terminals are electrically connected; the second drive circuit module is electrically connected to the second end of the n 2 gate lines arranged continuously, and its output start control terminal is electrically connected to the first gate line arranged in the scanning order among the n 2 gate lines, Its signal output terminal is electrically connected to the remaining n 2 -1 of the n 2 gate lines, and the n 1 gate lines are arranged in the last scanning order, and the m 1 gate lines are arranged in the scanning order with the n 2 gate lines The first m 1 grid lines are the same grid lines, 2≤m 1 <n 1 , n 2 . The present invention is applicable to the manufacture of display devices.
Description
技术领域technical field
本发明涉及显示技术领域,尤其涉及一种显示装置及其驱动方法。The present invention relates to the field of display technology, in particular to a display device and a driving method thereof.
背景技术Background technique
LCD(LiquidCrystalDisplay,液晶显示器)已经广泛应用于显示领域中。LCD一般包括对盒的彩膜基板和阵列基板、以及位于阵列基板和彩膜基板之间的液晶。LCD (Liquid Crystal Display, liquid crystal display) has been widely used in the field of display. LCD generally includes a color filter substrate and an array substrate in a box, and a liquid crystal located between the array substrate and the color filter substrate.
参考图1所示,阵列基板包括多条栅线1、多条数据线2和多个子像素3,其中,每个子像素3包括TFT(ThinFilmTransistor,薄膜晶体管)31和像素电极32,TFT31的栅极G与栅线1相连,源极S与数据线2相连,漏极D与像素电极32相连。LCD的显示原理为:在一个扫描周期内,栅线1逐行向TFT31的栅极G提供扫描信号以打开TFT31,同时数据线2向TFT31的源极S提供数据信号,这样通过TFT31的漏极D向像素电极32写入数据信号,从而实现一帧画面的显示。1, the array substrate includes a plurality of gate lines 1, a plurality of data lines 2 and a plurality of sub-pixels 3, wherein each sub-pixel 3 includes a TFT (ThinFilmTransistor, thin film transistor) 31 and a pixel electrode 32, the gate of TFT31 G is connected to the gate line 1 , the source S is connected to the data line 2 , and the drain D is connected to the pixel electrode 32 . The display principle of LCD is: in a scanning period, the gate line 1 provides scanning signals to the gate G of the TFT31 row by row to turn on the TFT31, and at the same time, the data line 2 provides data signals to the source S of the TFT31, so that through the drain of the TFT31 D writes a data signal into the pixel electrode 32 to realize the display of one frame of picture.
由于高分辨率和窄边框的要求,参考图2所示,通常在阵列基板的栅线1的一端还集成有多个栅极驱动电路模块4和多条连接线5,每个栅极驱动电路模块4通过连接线5与栅线1实现电连接,以向栅线1提供扫描信号。Due to the requirements of high resolution and narrow borders, as shown in FIG. 2, a plurality of gate drive circuit modules 4 and a plurality of connection lines 5 are usually integrated at one end of the gate line 1 of the array substrate. Each gate drive circuit module The module 4 is electrically connected to the gate line 1 through the connection line 5 to provide scanning signals to the gate line 1 .
在显示同一灰阶画面时,各行像素电极需要写入电压相同的数据信号。但是,参考图2所示,当第一个栅极驱动电路模块完成向第1至N条栅线提供扫描信号后,第二个栅极驱动电路模块开始向第N+1至2N条栅线提供扫描信号。在向第N+1条栅线提供扫描信号的前后,第二个栅极驱动电路模块所带负载发生变化,从而会输出实际电压值比预期值略低的扫描信号,则第N+1条栅线的电压降低,进而使得与第N+1条栅线相连的TFT的栅极所获取的电压降低。而栅极电压降低会延长TFT的打开时间,缩短数据线向像素电极写入数据信号的时间,进而导致像素电极的电压不能达到预期值。When displaying the same grayscale image, the pixel electrodes of each row need to be written with data signals having the same voltage. However, as shown in FIG. 2, when the first gate drive circuit module completes providing scan signals to the 1st to Nth gate lines, the second gate drive circuit module starts to provide scanning signals to the N+1th to 2Nth gate lines. Provides scan signal. Before and after the scan signal is supplied to the N+1th gate line, the load carried by the second gate drive circuit module changes, thus outputting a scan signal whose actual voltage value is slightly lower than the expected value, then the N+1th gate line The voltage of the gate line decreases, thereby reducing the voltage obtained by the gate of the TFT connected to the N+1th gate line. However, the reduction of the gate voltage will prolong the turn-on time of the TFT and shorten the time for the data line to write data signals to the pixel electrodes, thus causing the voltage of the pixel electrodes to fail to reach an expected value.
那么,第N+1条栅线驱动的像素电极的电压比第N条栅线驱动的像素电极的电压小。而栅极驱动电路模块调整输出电压需要一定时间,因此,从第N+1条栅线数起,连续分布的十几条栅线驱动的像素电极的电压均比第N条栅线驱动的像素电极的电压小,这样在相邻两个栅极驱动电路模块所驱动的栅线的交界处极易产生交界线,造成二分屏问题,从而降低显示效果。Then, the voltage of the pixel electrode driven by the N+1th gate line is lower than the voltage of the pixel electrode driven by the Nth gate line. However, it takes a certain time for the gate drive circuit module to adjust the output voltage. Therefore, starting from the N+1th gate line, the voltages of the pixel electrodes driven by more than a dozen grid lines distributed continuously are higher than those of the pixels driven by the Nth gate line. The voltage of the electrodes is small, so a boundary line is easily formed at the junction of the gate lines driven by two adjacent gate drive circuit modules, causing a two-split screen problem, thereby reducing the display effect.
发明内容Contents of the invention
本发明的实施例提供一种显示装置及其驱动方法,将上述驱动方法应用于该显示装置时,可以解决因负载变化引起栅极驱动电路模块输出的扫描信号电压降低,进而导致栅线电压降低的问题;进一步改善在显示同一灰阶画面时,因栅线电压降低导致的相邻两个栅极驱动电路模块所驱动的栅线的交界处产生的交界线,进而造成二分屏的问题。Embodiments of the present invention provide a display device and its driving method. When the above driving method is applied to the display device, it can solve the problem that the voltage of the scanning signal output by the gate drive circuit module decreases due to load changes, which in turn causes the voltage of the gate line to decrease. The problem; to further improve the boundary line generated at the junction of the gate lines driven by two adjacent gate drive circuit modules due to the reduction of the gate line voltage when displaying the same gray-scale picture, thereby causing the problem of two split screens.
为达到上述目的,本发明的实施例采用如下技术方案:In order to achieve the above object, embodiments of the present invention adopt the following technical solutions:
一方面,提供了一种显示装置,包括:多条栅线以及与所述多条栅线相连的至少两个驱动电路模块;所述至少两个驱动电路模块包括:第一驱动电路模块和第二驱动电路模块,所述第一驱动电路模块的信号输出端与连续排列的n1条栅线的第一端电连接,所述第二驱动电路模块与连续排列的n2条栅线的第二端电连接,且所述第二驱动电路模块的输出起始控制端与所述n2条栅线中按照扫描顺序排列的第一条栅线电连接,所述第二驱动电路模块的信号输出端与所述n2条栅线中剩下的n2-1条栅线电连接;In one aspect, a display device is provided, comprising: a plurality of gate lines and at least two drive circuit modules connected to the plurality of gate lines; the at least two drive circuit modules include: a first drive circuit module and a second drive circuit module Two drive circuit modules, the signal output end of the first drive circuit module is electrically connected to the first end of the n 1 grid lines arranged continuously, and the second drive circuit module is connected to the first end of the n 2 gate lines arranged continuously The two terminals are electrically connected, and the output start control terminal of the second drive circuit module is electrically connected to the first gate line arranged in the scanning order among the n 2 gate lines, and the signal of the second drive circuit module The output end is electrically connected to the remaining n 2 -1 gate lines among the n 2 gate lines;
其中,所述n1条栅线中按照扫描顺序排列在最后的m1条栅线与所述n2条栅线中按照扫描顺序排列在最前的m1条栅线为相同的栅线,且2≤m1<n1。Wherein, among the n 1 gate lines, the last m 1 gate lines arranged in the scanning order are the same gate lines as the m 1 gate lines arranged in the front in the scanning order among the n 2 gate lines, and 2≤m 1 <n 1 .
可选的,所述至少两个驱动电路模块还包括第三驱动电路模块,所述第三驱动电路模块与连续排列的n3条栅线的第一端电连接,且所述第三驱动电路模块的输出起始控制端与所述n3条栅线中按照扫描顺序排列的第一条栅线电连接,所述第三驱动电路模块的信号输出端与所述n3条栅线中剩下的n3-1条栅线电连接;Optionally, the at least two drive circuit modules further include a third drive circuit module, the third drive circuit module is electrically connected to the first ends of the n3 gate lines arranged continuously, and the third drive circuit The output start control terminal of the module is electrically connected to the first gate line arranged in the scanning order among the n 3 gate lines, and the signal output terminal of the third driving circuit module is connected to the remaining gate lines of the n 3 gate lines. The next n 3 -1 grid lines are electrically connected;
其中,所述n3条栅线中按照扫描顺序排列在最前的m2条栅线与所述n2条栅线中按照扫描顺序排列在最后的m2条栅线为相同的栅线,且2≤m2≤n2-m1。Wherein, among the n 3 gate lines, the first m 2 gate lines arranged in the scanning order are the same gate lines as the last m 2 gate lines arranged in the scanning order among the n 2 gate lines, and 2≤m 2 ≤n 2 −m 1 .
可选的,所述至少两个驱动电路模块还包括第三驱动电路模块,所述第三驱动电路模块的信号输出端与连续排列的n3条栅线的第一端电连接,且所述第三驱动电路模块的输出起始控制端与所述显示装置的时序控制板的起始控制信号输出端电连接;其中,所述n2条栅线与所述n3条栅线连续排列。Optionally, the at least two driving circuit modules further include a third driving circuit module, the signal output end of the third driving circuit module is electrically connected to the first ends of the n3 gate lines arranged continuously, and the The output start control terminal of the third drive circuit module is electrically connected to the start control signal output terminal of the timing control board of the display device; wherein, the n 2 gate lines and the n 3 gate lines are arranged continuously.
可选的,若所述n1条栅线按照扫描顺序排列在最前,所述第一驱动电路模块的输出起始控制端与所述显示装置的时序控制板的起始控制信号输出端电连接。Optionally, if the n1 gate lines are arranged at the front in the scanning order, the output start control terminal of the first drive circuit module is electrically connected to the start control signal output terminal of the timing control board of the display device .
可选的,所述驱动电路模块为驱动芯片,与所述栅线的第一端电连接的所述驱动芯片位于多条所述栅线的一侧,与所述栅线的第二端电连接的所述驱动芯片位于多条所述栅线的另一侧。Optionally, the driving circuit module is a driving chip, and the driving chip electrically connected to the first end of the gate line is located on one side of the plurality of gate lines, and is electrically connected to the second end of the gate line. The connected driving chip is located on the other side of the plurality of gate lines.
可选的,所述显示装置还包括显示区域、位于所述显示区域两侧的驱动电路模块区域、位于所述显示区域和所述驱动电路模块区域之间的扇出布线区域;所述显示区域设置有多条所述栅线,所述驱动电路模块区域设置有至少两个所述驱动电路模块,所述扇出布线区域设置有多条连接线,每条所述连接线分别与一个所述驱动电路模块和一条所述栅线相连。Optionally, the display device further includes a display area, drive circuit module areas located on both sides of the display area, and a fan-out wiring area located between the display area and the drive circuit module area; the display area Multiple gate lines are provided, at least two drive circuit modules are provided in the drive circuit module area, and multiple connection lines are provided in the fan-out wiring area, each of the connection lines is respectively connected to one of the The driving circuit module is connected to one gate line.
可选的,与同一个所述驱动电路模块相连的所有连续排列的连接线连接多条连续排列的所述栅线,其中,多条所述栅线中按照扫描顺序排列的b条栅线仅与一个驱动电路模块电连接;Optionally, all the consecutively arranged connection lines connected to the same drive circuit module are connected to a plurality of consecutively arranged gate lines, wherein the b gate lines arranged in a scanning order among the plurality of gate lines are only electrically connected with a drive circuit module;
若b为奇数,与所述b条栅线相连的b条连接线关于所述b条栅线中按照扫描顺序排列的最中间的一条栅线对称分布;If b is an odd number, the b connection lines connected to the b grid lines are distributed symmetrically with respect to the middlemost grid line arranged in the scanning order among the b grid lines;
若b为偶数,与所述b条栅线相连的b条连接线关于所述b条栅线中按照扫描顺序排列的第b/2条和第(b+2)/2条的中间位置对称分布。If b is an even number, the b connection lines connected to the b grid lines are symmetrical about the middle positions of the b/2th and (b+2)/2th lines arranged in the scanning order among the b grid lines distributed.
可选的,2≤m1≤n1/2。Optionally, 2≤m 1 ≤n 1 /2.
本发明的实施例提供了一种显示装置,该显示装置包括:多条栅线,以及与多条栅线相连的至少两个驱动电路模块;至少两个驱动电路模块包括:第一驱动电路模块和第二驱动电路模块,第一驱动电路模块的信号输出端与连续排列的n1条栅线的第一端电连接,第二驱动电路模块与连续排列的n2条栅线的第二端电连接,且第二驱动电路模块的输出起始控制端与n2条栅线中按照扫描顺序排列的第一条栅线电连接,第二驱动电路模块的信号输出端与n2条栅线中剩下的n2-1条栅线电连接;其中,n1条栅线中按照扫描顺序排列在最后的m1条栅线与n2条栅线中按照扫描顺序排列在最前的m1条栅线为相同的栅线,且2≤m1<n1、n2。那么,当第二驱动电路模块开始向n1条栅线中按照扫描顺序排列在最后的m1-1条栅线提供扫描信号时,即使第二驱动电路模块因负载变化导致驱动电路模块输出的扫描信号电压降低,由于第一驱动电路模块仍然向这m1-1条栅线提供扫描信号,所以,不会导致这m1-1条栅线电压降低;从而在显示同一灰阶画面时,可以改善因栅线电压降低导致的相邻两个驱动电路模块所驱动的栅线的交界处产生的交界线,进而造成二分屏的问题。An embodiment of the present invention provides a display device, which includes: a plurality of gate lines, and at least two drive circuit modules connected to the plurality of gate lines; the at least two drive circuit modules include: a first drive circuit module and the second drive circuit module, the signal output end of the first drive circuit module is electrically connected to the first end of the n 1 gate lines arranged continuously, and the second drive circuit module is connected to the second end of the n 2 gate lines arranged continuously Electrically connected, and the output start control terminal of the second drive circuit module is electrically connected to the first gate line arranged in the scanning order among the n 2 gate lines, and the signal output terminal of the second drive circuit module is connected to the n 2 gate lines The remaining n 2 -1 grid lines are electrically connected; among them, among the n 1 grid lines, the last m 1 grid lines are arranged in the scanning order, and among the n 2 grid lines, the m 1 grid lines are arranged in the front according to the scanning order The grid lines are the same grid line, and 2≤m 1 <n 1 , n 2 . Then, when the second driving circuit module starts to provide scanning signals to the last m 1 -1 gate lines arranged in the scanning order among the n 1 gate lines, even if the second driving circuit module causes the output of the driving circuit module to The voltage of the scanning signal decreases, because the first driving circuit module still provides scanning signals to the m 1 -1 gate lines, so the voltage of the m 1 -1 gate lines will not decrease; thus, when displaying the same grayscale picture, It can improve the boundary line generated at the junction of the gate lines driven by two adjacent driving circuit modules caused by the voltage reduction of the gate lines, thereby causing the problem of two split screens.
另一方面,提供了一种显示装置的驱动方法,所述方法包括:In another aspect, a method for driving a display device is provided, the method comprising:
在一个扫描周期内,第一驱动电路模块向n1条栅线提供扫描信号;In one scanning period, the first driving circuit module provides scanning signals to n1 gate lines;
在所述第一驱动电路模块向n1条栅线中按照扫描顺序排列的第n1-m1+1条栅线提供扫描信号后,所述第二驱动电路模块开启;After the first driving circuit module provides scanning signals to the n 1 -m 1 +1th gate line arranged in the scanning order among the n 1 gate lines, the second driving circuit module is turned on;
所述第二驱动电路模块向所述n1条栅线中按照扫描顺序排列在最后的m1-1条栅线提供扫描信号。The second driving circuit module provides scanning signals to m 1 −1 gate lines arranged last in a scanning order among the n 1 gate lines.
可选的,所述至少两个驱动电路模块还包括第三驱动电路模块,所述第三驱动电路模块与连续排列的n3条栅线的第一端电连接,且所述第三驱动电路模块的输出起始控制端与所述n3条栅线中按照扫描顺序排列的第一条栅线电连接,所述第三驱动电路模块的信号输出端与所述n3条栅线中剩下的n3-1条栅线电连接;其中,所述n3条栅线中按照扫描顺序排列在最前的m2条栅线与所述n2条栅线中按照扫描顺序排列在最后的m2条栅线为相同的栅线,且2≤m2≤n2-m1;Optionally, the at least two drive circuit modules further include a third drive circuit module, the third drive circuit module is electrically connected to the first ends of the n3 gate lines arranged continuously, and the third drive circuit The output start control terminal of the module is electrically connected to the first gate line arranged in the scanning order among the n 3 gate lines, and the signal output terminal of the third driving circuit module is connected to the remaining gate lines of the n 3 gate lines. The lower n 3 -1 gate lines are electrically connected; wherein, among the n 3 gate lines, the m 2 gate lines that are arranged at the top in the scanning order are connected with the n 2 gate lines that are arranged in the last in the scanning order m 2 grid lines are the same grid line, and 2≤m 2 ≤n 2 -m 1 ;
所述方法还包括:The method also includes:
在一个扫描周期内,所述第二驱动电路模块向n2条栅线提供扫描信号;In one scan period, the second drive circuit module provides scan signals to n 2 gate lines;
在所述第二驱动电路模块向n2条栅线中按照扫描顺序排列的第n2-m2+1条栅线提供扫描信号后,所述第三驱动电路模块开启;After the second driving circuit module provides a scanning signal to the n 2 -m 2 +1th gate line arranged in the scanning order among the n 2 gate lines, the third driving circuit module is turned on;
所述第三驱动电路模块向所述n2条栅线中按照扫描顺序排列在最后的m2-1条栅线提供扫描信号。The third driving circuit module provides scanning signals to the last m 2 −1 gate lines arranged in a scanning order among the n 2 gate lines.
可选的,所述至少两个驱动电路模块还包括第三驱动电路模块,所述第三驱动电路模块的信号输出端与连续排列的n3条栅线的第一端电连接,且所述第三驱动电路模块的输出起始控制端与所述显示装置的时序控制板的起始控制信号输出端电连接;其中,所述n2条栅线与所述n3条栅线连续排列;Optionally, the at least two driving circuit modules further include a third driving circuit module, the signal output end of the third driving circuit module is electrically connected to the first ends of the n3 gate lines arranged continuously, and the The output start control terminal of the third drive circuit module is electrically connected to the start control signal output terminal of the timing control board of the display device; wherein, the n 2 gate lines are arranged continuously with the n 3 gate lines;
所述方法还包括:The method also includes:
在一个扫描周期内,所述第二驱动电路模块向n2条栅线提供扫描信号;In one scan period, the second drive circuit module provides scan signals to n 2 gate lines;
所述显示装置的时序控制板的起始控制信号输出端向所述第三驱动电路模块的输出起始控制端输出开启信号;The initial control signal output terminal of the timing control board of the display device outputs a start signal to the output initial control terminal of the third drive circuit module;
所述第三驱动电路模块向所述n3条栅线提供扫描信号。The third driving circuit module provides scan signals to the n 3 gate lines.
本发明的实施例提供了一种显示装置的驱动方法,该方法包括:在一个扫描周期内,第一驱动电路模块向n1条栅线提供扫描信号;在第一驱动电路模块向n1条栅线中按照扫描顺序排列的第n1-m1+1条栅线提供扫描信号后,第二驱动电路模块开启;第二驱动电路模块向n1条栅线中按照扫描顺序排列在最后的m1-1条栅线提供扫描信号。这样,在一个扫描周期内,第二驱动电路模块向n1条栅线中按照扫描顺序排列在最后的m1-1条栅线提供扫描信号,即使第二驱动电路模块因负载变化导致栅极驱动电路模块输出的扫描信号电压降低,由于第一驱动电路模块仍然向这m1-1条栅线提供扫描信号,所以,不会导致这m1-1条栅线电压降低;从而在显示同一灰阶画面时,可以改善因栅线电压降低导致的相邻两个驱动电路模块所驱动的栅线的交界处产生的交界线,进而造成二分屏的问题。An embodiment of the present invention provides a method for driving a display device, the method comprising: within a scan period, the first drive circuit module provides scan signals to n 1 gate lines ; After the n 1 -m 1 + 1th gate line arranged in the scanning order among the gate lines provides the scanning signal, the second driving circuit module is turned on; m 1 -1 gate lines provide scanning signals. In this way, within one scanning period, the second driving circuit module provides scanning signals to the last m 1 -1 gate lines arranged in the scanning order among the n 1 gate lines, even if the second driving circuit module causes the gate line to change due to the load change. The voltage of the scanning signal output by the driving circuit module decreases, because the first driving circuit module still provides the scanning signal to the m 1 -1 gate lines, so the voltage of the m 1 -1 gate lines will not decrease; thus, when displaying the same In the case of a gray-scale image, the boundary line generated at the junction of the grid lines driven by two adjacent driving circuit modules due to the voltage reduction of the grid lines can be improved, thereby causing the problem of a two-split screen.
附图说明Description of drawings
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. Those skilled in the art can also obtain other drawings based on these drawings without creative work.
图1为现有技术中提供的一种显示装置的结构示意图;FIG. 1 is a schematic structural diagram of a display device provided in the prior art;
图2为现有技术中提供的另一种显示装置的结构示意图;FIG. 2 is a schematic structural diagram of another display device provided in the prior art;
图3为本发明实施例提供的一种显示装置的结构示意图;FIG. 3 is a schematic structural diagram of a display device provided by an embodiment of the present invention;
图4为本发明实施例提供的另一种显示装置的结构示意图;FIG. 4 is a schematic structural diagram of another display device provided by an embodiment of the present invention;
图5为本发明实施例提供的又一种显示装置的结构示意图;FIG. 5 is a schematic structural diagram of another display device provided by an embodiment of the present invention;
图6为本发明实施例提供的再一种显示装置的结构示意图;FIG. 6 is a schematic structural diagram of another display device provided by an embodiment of the present invention;
图7为本发明实施例提供的一种驱动电路模块的结构示意图;FIG. 7 is a schematic structural diagram of a driving circuit module provided by an embodiment of the present invention;
图8为图7的工作时序图;Fig. 8 is the working sequence diagram of Fig. 7;
图9为图3的工作时序图。FIG. 9 is a working sequence diagram of FIG. 3 .
附图标记:Reference signs:
1-栅线;101-栅线的第一端;102-栅线的第二端;2-数据线;3-子像素;31-TFT;32-像素电极;4-栅极驱动电路模块;5-连接线;6-第一驱动电路模块;60-第一驱动电路模块的输出起始控制端;61-第一驱动电路模块的信号输出端;7-第二驱动电路模块;70-第二驱动电路模块的输出起始控制端;71-第二驱动电路模块的信号输出端;8-第三驱动电路模块;80-第三驱动电路模块的输出起始控制端;81-第三驱动电路模块的信号输出端;9-时序控制板;90-时序控制板的起始控制信号输出端;91-时序控制板的行扫描信号输出端;92-时序控制板的使能信号输出端;93-时序控制板的栅极开启电压输出端;94-时序控制板的栅极关断电压输出端;10-显示区域;11-驱动电路模块区域;12-扇出布线区域;13-移位寄存器;130-移位寄存器的输出起始控制端;131-移位寄存器的输出端;132-移位寄存器的复位端;133-移位寄存器的行扫描控制端;14-与门;140-与门的使能控制端;141-与门的输入端;142-与门的输出端;15-电平转换单元;150-电平转换单元的第一控制端;151-电平转换单元的栅极开启电压输入端;152-电平转换单元的栅极关断电压输入端;153-电平转换单元的输出端;16-输出缓冲器。1-gate line; 101-the first end of the gate line; 102-the second end of the gate line; 2-data line; 3-sub-pixel; 31-TFT; 32-pixel electrode; 4-gate drive circuit module; 5-connection line; 6-the first drive circuit module; 60-the output start control terminal of the first drive circuit module; 61-the signal output terminal of the first drive circuit module; 7-the second drive circuit module; 70-the first The output start control terminal of the second drive circuit module; 71-the signal output terminal of the second drive circuit module; 8-the third drive circuit module; 80-the output start control terminal of the third drive circuit module; 81-the third drive The signal output terminal of the circuit module; 9-sequence control board; 90-the initial control signal output terminal of the timing control board; 91-the row scanning signal output terminal of the timing control board; 92-the enable signal output terminal of the timing control board; 93-Gate turn-on voltage output terminal of timing control board; 94-Gate turn-off voltage output terminal of timing control board; 10-Display area; 11-Drive circuit module area; 12-Fan-out wiring area; 13-Shift Register; 130-the output start control terminal of the shift register; 131-the output terminal of the shift register; 132-the reset terminal of the shift register; 133-the row scan control terminal of the shift register; 14-AND gate; 140- The enable control terminal of the AND gate; 141-the input terminal of the AND gate; 142-the output terminal of the AND gate; 15-the level conversion unit; 150-the first control terminal of the level conversion unit; 151-the level conversion unit Gate turn-on voltage input end; 152—gate turn-off voltage input end of the level conversion unit; 153—output end of the level conversion unit; 16—output buffer.
具体实施方式detailed description
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
实施例一Embodiment one
本发明实施例提供一种显示装置,参考图3所示,该显示装置包括:多条栅线1以及与多条栅线1相连的至少两个驱动电路模块;至少两个驱动电路模块包括:第一驱动电路模块6和第二驱动电路模块7,第一驱动电路模块6的信号输出端61与连续排列的n1条栅线的第一端101电连接,第二驱动电路模块7与连续排列的n2条栅线的第二端102电连接,且第二驱动电路模块7的输出起始控制端60与n2条栅线中按照扫描顺序排列的第一条栅线电连接,第二驱动电路模块7的信号输出端71与n2条栅线中剩下的n2-1条栅线电连接;其中,n1条栅线中按照扫描顺序排列在最后的m1条栅线与n2条栅线中按照扫描顺序排列在最前的m1条栅线为相同的栅线,且2≤m1<n1、n2。An embodiment of the present invention provides a display device, as shown in FIG. 3 , the display device includes: a plurality of gate lines 1 and at least two driving circuit modules connected to the plurality of gate lines 1; at least two driving circuit modules include: The first driving circuit module 6 and the second driving circuit module 7, the signal output end 61 of the first driving circuit module 6 is electrically connected with the first end 101 of the n1 grid lines arranged continuously, the second driving circuit module 7 is connected with the continuous The second ends 102 of the arranged n 2 gate lines are electrically connected, and the output start control terminal 60 of the second drive circuit module 7 is electrically connected to the first gate line arranged in the scanning order among the n 2 gate lines, the first The signal output terminal 71 of the second drive circuit module 7 is electrically connected to the remaining n 2 -1 gate lines in the n 2 gate lines; wherein, among the n 1 gate lines, the last m 1 gate lines are arranged in the scanning order Among the n 2 raster lines, m 1 raster lines arranged first in the scanning order are the same raster lines, and 2≤m 1 <n 1 , n 2 .
上述显示装置中,各个驱动电路模块所包括的具体电路结构可以相同,也可以不同,这里不作限定。为了降低制作难度,简化工艺,可以选择结构相同的驱动电路模块。示例的,每个驱动电路模块可以包括移位寄存器、与门、电平转换单元、输出缓冲器等元器件,若两个驱动电路模块的具体电路结构相同,即指这两个驱动电路模块所包括的移位寄存器、与门、电平转换单元、输出缓冲器等元器件的个数、型号、以及元器件之间的连接关系相同。In the above display device, the specific circuit structure included in each driving circuit module may be the same or different, which is not limited here. In order to reduce manufacturing difficulty and simplify the process, drive circuit modules with the same structure can be selected. For example, each driving circuit module may include components such as a shift register, an AND gate, a level conversion unit, and an output buffer. If the specific circuit structures of the two driving circuit modules are the same, it means that the two driving circuit modules The number, type, and connection relationship between components such as shift registers, AND gates, level conversion units, and output buffers included are the same.
上述显示装置中,本发明的实施例对于驱动电路模块的具体数量也不作限定,具体可以根据实际情况而定。若该显示装置的分辨率为1920×1080,则该显示装置可以仅包括第一驱动电路模块和第二驱动电路模块(此类结构可以参考图3所示),第一驱动电路模块可以电连接连续排列的970条栅线的第一端,第二驱动电路模块的输出起始控制端与按照扫描顺序排列的第950条电连接,第二驱动电路模块的信号输出端与按照扫描顺序排列的第951-1920条栅线电连接。当然,该显示装置还可以仅包括第一驱动电路模块、第二驱动电路模块和第三驱动电路模块;第一驱动电路模块可以电连接连续排列的660条栅线的第一端,第二驱动电路模块的输出起始控制端与按照扫描顺序排列的第640条电连接,第二驱动电路模块的信号输出端与按照扫描顺序排列的第641-1300条栅线电连接,第三驱动电路模块的输出起始控制端与按照扫描顺序排列的第1280条电连接,第三驱动电路模块的信号输出端与按照扫描顺序排列的第1281-1920条栅线电连接,此类结构可以参考图4所示;或者,第三驱动电路模块的输出起始控制端可以与显示装置的时序控制板的起始控制信号输出端电连接,第三驱动电路模块的信号输出端与按照扫描顺序排列的第1301-1920条栅线电连接,此类结构可以参考图5所示。当然,上述显示装置还可以包括四个、五个等驱动电路模块,这里不作具体限定。本发明实施例对于显示装置的分辨率不作限定,上述仅以1920×1080的显示装置为例进行说明。本发明实施例提供的附图均以各个驱动电路模块电连接15条栅线为例进行绘示。同时为了便于区分栅线的第一端和第二端,本发明实施例提供的附图中在栅线的第一端和第二端分别标有黑点。当然在实际的电路连接中,该黑点是不存在的。In the above display device, the embodiments of the present invention do not limit the specific number of driving circuit modules, which may be determined according to actual conditions. If the resolution of the display device is 1920×1080, the display device may only include a first drive circuit module and a second drive circuit module (this kind of structure can be shown in Figure 3), and the first drive circuit module can be electrically connected to The first ends of the 970 grid lines arranged continuously, the output start control end of the second driving circuit module is electrically connected to the 950th line arranged in the scanning order, and the signal output end of the second driving circuit module is connected to the 950th line arranged in the scanning order. Gatelines 951-1920 are electrically connected. Of course, the display device can also only include the first driving circuit module, the second driving circuit module and the third driving circuit module; The output start control terminal of the circuit module is electrically connected to the 640th gate line arranged in the scanning order, the signal output terminal of the second driving circuit module is electrically connected to the 641-1300th gate line arranged in the scanning order, and the third driving circuit module The output start control terminal of the first drive circuit module is electrically connected to the 1280th gate line arranged in the scanning order, and the signal output terminal of the third driving circuit module is electrically connected to the 1281-1920th gate line arranged in the scanning order. This kind of structure can refer to Figure 4 As shown; or, the output start control terminal of the third drive circuit module can be electrically connected with the start control signal output terminal of the timing control board of the display device, and the signal output terminal of the third drive circuit module is connected with the first control signal arranged in the scanning order. 1301-1920 grid lines are electrically connected, and this kind of structure can be referred to as shown in FIG. 5 . Of course, the above display device may also include four, five or other driving circuit modules, which are not specifically limited here. The embodiment of the present invention does not limit the resolution of the display device, and the above description only takes a 1920×1080 display device as an example. The drawings provided in the embodiments of the present invention are all illustrated by taking each driving circuit module electrically connected to 15 gate lines as an example. At the same time, in order to distinguish the first end and the second end of the grid line, black dots are respectively marked on the first end and the second end of the grid line in the drawings provided by the embodiment of the present invention. Of course, in the actual circuit connection, the black dot does not exist.
本发明的实施例对于上述显示装置的结构不作限定,该显示装置可以是液晶显示器、OLED(OrganicLight-EmittingDiode,有机发光二极管)显示器等显示器件以及包括这些显示器件的电视、数码相机、手机、平板电脑等任何具有显示功能的产品或者部件。Embodiments of the present invention do not limit the structure of the above-mentioned display device, and the display device may be display devices such as liquid crystal displays, OLED (Organic Light-Emitting Diode, organic light-emitting diode) displays, and televisions, digital cameras, mobile phones, and flat panels that include these display devices. Any product or component with a display function, such as a computer.
本领域技术人员能够根据现有技术获知,显示装置可以包括阵列基板,阵列基板可以包括多条栅线、多条数据线和多个子像素等等。若显示装置为液晶显示装置,则该显示装置还可以包括与阵列基板对盒的彩膜基板、以及位于阵列基板和彩膜基板之间的液晶。若显示装置为OLED显示装置,则该显示装置还可以包括与阵列基板封装在一起的封装基板,阵列基板还可以包括有机发光功能层等。本发明实施例对此不作限定。Those skilled in the art can know from the prior art that a display device may include an array substrate, and the array substrate may include a plurality of gate lines, a plurality of data lines, a plurality of sub-pixels and the like. If the display device is a liquid crystal display device, the display device may further include a color filter substrate in a box with the array substrate, and a liquid crystal located between the array substrate and the color filter substrate. If the display device is an OLED display device, the display device may further include a packaging substrate packaged with the array substrate, and the array substrate may also include an organic light-emitting functional layer and the like. This embodiment of the present invention does not limit it.
本发明的实施例对于上述驱动电路模块的具体制作方法不作限定,示例的,可以采用GOA(GateDriveronArray,阵列基板行驱动技术)将驱动电路模块集成在显示装置的阵列基板上;当然,还可以采用传统技术,将驱动电路模块黏接在阵列基板上,这里不作具体限定。由于前者无需单独形成驱动电路模块,避免将驱动电路模块外黏接到阵列基板上,可以实现窄边框的显示装置,因此,实际生产中大多选择前者。The embodiment of the present invention does not limit the specific manufacturing method of the above-mentioned driving circuit module. As an example, GOA (GateDriveronArray, array substrate row driving technology) can be used to integrate the driving circuit module on the array substrate of the display device; of course, it can also be used In the conventional technology, the driving circuit module is glued on the array substrate, which is not specifically limited here. Since the former does not need to form a driving circuit module separately, avoids bonding the driving circuit module to the array substrate, and can realize a display device with a narrow frame, therefore, the former is mostly selected in actual production.
在本发明的描述中,需要理解的是,“A与B电连接”指的是A与B之间可以形成通路,即A可以将电流或电压信号传输到B。本发明实施例对于实现电连接的具体方式不作限定,示例的,A可以通过导线与B相连从而实现电连接,或者,A可以与B直接相连从而实现电连接,当然还可以是其他方式。In the description of the present invention, it should be understood that "A and B are electrically connected" means that a path can be formed between A and B, that is, A can transmit a current or voltage signal to B. The embodiment of the present invention does not limit the specific way to realize the electrical connection. For example, A can be connected to B through a wire to realize the electrical connection, or A can be directly connected to B to realize the electrical connection, and of course other ways can also be used.
上述显示装置中,第一驱动电路模块的信号输出端与连续排列的n1条栅线的第一端电连接;其中,第一驱动电路模块的信号输出端可以向n1条栅线提供扫描信号;连续排列的n1条栅线是指:n1条栅线可以是如图3所示,沿OC方向连续排列形成多行;当然,也可以是沿OD方向连续排列形成多列,这里不作具体限定。本发明实施例以及附图均以n1条栅线沿OC方向连续排列形成多行为例进行说明。另外,每条栅线的两端分别为第一端和第二端,参考图3所示,n1条栅线中靠近第一驱动电路模块6的一端为第一端,远离第一驱动电路模块6的一端为第二端。上述显示装置中包括的其他条栅线,例如n2条栅线,其第一端与第二端的含义与上述n1条栅线相同,后续不再赘述。In the above display device, the signal output end of the first drive circuit module is electrically connected to the first ends of the n 1 gate lines arranged continuously; wherein, the signal output end of the first drive circuit module can provide scanning for the n 1 gate lines Signal; n 1 gate lines arranged continuously means: n 1 gate lines can be arranged continuously along the OC direction to form multiple rows as shown in Figure 3; of course, they can also be continuously arranged along the OD direction to form multiple columns, here Not specifically limited. The embodiments of the present invention and the accompanying drawings are described by taking n 1 gate lines arranged continuously along the OC direction to form multiple lines for illustration. In addition, the two ends of each gate line are respectively the first end and the second end. As shown in FIG. One end of the module 6 is the second end. The meanings of the first end and the second end of the other gate lines included in the above display device, such as the n 2 gate lines, are the same as those of the above n 1 gate lines, and will not be repeated hereafter.
上述显示装置中,第二驱动电路模块的输出起始控制端与n2条栅线中按照扫描顺序排列的第一条栅线电连接;其中,第二驱动电路模块的输出起始控制端可以接收起始控制信号,并在该起始控制信号的控制下输出扫描信号。In the above display device, the output start control terminal of the second drive circuit module is electrically connected to the first gate line arranged in the scanning order among the n 2 gate lines; wherein, the output start control terminal of the second drive circuit module can be The start control signal is received, and the scan signal is output under the control of the start control signal.
需要说明的是,现有技术中将仅在栅线一端集成栅极驱动电路模块的结构称为单边驱动,将在栅线两端均集成栅极驱动电路模块的结构称为双边驱动,本发明中,n1条栅线中按照扫描顺序排列在最后的m1条栅线分别与第一驱动电路模块和第二驱动电路模块电连接,其采用的是双边驱动;而n1条栅线中仅与第一驱动电路模块电连接的栅线采用的则是单边驱动。因此,可以将本发明设计的结构称为半双边驱动。It should be noted that in the prior art, the structure in which the gate drive circuit module is integrated at only one end of the gate line is called unilateral drive, and the structure in which gate drive circuit modules are integrated at both ends of the gate line is called double-sided drive. In the invention, among the n 1 gate lines, the last m 1 gate lines arranged in the scanning order are respectively electrically connected to the first drive circuit module and the second drive circuit module, which adopts double-sided driving; and the n 1 gate lines Among them, only the gate lines electrically connected to the first driving circuit module adopt unilateral driving. Therefore, the structure designed in the present invention can be called a semi-bilateral drive.
进一步需要说明的是,本发明的实施例对于子像素的驱动方法不作限定。传统技术中多采用每行子像素通过一条栅线驱动,当然还可以采用双栅驱动,即每行子像素通过两条栅线驱动。本发明对此不作限定。采用双栅驱动的显示装置中,由于每个子像素充电的时间本身较短,那么若栅极驱动电路模块输出的扫描信号电压降低,则会延长TFT的打开时间,这样会进一步缩短数据线向像素电极写入数据信号的时间。因此,本发明应用在双栅驱动的显示装置中效果更佳。It should be further noted that, the embodiment of the present invention does not limit the driving method of the sub-pixels. In the traditional technology, each row of sub-pixels is mostly driven by one gate line. Of course, double-gate drive can also be used, that is, each row of sub-pixels is driven by two gate lines. The present invention is not limited thereto. In a display device using dual-gate drive, since the charging time of each sub-pixel itself is relatively short, if the voltage of the scanning signal output by the gate drive circuit module decreases, the turn-on time of the TFT will be prolonged, which will further shorten the charging time of the data line to the pixel. The time when the electrode writes the data signal. Therefore, the application of the present invention in a dual-gate driven display device has a better effect.
本发明的实施例提供了一种显示装置,该显示装置包括:多条栅线,以及与多条栅线相连的至少两个驱动电路模块;至少两个驱动电路模块包括:第一驱动电路模块和第二驱动电路模块,第一驱动电路模块的信号输出端与连续排列的n1条栅线的第一端电连接,第二驱动电路模块与连续排列的n2条栅线的第二端电连接,且第二驱动电路模块的输出起始控制端与n2条栅线中按照扫描顺序排列的第一条栅线电连接,第二驱动电路模块的信号输出端与n2条栅线中剩下的n2-1条栅线电连接;其中,n1条栅线中按照扫描顺序排列在最后的m1条栅线与n2条栅线中按照扫描顺序排列在最前的m1条栅线为相同的栅线,且2≤m1<n1、n2。那么,当第二驱动电路模块开始向n1条栅线中按照扫描顺序排列在最后的m1-1条栅线提供扫描信号时,即使第二驱动电路模块因负载变化导致驱动电路模块输出的扫描信号电压降低,由于第一驱动电路模块仍然向这m1-1条栅线提供扫描信号,所以,不会导致这m1-1条栅线电压降低;从而在显示同一灰阶画面时,可以改善因栅线电压降低导致的相邻两个驱动电路模块所驱动的栅线的交界处产生的交界线,进而造成二分屏的问题。An embodiment of the present invention provides a display device, which includes: a plurality of gate lines, and at least two drive circuit modules connected to the plurality of gate lines; the at least two drive circuit modules include: a first drive circuit module and the second drive circuit module, the signal output end of the first drive circuit module is electrically connected to the first end of the n 1 gate lines arranged continuously, and the second drive circuit module is connected to the second end of the n 2 gate lines arranged continuously Electrically connected, and the output start control terminal of the second drive circuit module is electrically connected to the first gate line arranged in the scanning order among the n 2 gate lines, and the signal output terminal of the second drive circuit module is connected to the n 2 gate lines The remaining n 2 -1 grid lines are electrically connected; among them, among the n 1 grid lines, the last m 1 grid lines are arranged in the scanning order, and among the n 2 grid lines, the m 1 grid lines are arranged in the front according to the scanning order The grid lines are the same grid line, and 2≤m 1 <n 1 , n 2 . Then, when the second driving circuit module starts to provide scanning signals to the last m 1 -1 gate lines arranged in the scanning order among the n 1 gate lines, even if the second driving circuit module causes the output of the driving circuit module to The voltage of the scanning signal decreases, because the first driving circuit module still provides scanning signals to the m 1 -1 gate lines, so the voltage of the m 1 -1 gate lines will not decrease; thus, when displaying the same grayscale picture, It can improve the boundary line generated at the junction of the gate lines driven by two adjacent driving circuit modules caused by the voltage reduction of the gate lines, thereby causing the problem of two split screens.
可选的,为了提高驱动电路模块的利用率,只需要相邻两个驱动电路模块所驱动的栅线的交界处附近的栅线与两个驱动电路模块电连接,因此可以选择2≤m1≤n1/2。Optionally, in order to improve the utilization rate of the driving circuit modules, only the gate lines near the junction of the gate lines driven by two adjacent driving circuit modules need to be electrically connected to the two driving circuit modules, so 2≤m 1 can be selected ≤ n 1 /2.
可选的,参考图4所示,上述至少两个驱动电路模块还包括第三驱动电路模块8,第三驱动电路模块8与连续排列的n3条栅线的第一端101电连接,且第三驱动电路模块8的输出起始控制端80与n3条栅线中按照扫描顺序排列的第一条栅线电连接,第三驱动电路模块8的信号输出端81与n3条栅线中剩下的n3-1条栅线电连接;其中,n3条栅线中按照扫描顺序排列在最前的m2条栅线与n2条栅线中按照扫描顺序排列在最后的m2条栅线为相同的栅线,且2≤m2≤n2-m1。Optionally, as shown in FIG. 4 , the at least two drive circuit modules above further include a third drive circuit module 8, the third drive circuit module 8 is electrically connected to the first ends 101 of the n 3 gate lines arranged continuously, and The output start control terminal 80 of the third drive circuit module 8 is electrically connected to the first gate line arranged in the scanning order among the n 3 gate lines, and the signal output terminal 81 of the third drive circuit module 8 is connected to the n 3 gate lines The remaining n 3 -1 grid lines are electrically connected; wherein, among the n 3 grid lines, the first m 2 grid lines are arranged in the scanning order and among the n 2 grid lines, the last m 2 grid lines are arranged in the scanning order The grid lines are the same grid line, and 2≤m 2 ≤n 2 -m 1 .
这样,当第三驱动电路模块开始向n2条栅线中按照扫描顺序排列在最后的m2-1条栅线提供扫描信号时,即使第三驱动电路模块因负载变化导致驱动电路模块输出的扫描信号电压降低,由于第二驱动电路模块仍然向这m2-1条栅线提供扫描信号,所以,不会导致这m2-1条栅线电压降低;从而在显示同一灰阶画面时,可以改善因栅线电压降低导致的第二驱动电路模块和第三驱动电路模块所驱动的栅线的交界处产生的交界线,进而造成二分屏的问题。In this way, when the third driving circuit module starts to provide scan signals to the last m2-1 gate lines in the scanning order among the n2 gate lines, even if the third driving circuit module causes the output of the driving circuit module to The voltage of the scanning signal decreases, because the second driving circuit module still provides scanning signals to the m 2 -1 gate lines, so the voltage of the m 2 -1 gate lines will not decrease; thus, when displaying the same grayscale picture, The junction line generated at the junction of the gate lines driven by the second driving circuit module and the third driving circuit module due to the voltage reduction of the gate lines can be improved, thereby causing the problem of two split screens.
可选的,参考图5所示,上述至少两个驱动电路模块还包括第三驱动电路模块8,第三驱动电路模块8的信号输出端81与连续排列的n3条栅线的第一端101电连接,且第三驱动电路模块8的输出起始控制端80与显示装置的时序控制板9的起始控制信号输出端91电连接;其中,n2条栅线与n3条栅线连续排列。Optionally, as shown in FIG. 5 , the above-mentioned at least two drive circuit modules further include a third drive circuit module 8, the signal output terminal 81 of the third drive circuit module 8 is connected to the first ends of the n 3 gate lines arranged continuously 101 is electrically connected, and the output initial control terminal 80 of the third drive circuit module 8 is electrically connected to the initial control signal output terminal 91 of the timing control board 9 of the display device; wherein, n 2 gate lines and n 3 gate lines in a row.
这样,n2条栅线中按照扫描顺序排列在最后的n2-m1条栅线仅由第二驱动电路模块驱动,而第三驱动电路模块按照扫描顺序驱动n3条栅线,相较于图4所示的显示装置,可以提高驱动电路模块的利用率,示例的,图5中三个驱动单元共驱动39条栅线,图4中三个驱动单元共驱动33条栅线;但是图4所示的显示装置可以进一步改善第二驱动电路模块与第三驱动电路模块所驱动的栅线的交界处产生的交界线,进一步提高显示画面的质量。In this way, the last n 2 -m 1 gate lines arranged in the scanning order among the n 2 gate lines are only driven by the second driving circuit module, while the third driving circuit module drives the n 3 gate lines in the scanning order. For the display device shown in FIG. 4, the utilization rate of the driving circuit module can be improved. For example, the three driving units in FIG. 5 drive 39 gate lines in total, and the three driving units in FIG. 4 drive 33 gate lines in total; but The display device shown in FIG. 4 can further improve the boundary line generated at the junction of the gate lines driven by the second driving circuit module and the third driving circuit module, and further improve the quality of the display picture.
需要说明的是,若上述显示装置包括三个以上的驱动电路模块,多个驱动电路模块按照扫描顺序驱动多条栅线,则除了第一个和最后一个驱动电路模块,其他任意一个驱动电路模块都与两个驱动电路模块相邻,那么当前驱动电路模块与上一个相邻的驱动电路模块分别与栅线的电连接结构可以是如3所示,当前驱动电路模块与下一个相邻的驱动电路模块分别与栅线的电连接结构可以是如4所示或者如图5所示,这里不作具体限定,具体可以根据实际情况而定。为了最大程度上改善交界线现象,可以选择当前驱动电路模块与上一个相邻的驱动电路模块分别与栅线的电连接结构如3所示,当前驱动电路模块与下一个相邻的驱动电路模块分别与栅线的电连接结构如4所示,这样任意两个相邻的驱动电路模块所驱动的栅线的交界处产生的交界线均可以得到改善。It should be noted that, if the above-mentioned display device includes more than three driving circuit modules, and the multiple driving circuit modules drive a plurality of gate lines in a scanning order, except for the first and last driving circuit modules, any other driving circuit modules Both are adjacent to two driving circuit modules, then the electrical connection structure between the current driving circuit module and the previous adjacent driving circuit module and the gate line can be as shown in 3, the current driving circuit module and the next adjacent driving circuit module The electrical connection structure between the circuit modules and the grid lines may be as shown in FIG. 4 or in FIG. 5 , which is not specifically limited here, but may be determined according to actual conditions. In order to improve the boundary line phenomenon to the greatest extent, the electrical connection structure between the current drive circuit module and the previous adjacent drive circuit module and the grid lines can be selected as shown in 3. The current drive circuit module and the next adjacent drive circuit module The electrical connection structure with the gate lines is shown in 4, so that the boundary line generated at the junction of the gate lines driven by any two adjacent driving circuit modules can be improved.
进一步需要说明的是,本发明实施例对于上述第一驱动电路模块驱动的n1条栅线在所有栅线中的具体排列位置不作限定,示例的,按照扫描顺序排列,n1条栅线可以位于最前,也可以位于中间,当然还可以是其他位置。It should be further noted that, the embodiment of the present invention does not limit the specific arrangement positions of the n 1 gate lines driven by the above-mentioned first driving circuit module among all the gate lines. For example, they are arranged in a scanning order, and the n 1 gate lines can be It can be at the front, it can also be in the middle, and of course it can be other positions.
参考图4和图5所示,若n1条栅线按照扫描顺序排列在最前,第一驱动电路模块6的输出起始控制端60与显示装置的时序控制板9的起始控制信号输出端90电连接,这样,第一驱动电路模块在时序控制板的控制下,可以输出扫描信号。Referring to Fig. 4 and Fig . 5, if n1 gate lines are arranged at the front according to the scanning order, the output start control terminal 60 of the first drive circuit module 6 is connected to the start control signal output terminal of the timing control board 9 of the display device. 90, so that the first drive circuit module can output scan signals under the control of the timing control board.
可选的,上述驱动电路模块为驱动芯片,与栅线的第一端电连接的驱动芯片位于多条栅线的一侧,与栅线的第二端电连接的驱动芯片位于多条栅线的另一侧,这样有利于布线。Optionally, the above-mentioned drive circuit module is a drive chip, the drive chip electrically connected to the first end of the gate line is located on one side of the plurality of gate lines, and the drive chip electrically connected to the second end of the gate line is located on one side of the plurality of gate lines on the other side, which facilitates wiring.
可选的,参考图3所示,显示装置还包括显示区域10、位于显示区域10两侧的驱动电路模块区域11、位于显示区域10和驱动电路模块区域11之间的扇出布线区域12(又称为Fanout区);显示区域10设置有多条栅线1,驱动电路模块区域11设置有至少两个驱动电路模块,扇出布线区域12设置有多条连接线5,每条连接线分别与一个驱动电路模块和一条栅线相连。这样,驱动电路模块可以通过连接线与栅线实现电连接,从而简化设计难度。Optionally, as shown in FIG. 3 , the display device further includes a display area 10, a driving circuit module area 11 located on both sides of the display area 10, and a fan-out wiring area 12 located between the display area 10 and the driving circuit module area 11 ( Also known as the Fanout area); the display area 10 is provided with a plurality of gate lines 1, the drive circuit module area 11 is provided with at least two drive circuit modules, and the fan-out wiring area 12 is provided with a plurality of connection lines 5, and each connection line is respectively It is connected with a driving circuit module and a gate line. In this way, the driving circuit module can be electrically connected to the gate line through the connection line, thereby simplifying the design difficulty.
可选的,与同一个驱动电路模块相连的所有连续排列的连接线连接多条连续排列的栅线,其中,多条栅线中按照扫描顺序排列的b条栅线仅与一个驱动电路模块电连接;若b为奇数,与b条栅线相连的b条连接线关于b条栅线中按照扫描顺序排列的最中间的一条栅线对称分布;若b为偶数,与b条栅线相连的b条连接线关于b条栅线中按照扫描顺序排列的第b/2条和第(b+2)/2条的中间位置对称分布。Optionally, all the consecutively arranged connection lines connected to the same driving circuit module are connected to a plurality of consecutively arranged gate lines, wherein, among the plurality of gate lines, the b gate lines arranged in the scanning order are only electrically connected to one driving circuit module. connection; if b is an odd number, the b connection lines connected to the b grid lines are distributed symmetrically with respect to the middlemost grid line arranged in the scanning order among the b grid lines; if b is an even number, the b connection lines connected to the b grid lines The b connection lines are distributed symmetrically with respect to the middle positions of the b/2th and (b+2)/2th lines arranged in the scanning order among the b grid lines.
示例的,以与第一驱动电路模块相连的连接线为例进行说明。参考图3所示,与第一驱动电路模块6相连的所有连续排列的15条连接线5连接15条连续排列的栅线1,其中,15条栅线中按照扫描顺序排列的9条栅线仅与第一驱动电路模块6电连接,则与这9条栅线相连的9条连接线关于该9条栅线中按照扫描顺序排列的最中间的栅线即第5条栅线对称分布;参考图6所示,与第一驱动电路模块6相连的所有连续排列的15条连接线5连接15条连续排列的栅线1,其中,15条栅线中按照扫描顺序排列的10条栅线仅与第一驱动电路模块6电连接,则与这10条栅线相连的10条连接线关于该10条栅线中按照扫描顺序排列的第5条和第6条的中间位置对称分布。As an example, the connection line connected to the first driving circuit module is taken as an example for description. As shown in FIG. 3 , all 15 consecutively arranged connecting lines 5 connected to the first drive circuit module 6 are connected to 15 consecutively arranged gate lines 1, wherein, among the 15 gate lines, 9 gate lines arranged in a scanning order Only electrically connected to the first drive circuit module 6, the nine connection lines connected to the nine gate lines are distributed symmetrically with respect to the fifth gate line, which is the middlemost gate line arranged in the scanning order among the nine gate lines; As shown in FIG. 6 , all 15 consecutively arranged connection lines 5 connected to the first drive circuit module 6 are connected to 15 consecutively arranged gate lines 1, wherein, among the 15 gate lines, 10 gate lines arranged in a scanning order Only electrically connected to the first driving circuit module 6, the 10 connecting lines connected to the 10 gate lines are distributed symmetrically about the middle positions of the 5th and 6th lines arranged in the scanning order among the 10 gate lines.
可选的,为了降低成本和设计难度,每个驱动电路模块所包括的具体电路结构相同。示例的,每个驱动电路模块可以包括移位寄存器、与门、电平转换单元、输出缓冲器等元器件,若两个驱动电路模块的具体电路结构相同,即指这两个驱动电路模块所包括的移位寄存器、与门、电平转换单元、输出缓冲器等元器件的个数、型号、以及元器件之间的连接关系相同。现有技术中驱动电路模块的结构有很多种,这里不作限定。现提供一个具体的电路结构以详细说明。参考图7所示,每个驱动电路模块可以包括多个移位寄存器13、多个与门14、多个电平转换单元15和多个输出缓冲器16,每个移位寄存器13包括输出起始控制端130、输出端131、复位端132和行扫描控制端133,每个与门14包括使能控制端140、输入端141和输出端142,每个电平转换单元15包括第一控制端151、栅极开启电压输入端152、栅极关断电压输入端153和输出端154。Optionally, in order to reduce cost and design difficulty, each driving circuit module includes the same specific circuit structure. For example, each driving circuit module may include components such as a shift register, an AND gate, a level conversion unit, and an output buffer. If the specific circuit structures of the two driving circuit modules are the same, it means that the two driving circuit modules The number, type, and connection relationship between components such as shift registers, AND gates, level conversion units, and output buffers included are the same. There are many structures of the driving circuit module in the prior art, which are not limited here. A specific circuit structure is now provided for detailed description. Referring to Fig. 7, each driving circuit module can include a plurality of shift registers 13, a plurality of AND gates 14, a plurality of level conversion units 15 and a plurality of output buffers 16, and each shift register 13 includes an output Start control terminal 130, output terminal 131, reset terminal 132 and row scan control terminal 133, each AND gate 14 includes enabling control terminal 140, input terminal 141 and output terminal 142, each level conversion unit 15 includes a first control terminal 151 , a gate-on voltage input terminal 152 , a gate-off voltage input terminal 153 and an output terminal 154 .
其中,除第一级移位寄存器外,其余每个移位寄存器的输出起始控制端连接与其相邻的上一级移位寄存器的复位端;每个移位寄存器的输出端连接每个与门的输入端;每个与门的输出端连接每个输出缓冲器的第一控制端;每个输出缓冲器的输出端连接一条栅线的第一端或第二端。Wherein, except the first-stage shift register, the output start control end of each other shift register is connected to the reset end of the upper-stage shift register adjacent to it; the output end of each shift register is connected to each The input terminal of the gate; the output terminal of each AND gate is connected with the first control terminal of each output buffer; the output terminal of each output buffer is connected with the first terminal or the second terminal of a gate line.
第一级移位寄存器的输出起始控制端可以电连接时序控制板的起始控制信号输出端或者电连接其他信号线,以获取STV信号(即栅极驱动输出起始控制信号);参考图7所示,每个移位寄存器13的行扫描控制端133可以电连接时序控制板9的行扫描信号输出端91,以获取CPV信号(即控制扫描行依次开启的时钟信号);每个与门14的使能控制端140可以电连接时序控制板9的使能信号输出端92,以获取OE信号(即扫描行开启关闭的使能控制信号);每个电平转换单元15的栅极开启电压输入端152可以电连接时序控制板9的栅极开启电压输出端93,以获取VGH电压(即栅极驱动脉冲的高电平电压);每个电平转换单元15的栅极关断电压输入端153可以电连接时序控制板9的栅极关断电压输出端94,以获取VGL电压(即栅极驱动脉冲的低电平电压)。The output start control terminal of the first-stage shift register can be electrically connected to the start control signal output terminal of the timing control board or electrically connected to other signal lines to obtain the STV signal (that is, the gate drive outputs the start control signal); refer to the figure 7, the row scanning control terminal 133 of each shift register 13 can be electrically connected to the row scanning signal output terminal 91 of the timing control board 9, so as to obtain the CPV signal (that is, the clock signal that controls the scanning rows to be opened in turn); each and The enabling control terminal 140 of the gate 14 can be electrically connected to the enabling signal output terminal 92 of the timing control board 9 to obtain the OE signal (that is, the enabling control signal for opening and closing the scanning line); the gate of each level conversion unit 15 The turn-on voltage input terminal 152 can be electrically connected to the gate turn-on voltage output terminal 93 of the timing control board 9 to obtain the VGH voltage (i.e. the high level voltage of the gate drive pulse); the gate of each level conversion unit 15 is turned off The voltage input terminal 153 can be electrically connected to the gate-off voltage output terminal 94 of the timing control board 9 to obtain the VGL voltage (ie, the low-level voltage of the gate driving pulse).
以图7所示的驱动电路模块为例,说明其驱动过程。参考图8所示,当第一级移位寄存器的输出起始控制端获取到STV信号的高电平,则该驱动电路模块开始工作;接着在CPV信号的下一个时钟周期T1,第一级移位寄存器的输出端向与门输出控制信号,当与门获取到低电平的OE信号时,与门向电平转换单元输出控制信号,进而在该控制信号的控制下通过输出缓冲器向第一条栅线输出驱动电压;在CPV信号紧接T1的时钟周期T2,第一级移位寄存器停止工作,第二级移位寄存器开始工作,第二级移位寄存器的输出端向与门输出控制信号,当与门获取到低电平的OE信号时,与门向电平转换单元输出控制信号,进而在该控制信号的控制下通过输出缓冲器向第二条栅线输出驱动电压;这样在CPV信号和OE信号共同控制下依次打开每级移位寄存器,从而实现逐行向第一条栅线至第M条栅线提供扫描信号。Taking the driving circuit module shown in FIG. 7 as an example, its driving process is described. Referring to Fig. 8, when the output start control terminal of the first-stage shift register obtains the high level of the STV signal, the drive circuit module starts to work; then in the next clock cycle T1 of the CPV signal, the first-stage The output terminal of the shift register outputs a control signal to the AND gate. When the AND gate obtains a low-level OE signal, the AND gate outputs the control signal to the level conversion unit, and then under the control of the control signal, the output buffer sends the The first gate line outputs the driving voltage; when the CPV signal is immediately followed by the clock cycle T2 of T1, the first-stage shift register stops working, the second-stage shift register starts to work, and the output of the second-stage shift register is sent to the AND gate Outputting a control signal, when the AND gate obtains a low-level OE signal, the AND gate outputs the control signal to the level conversion unit, and then outputs the driving voltage to the second gate line through the output buffer under the control of the control signal; In this way, under the common control of the CPV signal and the OE signal, each stage of the shift register is sequentially turned on, so as to provide scanning signals to the first gate line to the Mth gate line row by row.
这里需要说明的是,本发明实施例提供的显示装置中包括的驱动电路模块的结构可以是如图7所示,只是各个驱动电路模块获取的STV信号的来源不同。示例的,若第一驱动电路模块驱动的n1条栅线按照扫描顺序排列在最前,则第一驱动电路模块中第一级移位寄存器的输出起始控制端可以电连接时序控制板的起始控制信号输出端;再例如,第二驱动电路模块中第一级移位寄存器的输出起始控制端可以电连接n2条栅线中按照扫描顺序排列的第一条栅线;再例如,第三驱动电路模块中第一级移位寄存器的输出起始控制端可以电连接n3条栅线中按照扫描顺序排列的第一条栅线,或者电连接时序控制板的起始控制信号输出端。It should be noted here that the structure of the driving circuit modules included in the display device provided by the embodiment of the present invention may be as shown in FIG. 7 , but the source of the STV signal obtained by each driving circuit module is different. For example, if the n1 gate lines driven by the first driving circuit module are arranged at the front in the scanning order, the output start control terminal of the first-stage shift register in the first drive circuit module can be electrically connected to the start control terminal of the timing control board. start control signal output terminal; for another example, the output start control terminal of the first-stage shift register in the second drive circuit module can be electrically connected to the first gate line arranged in the scanning order among the n 2 gate lines; for another example, The output start control terminal of the first-stage shift register in the third drive circuit module can be electrically connected to the first gate line arranged in the scanning order among the n 3 gate lines, or electrically connected to the start control signal output of the timing control board end.
实施例二Embodiment two
本发明实施例提供一种显示装置的驱动方法,该显示装置的结构可以是如图3所示;该方法包括:An embodiment of the present invention provides a method for driving a display device. The structure of the display device may be as shown in FIG. 3; the method includes:
在一个扫描周期内,第一驱动电路模块6向n1条栅线提供扫描信号;In one scan period, the first drive circuit module 6 provides scan signals to n1 gate lines;
在第一驱动电路模块6向n1条栅线中按照扫描顺序排列的第n1-m1+1条栅线提供扫描信号后,第二驱动电路模块7开启;After the first driving circuit module 6 provides scanning signals to the n 1 -m 1 +1th gate lines arranged in the scanning order among the n 1 gate lines, the second driving circuit module 7 is turned on;
第二驱动电路模块7向n1条栅线中按照扫描顺序排列在最后的m1-1条栅线提供扫描信号。The second driving circuit module 7 provides scanning signals to the last m 1 −1 gate lines arranged in the scanning order among the n 1 gate lines.
需要说明的是,扫描周期为显示装置显示一帧画面所用的时间。It should be noted that the scan period is the time taken by the display device to display one frame of picture.
本发明的实施例提供了一种显示装置的驱动方法,该方法包括:在一个扫描周期内,第一驱动电路模块向n1条栅线提供扫描信号;在第一驱动电路模块向n1条栅线中按照扫描顺序排列的第n1-m1+1条栅线提供扫描信号后,第二驱动电路模块开启;第二驱动电路模块向n1条栅线中按照扫描顺序排列在最后的m1-1条栅线提供扫描信号。这样,在一个扫描周期内,第二驱动电路模块向n1条栅线中按照扫描顺序排列在最后的m1-1条栅线提供扫描信号,即使第二驱动电路模块因负载变化导致栅极驱动电路模块输出的扫描信号电压降低,由于第一驱动电路模块仍然向这m1-1条栅线提供扫描信号,所以,不会导致这m1-1条栅线电压降低;从而在显示同一灰阶画面时,可以改善因栅线电压降低导致的相邻两个驱动电路模块所驱动的栅线的交界处产生的交界线,进而造成二分屏的问题。An embodiment of the present invention provides a method for driving a display device, the method comprising: within a scan period, the first drive circuit module provides scan signals to n 1 gate lines ; After the n 1 -m 1 + 1th gate line arranged in the scanning order among the gate lines provides the scanning signal, the second driving circuit module is turned on; m 1 -1 gate lines provide scanning signals. In this way, within one scanning period, the second driving circuit module provides scanning signals to the last m 1 -1 gate lines arranged in the scanning order among the n 1 gate lines, even if the second driving circuit module causes the gate line to change due to the load change. The voltage of the scanning signal output by the driving circuit module decreases, because the first driving circuit module still provides the scanning signal to the m 1 -1 gate lines, so the voltage of the m 1 -1 gate lines will not decrease; thus, when displaying the same In the case of a gray-scale image, the boundary line generated at the junction of the grid lines driven by two adjacent driving circuit modules due to the voltage reduction of the grid lines can be improved, thereby causing the problem of a two-split screen.
可选的,参考图4所示,上述至少两个驱动电路模块还包括第三驱动电路模块8,第三驱动电路模块8与连续排列的n3条栅线的第一端101电连接,且第三驱动电路模块8的输出起始控制端80与n3条栅线中按照扫描顺序排列的第一条栅线电连接,第三驱动电路模块8的信号输出端81与n3条栅线中剩下的n3-1条栅线电连接;其中,n3条栅线中按照扫描顺序排列在最前的m2条栅线与n2条栅线中按照扫描顺序排列在最后的m2条栅线为相同的栅线,且2≤m2≤n2-m1;则上述方法还包括:Optionally, as shown in FIG. 4 , the at least two drive circuit modules above further include a third drive circuit module 8, the third drive circuit module 8 is electrically connected to the first ends 101 of the n 3 gate lines arranged continuously, and The output start control terminal 80 of the third drive circuit module 8 is electrically connected to the first gate line arranged in the scanning order among the n 3 gate lines, and the signal output terminal 81 of the third drive circuit module 8 is connected to the n 3 gate lines The remaining n 3 -1 grid lines are electrically connected; wherein, among the n 3 grid lines, the first m 2 grid lines are arranged in the scanning order and among the n 2 grid lines, the last m 2 grid lines are arranged in the scanning order The two grid lines are the same grid line, and 2≤m 2 ≤n 2 -m 1 ; then the above method also includes:
在一个扫描周期内,第二驱动电路模块7向n2条栅线提供扫描信号;In one scan period, the second drive circuit module 7 provides scan signals to n 2 gate lines;
在第二驱动电路模块7向n2条栅线中按照扫描顺序排列的第n2-m2+1条栅线提供扫描信号后,第三驱动电路模块8开启;After the second driving circuit module 7 provides scanning signals to the n 2 -m 2 +1th gate line arranged in the scanning order among the n 2 gate lines, the third driving circuit module 8 is turned on;
第三驱动电路模块8向n2条栅线中按照扫描顺序排列在最后的m2-1条栅线提供扫描信号。The third driving circuit module 8 provides scanning signals to the last m 2 -1 gate lines arranged in the scanning order among the n 2 gate lines.
这样,当第三驱动电路模块开始向n2条栅线中按照扫描顺序排列在最后的m2-1条栅线提供扫描信号时,即使第三驱动电路模块因负载变化导致驱动电路模块输出的扫描信号电压降低,由于第二驱动电路模块仍然向这m2-1条栅线提供扫描信号,所以,不会导致这m2-1条栅线电压降低;从而在显示同一灰阶画面时,可以改善因栅线电压降低导致的第二驱动电路模块和第三驱动电路模块所驱动的栅线的交界处产生的交界线,进而造成二分屏的问题。In this way, when the third driving circuit module starts to provide scan signals to the last m2-1 gate lines in the scanning order among the n2 gate lines, even if the third driving circuit module causes the output of the driving circuit module to The voltage of the scanning signal decreases, because the second driving circuit module still provides scanning signals to the m 2 -1 gate lines, so the voltage of the m 2 -1 gate lines will not decrease; thus, when displaying the same grayscale picture, The junction line generated at the junction of the gate lines driven by the second driving circuit module and the third driving circuit module due to the voltage reduction of the gate lines can be improved, thereby causing the problem of two split screens.
可选的,参考图5所示,上述至少两个驱动电路模块还包括第三驱动电路模块8,第三驱动电路模块8的信号输出端81与连续排列的n3条栅线的第一端101电连接,且第三驱动电路模块8的输出起始控制端80与显示装置的时序控制板9的起始控制信号输出端91电连接;其中,n2条栅线与n3条栅线连续排列;则上述方法还包括:Optionally, as shown in FIG. 5 , the above-mentioned at least two drive circuit modules further include a third drive circuit module 8, the signal output terminal 81 of the third drive circuit module 8 is connected to the first ends of the n 3 gate lines arranged continuously 101 is electrically connected, and the output initial control terminal 80 of the third drive circuit module 8 is electrically connected to the initial control signal output terminal 91 of the timing control board 9 of the display device; wherein, n 2 gate lines and n 3 gate lines Continuous arrangement; then the above method also includes:
在一个扫描周期内,第二驱动电路模块向n2条栅线提供扫描信号;In one scan period, the second drive circuit module provides scan signals to n 2 gate lines;
显示装置的时序控制板9的起始控制信号输出端90向第三驱动电路模块8的输出起始控制端80输出开启信号;The initial control signal output terminal 90 of the timing control board 9 of the display device outputs a start signal to the output initial control terminal 80 of the third drive circuit module 8;
第三驱动电路模块8向n3条栅线提供扫描信号。The third driving circuit module 8 provides scanning signals to n 3 gate lines.
这样,n2条栅线中按照扫描顺序排列在最后的n2-m1条栅线仅由第二驱动电路模块驱动,而第三驱动电路模块按照扫描顺序驱动n3条栅线,相较于图4所示的显示装置,可以提高驱动电路模块的利用率,但是图4所示的显示装置可以进一步改善第二驱动电路模块与第三驱动电路模块所驱动的栅线的交界处产生的交界线,进一步提高显示画面的质量。In this way, the last n 2 -m 1 gate lines arranged in the scanning order among the n 2 gate lines are only driven by the second driving circuit module, while the third driving circuit module drives the n 3 gate lines in the scanning order. In the display device shown in FIG. 4 , the utilization rate of the driving circuit module can be improved, but the display device shown in FIG. 4 can further improve the noise generated at the junction of the gate lines driven by the second driving circuit module and the third driving circuit module. The boundary line further improves the quality of the displayed picture.
需要说明的是,若上述显示装置包括三个以上的驱动电路模块,多个驱动电路模块按照扫描顺序驱动多条栅线,则除了第一个和最后一个驱动电路模块,其他任意一个驱动电路模块都与两个驱动电路模块相邻,那么当前驱动电路模块与上一个相邻的驱动电路模块分别与栅线的电连接结构可以是如3所示,当前驱动电路模块与下一个相邻的驱动电路模块分别与栅线的电连接结构可以是如4所示或者如图5所示,这里不作具体限定,具体可以根据实际情况而定。为了最大程度上改善交界线现象,可以选择当前驱动电路模块与上一个相邻的驱动电路模块分别与栅线的电连接结构如3所示,当前驱动电路模块与下一个相邻的驱动电路模块分别与栅线的电连接结构如4所示,这样任意两个相邻的驱动电路模块所驱动的栅线的交界处产生的交界线均可以得到改善。It should be noted that, if the above-mentioned display device includes more than three driving circuit modules, and the multiple driving circuit modules drive a plurality of gate lines in a scanning order, except for the first and last driving circuit modules, any other driving circuit modules Both are adjacent to two driving circuit modules, then the electrical connection structure between the current driving circuit module and the previous adjacent driving circuit module and the gate line can be as shown in 3, the current driving circuit module and the next adjacent driving circuit module The electrical connection structure between the circuit modules and the grid lines may be as shown in FIG. 4 or in FIG. 5 , which is not specifically limited here, but may be determined according to actual conditions. In order to improve the boundary line phenomenon to the greatest extent, the electrical connection structure between the current drive circuit module and the previous adjacent drive circuit module and the grid lines can be selected as shown in 3. The current drive circuit module and the next adjacent drive circuit module The electrical connection structure with the gate lines is shown in 4, so that the boundary line generated at the junction of the gate lines driven by any two adjacent driving circuit modules can be improved.
进一步需要说明的是,本发明实施例对于上述第一驱动电路模块驱动的n1条栅线在所有栅线中的具体排列位置不作限定,示例的,按照扫描顺序排列,n1条栅线可以位于最前,也可以位于中间,当然还可以是其他位置。It should be further noted that, the embodiment of the present invention does not limit the specific arrangement positions of the n 1 gate lines driven by the above-mentioned first driving circuit module among all the gate lines. For example, they are arranged in a scanning order, and the n 1 gate lines can be It can be at the front, it can also be in the middle, and of course it can be other positions.
下面以图3所示的显示装置为例,具体说明上述驱动方法。图3所示的显示装置满足:n1=15,n1-m1+1=9,m1=7;参考图9所示,该驱动方法具体包括:The above driving method will be specifically described below by taking the display device shown in FIG. 3 as an example. The display device shown in FIG. 3 satisfies: n 1 =15, n 1 -m 1 +1=9, m 1 =7; referring to FIG. 9 , the driving method specifically includes:
在一个扫描周期T内,第一驱动电路模块6向n1条栅线提供扫描信号;In a scanning period T, the first driving circuit module 6 provides scanning signals to n 1 gate lines;
在第一驱动电路模块6向n1条栅线中按照扫描顺序排列的第n1-m1+1条栅线提供扫描信号后,第二驱动电路模块7开启;After the first driving circuit module 6 provides scanning signals to the n 1 -m 1 +1th gate lines arranged in the scanning order among the n 1 gate lines, the second driving circuit module 7 is turned on;
第二驱动电路模块7向n1条栅线中按照扫描顺序排列在最后的m1-1条栅线提供扫描信号。The second driving circuit module 7 provides scanning signals to the last m 1 −1 gate lines arranged in the scanning order among the n 1 gate lines.
这样在不同的扫描周期,重复上述步骤,可以实现第1-9条栅线的单边驱动、第10条至第15条栅线的双边驱动,这样可以改善第一驱动电路模块和第二驱动电路模块所驱动的栅线的交界处产生的交界线,进而造成二分屏的问题。In this way, in different scanning periods, repeating the above steps can realize the unilateral drive of the 1st to 9th gate lines and the double-sided drive of the 10th to 15th gate lines, which can improve the first drive circuit module and the second drive. The boundary lines generated at the intersections of the gate lines driven by the circuit modules further cause the problem of two split screens.
需要说明的是,上述只是以显示装置包括第一驱动电路模块和第二驱动电路模块为例进行说明。若显示装置包括多个驱动电路模块时,相邻两个驱动电路模块所驱动的栅线采用双边驱动时的驱动方法与上述相类似,具体不再赘述。It should be noted that, the above is only described by taking the display device including the first driving circuit module and the second driving circuit module as an example. If the display device includes multiple driving circuit modules, the driving method when the gate lines driven by two adjacent driving circuit modules adopt double-sided driving is similar to the above, and details will not be repeated here.
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。The above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Anyone skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present invention. Should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be determined by the protection scope of the claims.
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