CN105607551A - 1553B bus information redundant electrical control system - Google Patents
1553B bus information redundant electrical control system Download PDFInfo
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- CN105607551A CN105607551A CN201610176368.2A CN201610176368A CN105607551A CN 105607551 A CN105607551 A CN 105607551A CN 201610176368 A CN201610176368 A CN 201610176368A CN 105607551 A CN105607551 A CN 105607551A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0421—Multiprocessor system
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24182—Redundancy
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
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Abstract
The invention provides a 1553B bus information redundant electrical control system, comprising a master system and a slave system. The master system and the slave system isolate electrical input and information processing processes via an optical isolation circuit, and output finally output homogeneous control instructions in parallel; when any of the master system and the slave system has a fault, the performance of the product is not influenced; the hardware of the master system and the slave system is completely designed by using domestic products, so that the reliability of the product is effectively improved; and the master system and the slave system have symmetrical printed boards and consistent software, so that similar problems can be conveniently checked and analyzed.
Description
Technical field
The present invention relates to a kind of 1553B bus message redundancy electric control system, belong to electric-controlledTechnical field processed.
Background technology
Certain type product information electric control system is used 1553B bus communication, adopts 1553B busA channel and B passage fully redundance characteristic design, in the time that A channel bus breaks down, and rootAccording to 1553B bus protocol regulation, system will be obtained B channel information immediately, utilize 1553B busB channel information process, this redundancy model effectively improves the reliability of system. And when letterWhile there is gross error fault in hardware, the software of breath electric control system, the damage of for example components and partsWhen bad or software work sequential is chaotic, cause A channel information and B channel information all to occur event simultaneouslyBarrier, the characteristic of 1553B redundancy is difficult to guarantee information treatment system reliably working.
Summary of the invention
For solving the problems of the technologies described above, the invention provides a kind of 1553B bus message redundant electricGas control system, this 1553B bus message redundancy electric control system can detect current system workMake state, take hardware, software full redundancy designing technique, when wherein the appearance of main system function is differentWhen normal fault, provide normal control signal from system.
The present invention is achieved by the following technical programs.
A kind of 1553B bus message redundancy electric control system provided by the invention, comprises principal seriesUnify from system; Described main system comprises main power conversion circuit, main FPGA processor, masterCrystal oscillator, principal voltage change-over circuit, key light buffer circuit, Master Bus Controller, main ACommunication transformation coupler, main B communication transformation coupler, describedly comprise from power supply and changing from systemCircuit, from FPGA processor, from crystal oscillator, from voltage conversion circuit, isolate from lightCircuit, from bus control unit, from A communication transformation coupler, from B communication transformation coupler; MainPower-switching circuit connects respectively main FPGA processor and host crystal oscillator, and main FPGA processesDevice is connected with host crystal oscillator, and it is defeated that main FPGA processor is connected to principal voltage change-over circuitEnter end, principal voltage change-over circuit output connects respectively key light buffer circuit and Master Bus ControllerInput, Master Bus Controller output connects respectively main A communication transformation coupler and main BCommunication transformation coupler, output is connected main A communication transformation coupler with main B communication transformation couplerThe electric interfaces of coupling; Connect respectively from FPGA processor with from crystal from power-switching circuitOscillator, from FPGA processor be connected from crystal oscillator, connect from FPGA processorTo from voltage conversion circuit input, connect respectively from light and isolate from voltage conversion circuit outputCircuit and from the input of bus control unit, connects respectively from A logical from bus control unit outputLetter transformation coupler and the transformation coupler of communicate by letter from B, from A communicate by letter transformation coupler with communicate by letter from BThe electric interfaces of transformation coupler output matching connection; Key light buffer circuit and from optically coupled isolation circuitOutput output in parallel.
Described main power conversion circuit and access respectively 5V power supply, main power source from power-switching circuitChange-over circuit is to main FPGA processor and host crystal oscillator output supply 3.3V voltage, also to masterFPGA processor output 1.5V voltage, from power-switching circuit to from FPGA processor with from crystalline substanceOscillation body device output supply 3.3V voltage, also to exporting 1.5V voltage from FPGA processor; MainFPGA processor is to the Transistor-Transistor Logic level of principal voltage change-over circuit output 3.3V, principal voltage change-over circuitThe Transistor-Transistor Logic level of 3.3V is converted to the Transistor-Transistor Logic level output of 5V; From FPGA processor to turning from voltageThe Transistor-Transistor Logic level that changes circuit output 3.3V, is converted to the Transistor-Transistor Logic level of 3.3V from voltage conversion circuitThe Transistor-Transistor Logic level output of 5V; Described key light buffer circuit and be also connected to respectively 24V from optically coupled isolation circuitVoltage input; Described host crystal oscillator provides 50MHz frequency of oscillation to main FPGA processor,From crystal oscillator to providing 50MHz frequency of oscillation from FPGA processor.
Described main FPGA processor and be Shenzhen Guo Wei company from FPGA processorSMQ2V1000-FG256。
Described main config memory and be Shenzhen Guo Wei company from config memorySM16PFSG48M。
Described host crystal oscillator and be Liaoyang Hong Yu quartz crystal device factory from crystal oscillatorZA51EB3-50。
Described principal voltage change-over circuit and be Shenzhen Guo Wei company from voltage conversion circuitSM164245。
Described key light buffer circuit and be Kweiyang space flight electrical equipment company from optically coupled isolation circuitJGW-3M or JGC-3036.
Described Master Bus Controller and be the SM6150 of Shenzhen Guo Wei company from bus control unit.
Described main A communication transformation coupler, main B communication transformation coupler, from A communication transformation couplingClose device, be the M21038/27-26 of Shenzhen Guo Wei company from B communication transformation coupler.
Beneficial effect of the present invention is: 1. main system, undertaken by optically coupled isolation circuit from systemElectric input, information process are isolated mutually, by the finally similar control instruction parallel connection of outputOutput, main system, with any one is out of order from system, does not all affect properties of product; 2. principal seriesSystem, from system hardware, absolutely use production domesticization product design, effectively improving product canLean on property; 3. main system, realize symmetric configuration from the printed board design of system, software version is consistent,Being convenient to Similar Problems investigation analyzes.
Brief description of the drawings
Fig. 1 is connection diagram of the present invention;
In figure: 11-main power conversion circuit, the main FPGA processor of 12-, the main config memory of 13-,14-host crystal oscillator, 15-principal voltage change-over circuit, 16-key light buffer circuit, 17-master is totalLane controller, the main A communication of 18-transformation coupler, the main B communication of 19-transformation coupler, 21-is from electricityPower-switching circuit, 22-is from FPGA processor, and 23-is from config memory, and 24-is from crystal oscillator,25-is from voltage conversion circuit, and 26-is from optically coupled isolation circuit, and 27-is from bus control unit, and 28-is logical from ALetter transformation coupler, 29-is from B communication transformation coupler.
Detailed description of the invention
Further describe technical scheme of the present invention below, but claimed scope is not limited toIn described.
A kind of 1553B bus message redundancy electric control system as shown in Figure 1, comprises main systemWith from system; Described main system comprise main power conversion circuit 11, main FPGA processor 12,Host crystal oscillator 14, principal voltage change-over circuit 15, key light buffer circuit 16, main bus controlDevice 17, main A communication transformation coupler 18, main B communication transformation coupler 19, described from system bagDraw together from power-switching circuit 21, from FPGA processor 22, from crystal oscillator 24, from voltageChange-over circuit 25, from optically coupled isolation circuit 26, from bus control unit 27, from the coupling of A communication transformationDevice 28, from B communication transformation coupler 29; Main power conversion circuit 11 connects respectively main FPGA placeReason device 12 and host crystal oscillator 14, main FPGA processor 12 is connected with host crystal oscillator 14Connect, main FPGA processor 12 is connected to principal voltage change-over circuit 15 inputs, principal voltage conversionCircuit 15 outputs connect respectively the input of key light buffer circuit 16 and Master Bus Controller 17,Master Bus Controller 17 outputs connect respectively the change of communicating by letter with main B of main A communication transformation coupler 18Press coupler 19,19 outputs are connected main A communication transformation coupler 18 with main B communication transformation couplerThe electric interfaces of coupling; From power-switching circuit 21 connect respectively from FPGA processor 22 and fromCrystal oscillator 24, from FPGA processor 22 be connected from crystal oscillator 24, from FPGAProcessor 22 is connected to from voltage conversion circuit 25 inputs, from voltage conversion circuit 25 outputsConnect respectively from optically coupled isolation circuit 26 with from the input of bus control unit 27, from bus control unit27 outputs connect respectively from A communication transformation coupler 28 and the transformation coupler 29 of communicating by letter from B, fromA communication transformation coupler 28 is exported the electric of matching connection with the transformation coupler 29 of communicating by letter from B and is connectMouthful; Key light buffer circuit 16 and from the output in parallel of the output of optically coupled isolation circuit 26.
Described main power conversion circuit 11 and adopt Shenzhen Guo Wei company from power-switching circuit 21The low linear voltage regulator of SM74401 type, accesses respectively 5V power supply, and main power conversion circuit 11 is to masterFPGA processor 12 and host crystal oscillator 14 output supply 3.3V voltages, also to main FPGA placeReason device 12 is exported 1.5V voltage, from power-switching circuit 21 to from FPGA processor 22 with from crystalOscillator 24 output supply 3.3V voltages, also to exporting 1.5V voltage from FPGA processor 22; MainFPGA processor 12 is exported the Transistor-Transistor Logic level of 3.3V to principal voltage change-over circuit 15, principal voltage conversionCircuit 15 is converted to the Transistor-Transistor Logic level of 3.3V the Transistor-Transistor Logic level output of 5V; From FPGA processor 22To the Transistor-Transistor Logic level of exporting 3.3V from voltage conversion circuit 25, from voltage conversion circuit 25 by 3.3VTransistor-Transistor Logic level be converted to the Transistor-Transistor Logic level output of 5V; Described key light buffer circuit 16 and isolating from lightCircuit 26 is also connected to respectively the input of 24V voltage; Described host crystal oscillator 14 is processed to main FPGADevice 12 provides 50MHz frequency of oscillation, from crystal oscillator 24 to providing from FPGA processor 2250MHz frequency of oscillation.
Described main FPGA processor 12 and adopt Shenzhen Guo Wei company from FPGA processor 22SMQ2V1000-FG256, is mainly used in to Master Bus Controller 17 or from bus control unit 27Carry out functional configuration, and communicate by letter with control machine in outside by 1553B bus protocol; According to 1553BCommunication information output products control instruction is to key light buffer circuit 16 or from optically coupled isolation circuit 26; AndAnd can also enter to key light buffer circuit 16 or from optically coupled isolation circuit 26 output state correctnessRow detects; Design by clock division, provide Master Bus Controller 17 or from bus control unit 27With 16MHz work clock.
Described main config memory 13 and adopt Shenzhen Guo Wei company from config memory 23SM16PFSG48M, for storing FPGA messaging software, when 1553B bus message redundancyWhen electric control system powers on, software code is loaded into main FPGA processor 12 or from FPGAReason device 22 internal operations.
Described host crystal oscillator 14 and adopt Liaoyang letter space quartz crystal device from crystal oscillator 24The ZA51EB3-50 of factory, for export 50MHz clock signal give main FPGA processor 12 or fromFPGA processor 22 uses.
Described principal voltage change-over circuit 15 and adopt Shenzhen Guo Wei company from voltage conversion circuit 25SM164245, for the conversion of+3.3V signal level and+5V signal voltage transitions, carry simultaneouslyRise the driving force of signal transmission.
Described key light buffer circuit 16 and adopt Kweiyang space flight electrical equipment company from optically coupled isolation circuit 26JGW-3M or JGC-3036, wherein JGW-3M type device allows direct current 1.6A input, makes altogetherWith controlling output in 3 tunnels; JGC-3036 type device allows direct current 0.25A input, uses altogether 14 tunnel controlsSystem output, photovoltaic solid-state relay is for output in parallel again after master and slave isolation of system. ReallyProtect isolation completely in the master and slave system electrical of product.
Described Master Bus Controller 17 and adopt Shenzhen Guo Wei company from bus control unit 27SM6150,1553B bus transfer rate reaches 1Mbps, has transmitted in both directions special raw and real-timeProperty. By principal voltage change-over circuit 15 with main FPGA processor 12, from voltage conversion circuit 25With communicating by letter from FPGA processor 12.
Described main A communication transformation coupler 18, main B communication transformation coupler 19, become from A communicationPress coupler 28, adopt Shenzhen Guo Wei company from B communication transformation coupler 29M21038/27-26, for the electric interfaces coupling connecting between 1553B bus termination.
Claims (9)
1. a 1553B bus message redundancy electric control system, comprises main system and from system,It is characterized in that: described main system comprises main power conversion circuit (11), main FPGA processor(12), host crystal oscillator (14), principal voltage change-over circuit (15), key light buffer circuit(16), Master Bus Controller (17), main A communication transformation coupler (18), the main B change of communicating by letterPress coupler (19), describedly comprise from power-switching circuit (21), from FPGA from systemReason device (22), from crystal oscillator (24), from voltage conversion circuit (25), isolate from lightCircuit (26), from bus control unit (27), from A communication transformation coupler (28), logical from BLetter transformation coupler (29); Main power conversion circuit (11) connects respectively main FPGA processor(12) and host crystal oscillator (14), main FPGA processor (12) and host crystal oscillator(14) be connected, main FPGA processor (12) is connected to principal voltage change-over circuit (15)Input, principal voltage change-over circuit (15) output connects respectively key light buffer circuit (16)And the input of Master Bus Controller (17), Master Bus Controller (17) output connects respectivelyConnect main A communication transformation coupler (18) the transformation coupler (19) of communicating by letter with main B, main A communicates by letterTransformation coupler (18) the electric of transformation coupler (19) output matching connection of communicating by letter with main BInterface; Connect respectively from FPGA processor (22) with from crystalline substance from power-switching circuit (21)Oscillation body device (24), from FPGA processor (22) be connected from crystal oscillator (24),Be connected to from voltage conversion circuit (25) input, from voltage from FPGA processor (22)Change-over circuit (25) output connects respectively from optically coupled isolation circuit (26) with from bus control unit(27) input, connects respectively from A communication transformation from bus control unit (27) outputCoupler (28) and the transformation coupler (29) of communicating by letter from B, from A communication transformation coupler (28)Electric interfaces with transformation coupler (29) the output matching connection of communicating by letter from B; Key light isolation electricityRoad (16) and from the output in parallel of the output of optically coupled isolation circuit (26).
2. 1553B bus message redundancy electric control system as claimed in claim 1, its spyLevy and be: described main power conversion circuit (11) and connecing respectively from power-switching circuit (21)Enter 5V power supply, main power conversion circuit (11) is to main FPGA processor (12) and host crystalOscillator (14) output supply 3.3V voltage, also to main FPGA processor (12) output 1.5VVoltage, from power-switching circuit (21) to from FPGA processor (22) with from crystal oscillationDevice (24) output supply 3.3V voltage, also to exporting 1.5V voltage from FPGA processor (22);Main FPGA processor (12) is exported the Transistor-Transistor Logic level of 3.3V to principal voltage change-over circuit (15),Principal voltage change-over circuit (15) is converted to the Transistor-Transistor Logic level of 3.3V the Transistor-Transistor Logic level output of 5V; FromFPGA processor (22) is to the Transistor-Transistor Logic level from voltage conversion circuit (25) output 3.3V, fromVoltage conversion circuit (25) is converted to the Transistor-Transistor Logic level of 3.3V the Transistor-Transistor Logic level output of 5V; DescribedKey light buffer circuit (16) and be also connected to respectively 24V voltage input from optically coupled isolation circuit (26);Described host crystal oscillator (14) provides 50MHz frequency of oscillation to main FPGA processor (12),From crystal oscillator (24) to providing 50MHz frequency of oscillation from FPGA processor (22).
3. 1553B bus message redundancy electric control system as claimed in claim 1 or 2, itsBe characterised in that: described main FPGA processor (12) and from FPGA processor (22) for ShenzhenThe SMQ2V1000-FG256 of Guo Wei company.
4. 1553B bus message redundancy electric control system as claimed in claim 1 or 2, itsBe characterised in that: described main config memory (13) and from config memory (23) for Shenzhen stateThe SM16PFSG48M of micro-company.
5. 1553B bus message redundancy electric control system as claimed in claim 1 or 2, itsBe characterised in that: described host crystal oscillator (14) and be Liaoyang letter from crystal oscillator (24)The space quartz crystal device ZA51EB3-50 of factory.
6. 1553B bus message redundancy electric control system as claimed in claim 1 or 2, itsBe characterised in that: described principal voltage change-over circuit (15) and from voltage conversion circuit (25) for darkThe SM164245 of Zhen Guowei company.
7. 1553B bus message redundancy electric control system as claimed in claim 1 or 2, itsBe characterised in that: described key light buffer circuit (16) and be Kweiyang boat from optically coupled isolation circuit (26)The JGW-3M of it electrical equipment company or JGC-3036.
8. 1553B bus message redundancy electric control system as claimed in claim 1 or 2, itsBe characterised in that: described Master Bus Controller (17) and from bus control unit (27) for Shenzhen stateThe SM6150 of micro-company.
9. 1553B bus message redundancy electric control system as claimed in claim 1 or 2, itsBe characterised in that: described main A communication transformation coupler (18), main B communication transformation coupler (19),Be the micro-public affairs of Shenzhen state from A communication transformation coupler (28), from B communication transformation coupler (29)The M21038/27-26 of department.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610176368.2A CN105607551A (en) | 2016-03-24 | 2016-03-24 | 1553B bus information redundant electrical control system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610176368.2A CN105607551A (en) | 2016-03-24 | 2016-03-24 | 1553B bus information redundant electrical control system |
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| CN201610176368.2A Pending CN105607551A (en) | 2016-03-24 | 2016-03-24 | 1553B bus information redundant electrical control system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107070762A (en) * | 2017-03-13 | 2017-08-18 | 北京航天自动控制研究所 | A kind of fault detect for taking into account 1553B double character coupling performance monitorings and switching method |
| CN107360024A (en) * | 2017-06-30 | 2017-11-17 | 中航光电科技股份有限公司 | A kind of changeable 1553B bus couplers of passage |
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| CN107360024A (en) * | 2017-06-30 | 2017-11-17 | 中航光电科技股份有限公司 | A kind of changeable 1553B bus couplers of passage |
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Application publication date: 20160525 |