CN105579963A

CN105579963A - Task handling apparatus and method, and electronic device

Info

Publication number: CN105579963A
Application number: CN201480034730.1A
Authority: CN
Inventors: 徐胜新; 崔爱国; 祝建华
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2014-09-03
Filing date: 2014-09-03
Publication date: 2016-05-11
Anticipated expiration: 2034-09-03
Also published as: CN105579963B; WO2016033755A1

Abstract

A task handling apparatus and method, and an electronic device. The method comprises: running at least one thread in a user layer (701); running an operating system in the thread, the operating system being used for handling a task (702); and in a task execution process, performing interrupt handling and/or task scheduling by means of the operating system in the thread (703). The problem of influence on the timeliness of a task handling process due to a larger delay for a single-time interrupt handling process and a task scheduling process caused by the fact that the interrupt handling process and the task scheduling process are implemented by repeated switching to a Linux kernel layer is solved. Effects of directly completing the interrupt handling and/or the task scheduling in the user layer without handling by the repeated switching to the kernel layer, shortening consumed time for the interrupt handling and/or the task scheduling and improving the timeliness of task handling are achieved.

Description

Task Processing Unit, electronic equipment and method

Technical field

The present invention relates to operating system field, more particularly to a kind of Task Processing Unit, electronic equipment and method.

Background technology

In the field of telecommunications, the processing of high real-time business is realized using (SuSE) Linux OS more and more.

Fig. 1 is refer to, it illustrates a kind of configuration diagram that high real-time business is handled using (SuSE) Linux OS.The framework includes hardware layer 120, Linux inner core 140 and client layer 160.Client layer 160 can run at least one thread 162, and each thread 162 is used to handle task.The task scheduling process and interrupt response process of each thread 162 are mainly realized by Linux inner core 140.

During the present invention is realized, inventor has found that prior art at least has problems with：Because task scheduling process and interrupt response process are mainly realized by Linux inner core 140, need repeatedly to switch to during the task scheduling process or interrupt response of single and handled in Linux inner core 140, the delay of the task scheduling process or interrupt response process of single can be caused larger, the real-time of task processes is have impact on.

The content of the invention

Need repeatedly to switch in Linux inner core and handled to solve task scheduling process and interrupt response process, cause the delay of the task scheduling process or interrupt response process of single larger, the problem of have impact on the real-time of task processes, the embodiments of the invention provide a kind of Task Processing Unit, method and electronic equipment.The technical scheme is as follows：

According to the first aspect of the invention there is provided a kind of Task Processing Unit, described device includes：

First operation module, for running at least one thread in client layer；

Second operation module, for running operating system in the thread, the operating system is used to handle task；

Task processing module, for during the task is handled, interrupt response and/or task scheduling to be carried out by the operating system in the thread.

In the first possible embodiment of first aspect, the task processing module, including：

Request reception unit, the interrupt requests for receiving interrupt source by inner nuclear layer；

Ask transmission unit, the operating system for the interrupt requests to be transferred to corresponding thread in the client layer by the inner nuclear layer；

The interrupt requests are carried out interrupt response by request-response unit for the interrupt handling routine by the operating system of corresponding thread in the client layer.

With reference to the first possible embodiment of first aspect, in second of possible embodiment, the request transmission unit, including：

First preserves subelement, the operation scene for preserving the thread being interrupted in the core stack of the inner nuclear layer, and the operation scene includes the first User space location of instruction；

Shift subelement, for the first User space location of instruction to be stored from the second storage location that the first storage location in the core stack is transferred in shared memory, and by interrupt requests storage to the 3rd storage location in the shared memory, the shared memory is the memory block that the inner nuclear layer and the client layer can be accessed；

Storing sub-units are interrupted, the initial order position for the interrupt handling routine in the operating system for the thread being interrupted described in storage in the first storage location in the core stack；

Subelement is exited, for exiting response of the inner nuclear layer to the interrupt requests.

With reference to second of possible embodiment of first aspect, in the third possible embodiment, the request-response unit, including：

First recovers subelement, in the thread being interrupted described in recovery, the initial order position of the interrupt handling routine of the operating system to be read from the first storage location of the core stack；

Second preserves subelement, the operation scene for preserving being interrupted for task in the user stack of the thread, and the operation scene includes the second user state location of instruction；

Stack switching subelement, for switching to interrupt stack from the user stack；

Interrupt response subelement, interrupt response is carried out for reading the interrupt requests from the shared memory, and based on the interrupt stack；

Second recovers subelement, for after the interrupt response terminates, recover described in being interrupted of the task or another need the task of priority scheduling.

With reference to the third possible embodiment of first aspect, in the 4th kind of possible embodiment, the request-response unit, in addition to：

Subelement is replaced, for by the second user state location of instruction preserved in the user stack, replacing For the first User space location of instruction preserved in the second storage location of the shared memory；

Described second recovers subelement, for the operation scene by being preserved in the user stack, being interrupted described in recovery for task.

With reference to the 4th kind of possible embodiment of the third possible embodiment or first aspect of second possible embodiment or first aspect of the first possible embodiment or first aspect of first aspect or first aspect, in the 5th kind of possible embodiment, the task processing module, including：

Task switching unit, for when switching to the second task from first task, the operation scene for the first task being interrupted is preserved by the operating system, the operation scene of the first task includes the lock interrupting information of register information, the 3rd User space location of instruction and the first task；

First acquisition unit, the operation scene for obtaining second task by the operating system, the operation scene of second task includes the lock interrupting information of register information, the fourth user state location of instruction and second task；

First recovery unit, the second task and is handled by the operating system according to the operation in-situ FTIR spectroelectrochemitry of second task.

With reference to the 4th kind of possible embodiment of the third possible embodiment or first aspect of second possible embodiment or first aspect of the first possible embodiment or first aspect of first aspect or first aspect, in the 6th kind of possible embodiment, the task processing module, including：

Task detection unit, at the end of an interrupt response, detecting whether to exist by the operating system to need the 3rd task of priority scheduling；

Second acquisition unit, for when there is three task, the operation scene of the 3rd task is obtained by the operating system, the operation scene of the 3rd task includes the lock interrupting information of register information, the 5th User space location of instruction and the 3rd task；

Second recovery unit, for the 3rd task and being handled according to the operation in-situ FTIR spectroelectrochemitry of the 3rd task by the operating system.

According to the second aspect of the invention there is provided a kind of electronic equipment, the electronic equipment includes：Processor and memory；

The memory is used to store one or more than one instruction, described to instruct for realizing a kind of task processing method；

Methods described order includes：

At least one thread is run in client layer；

Operating system is run in the thread, the operating system is used to handle task；

During the task is handled, interrupt response and/or task scheduling are carried out by the operating system in the thread；

The processor is used to perform the instruction.

In the first possible embodiment of second aspect, also it is stored with for performing the instruction operated below：

The interrupt requests of interrupt source are received by inner nuclear layer；

The interrupt requests are transferred to the operating system of corresponding thread in the client layer by the inner nuclear layer；

Interrupt response is carried out to the interrupt requests by the interrupt handling routine of the operating system of corresponding thread in the client layer；

The processor is used to perform the instruction.

With reference to the first possible embodiment of second aspect, in second of possible embodiment, also it is stored with for performing the instruction operated below：

The operation scene for the thread being interrupted is preserved in the core stack of the inner nuclear layer, the operation scene includes the first User space location of instruction；

The first User space location of instruction is stored from the second storage location that the first storage location in the core stack is transferred in shared memory, and the interrupt requests are stored to the 3rd storage location in the shared memory；

The initial order position of interrupt handling routine in the operating system for the thread being interrupted in the first storage location in the core stack described in storage；

Exit response of the inner nuclear layer to the interrupt requests；

The processor is used to perform the instruction.

In second of possible embodiment with reference to second aspect, in the third possible embodiment, the memory is also stored with for performing the instruction operated below：

In the thread being interrupted described in recovery, the initial order position of the interrupt handling routine of the operating system is read from the first storage location of the core stack；

The operation scene of being interrupted for task is preserved in the user stack of the thread, the operation scene includes the second user state location of instruction；

Interrupt stack is switched to from the user stack；

The interrupt requests are read from the shared memory, and interruption sound is carried out based on the interrupt stack Should；

After the interrupt response terminates, recover described in being interrupted of the task or another need the task of priority scheduling；

The processor is used to perform the instruction.

In the third possible embodiment with reference to second aspect, in the 4th kind of possible embodiment, also it is stored with for performing the instruction operated below：

By the second user state location of instruction preserved in the user stack, the first User space location of instruction preserved in the second storage location for replacing with the shared memory；

By the operation scene preserved in the user stack, being interrupted described in recovery for task；

The processor is used to perform the instruction.

With reference to the 4th kind of possible embodiment of the third possible embodiment or second aspect of second possible embodiment or second aspect of the first possible embodiment or second aspect of second aspect or second aspect, in the 5th kind of possible embodiment, also it is stored with for performing the instruction operated below：

When switching to the second task from first task, the operation scene for the first task being interrupted is preserved by the operating system, the operation scene of the first task includes the lock interrupting information of register information, the 3rd User space location of instruction and the first task；

The operation scene of second task is obtained by the operating system, the operation scene of second task includes the lock interrupting information of register information, the fourth user state location of instruction and second task；

The second task and handled according to the operation in-situ FTIR spectroelectrochemitry of second task by the operating system；

The processor is additionally operable to perform the instruction.

With reference to the 4th kind of possible embodiment of the third possible embodiment or second aspect of second possible embodiment or second aspect of the first possible embodiment or second aspect of second aspect or second aspect, in the 6th kind of possible embodiment, also it is stored with for performing the instruction operated below：

At the end of an interrupt response, detecting whether to exist by the operating system needs the 3rd task of priority scheduling；

When there is three task, the operation scene of the 3rd task is obtained by the operating system, the operation scene of the 3rd task includes the lock interrupting information of register information, the 5th User space location of instruction and the 3rd task；

The 3rd task and handled according to the operation in-situ FTIR spectroelectrochemitry of the 3rd task by the operating system；

The processor is additionally operable to perform the instruction.

The third aspect according to embodiments of the present invention includes there is provided a kind of task processing method, methods described：

At least one thread is run in client layer；

During the task is handled, interrupt response and/or task scheduling are carried out by the operating system in the thread.

It is described during the task is handled in the first possible embodiment of the third aspect, interrupt response is carried out by the operating system in the thread, including：

Interrupt response is carried out to the interrupt requests by the interrupt handling routine of the operating system of corresponding thread in the client layer.

With reference to the first possible embodiment of the third aspect, in second of possible embodiment, the operating system that the interrupt requests are transferred to the corresponding thread in the client layer by the inner nuclear layer, including：

The first User space location of instruction is stored from the second storage location that the first storage location in the core stack is transferred in shared memory, and by interrupt requests storage to the 3rd storage location in the shared memory, the shared memory is the memory block that the inner nuclear layer and the client layer can be accessed；

Exit response of the inner nuclear layer to the interrupt requests.

With reference to second of possible embodiment of the third aspect, in the third possible embodiment, the interrupt handling routine by the operating system carries out interrupt response to the interrupt requests, including：

Interrupt stack is switched to from the user stack；

The interrupt requests are read from the shared memory, and interrupt response is carried out based on the interrupt stack；

After the interrupt response terminates, recover described in being interrupted of the task or another need the task of priority scheduling.

With reference to the third possible embodiment of the third aspect, in the 4th kind of possible embodiment, it is described switch to interrupt stack from the user stack before, in addition to：

It is described after the interrupt response terminates, recover described in being interrupted of the task, including：

By the operation scene preserved in the user stack, being interrupted described in recovery for task.

With reference to the 4th kind of possible embodiment of the third possible embodiment or the third aspect of second possible embodiment or the third aspect of the first possible embodiment or the third aspect of the third aspect or the third aspect, in the 5th kind of possible embodiment, it is described during the task is performed, task scheduling is carried out by the operating system in the thread, including：

The second task and handled according to the operation in-situ FTIR spectroelectrochemitry of second task by the operating system.

With reference to the third possible embodiment or the 4th kind of possible embodiment of second possible embodiment or the third aspect of the first possible embodiment or the third aspect of the third aspect or the third aspect, in the 6th kind of possible embodiment, it is described during the task is performed, task scheduling is carried out by the operating system in the thread, including：

When there is three task, the operation for obtaining the 3rd task by the operating system shows , the operation scene of the 3rd task includes the lock interrupting information of register information, the 5th User space location of instruction and the 3rd task；

The 3rd task and handled according to the operation in-situ FTIR spectroelectrochemitry of the 3rd task by the operating system.

The beneficial effect of technical scheme provided in an embodiment of the present invention is：

By running operating system in the thread of client layer, to carry out interrupt response and/or task scheduling；Solving interrupt response process and task scheduling process needs repeatedly to switch in Linux inner core and is handled, and causes the delay of the interrupt response process and task scheduling process of single larger, have impact on the real-time of task processes；Reach and interrupt response and/or task scheduling are done directly in client layer, inner nuclear layer need not repeatedly be switched to be handled, the time-consuming of interrupt response and/or task scheduling is reduced, real-time during task processing is improved, while the effect of the load of inner nuclear layer can also be reduced.

Brief description of the drawings

In order to illustrate more clearly of the technical scheme in prior art or the embodiment of the present invention, the accompanying drawing used required in being described below to embodiment is briefly described, apparently, drawings in the following description are only some embodiments of the present invention, for those of ordinary skill in the art, on the premise of not paying creative work, other accompanying drawings can also be obtained according to these accompanying drawings.

Fig. 1 is a kind of configuration diagram that high real-time business is handled using (SuSE) Linux OS；

Fig. 2 is the block diagram for the Task Processing Unit that one embodiment of the invention is provided；

Fig. 3 A are the block diagrams for the Task Processing Unit that another embodiment of the present invention is provided；

Fig. 3 B are the block diagrams for the request transmission unit that Fig. 3 A are provided；

Fig. 3 C are the block diagrams for the request-response unit that Fig. 3 A are provided；

Fig. 4 is the block diagram for the Task Processing Unit that yet another embodiment of the invention is provided；

Fig. 5 A are the block diagrams for the electronic equipment that one embodiment of the invention is provided；

Fig. 5 B are the block diagrams for the electronic equipment that another embodiment of the present invention is provided；

Fig. 6 A and Fig. 6 B respectively illustrate the structural representation of a kind of electronic equipment involved by task processing method provided in an embodiment of the present invention；

Fig. 7 is the method flow diagram for the task processing method that one embodiment of the invention is provided；

Fig. 8 is the method flow diagram for the task processing method that another embodiment of the present invention is provided；

Fig. 9 is the sub-step flow chart of the task processing method provided in embodiment illustrated in fig. 8；

Figure 10 is the sub-step flow chart of the task processing method provided in embodiment illustrated in fig. 8

Figure 11 is the method flow diagram for the task processing method that further embodiment of the present invention is provided；

Figure 12 is the sub-step flow chart of the task processing method provided in embodiment illustrated in fig. 11；

Figure 13 is the sub-step flow chart of the task processing method provided in embodiment illustrated in fig. 11.

Embodiment

To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing, embodiment of the present invention is described further in detail.

First to the present embodiments relate to some nouns carry out brief introduction：

Hardware layer：Hardware layer is the hardware foundation in electronic equipment, generally includes processor (English：Central Processing Unit, abbreviation：CPU) and memory, processor can be single-core processor or multi-core processor.The electronic equipment can be that the real-time that base station equipment, transmission equipment, industrial robot etc. are handled task has certain requirements electronic equipment.In global system for mobile communications (English：Global System for Mobile Communication, abbreviation：GSM) in system, base station equipment can be base transceiver station (English：Base Transmitter Station, abbreviation：BTS)；In the third generation (English：3rd-Generation, abbreviation：3G) in mobile communication technology, base station equipment can be node B (English：Node Base station, abbreviation：Node B)；In forth generation (English：The 4Generation, abbreviation：4G) in mobile communication technology, base station equipment can be evolved node B (English：Evolved Node Base station, abbreviation：eNB).

Inner nuclear layer and client layer：Inner nuclear layer is the layer of operating system nucleus, virtual memory space and driver application operation；Client layer is the layer of common applications operation.

Interrupt：Interruption refers to computer during performing, any extraordinary or unexpected event in need of immediate treatment occurs in system, so that processor temporarily interrupts the program being currently executing and turns to go to perform corresponding button.onrelease, the pending original place of being interrupted of rear and return that finishes continues executing with or dispatched the process that new process is performed.The event for interrupting generation is caused to be referred to as interrupt source.The request interrupt processing signal referred to as interrupt requests that interrupt source is sent to processor.The process that processor is handled interrupt requests referred to as interrupt response.

Core stack：Stack used in operating system nucleus.

User stack：Each thread has 1 itself used user stack, and the thread can be real-time thread or common thread.

Fig. 2 is refer to, the block diagram of the Task Processing Unit provided it illustrates one embodiment of the invention.The Task Processing Unit being implemented in combination with as electronic equipment by software, hardware or both It is all or part of.The Task Processing Unit includes：First operation module 220, second operation module 240 and task processing module 260.

First operation module 220, for running at least one thread in client layer.

Second operation module 240, for running operating system in thread, the operating system is used to handle task.An operating system can be run in each thread, the operating system is used to handle task.The operating system needs the function with complete independently interrupt response and/or task scheduling.Can be run in different threads in the operating system of same type, different threads can also run different types of operating system.The embodiment of the present invention is not specially limited to the type of aforesaid operations system.

Task is to refer to the manageable task of operating system.When electronic equipment is base station equipment, task can issue the task of dispatch command, the distributing channel resource of the task, the handling access request of the task etc..

Task processing module 260, for during processing task, interrupt response and/or task scheduling to be carried out by the operating system in thread.

In summary, the Task Processing Unit that the present embodiment is provided, interrupt response and/or task scheduling are carried out by the operating system in thread；Solving interrupt response process and task scheduling process needs repeatedly to switch in Linux inner core and is handled, and causes the delay of the interrupt response process and task scheduling process of single larger, have impact on the real-time of task processes；Reach and interrupt response and/or task scheduling are done directly in client layer, it is not necessary to repeatedly switched to inner nuclear layer and handled, reduced the time-consuming of interrupt response and/or task scheduling, the effect of real-time when improving task processing.

Simultaneously as the interrupt response and/or task scheduling in background technology are carried out by inner nuclear layer, so the load of inner nuclear layer is higher, the task processing method that the present embodiment is provided may also reach up the effect of the load of reduction inner nuclear layer.

Fig. 3 A are refer to, the block diagram of the Task Processing Unit provided it illustrates another embodiment of the present invention.The Task Processing Unit can be implemented in combination with all or part as electronic equipment by software, hardware or both.The Task Processing Unit includes：First operation module 220, for running at least one thread in client layer.

First operation module 220, for running at least one thread in client layer.

Second operation module 240, for running operating system in the thread that the first operation module 220 is run, the operating system is used to handle task.

Task processing module 260, for during processing task, the operating system run by the second operation module 240 in thread to carry out interrupt response.

In the present embodiment, task processing module 260, including：

Request reception unit 261, the interrupt requests for receiving interrupt source by inner nuclear layer.

Ask transmission unit 262, the operating system for the interrupt requests that request reception unit 261 is received to be transferred to corresponding thread in the client layer that the second operation module 240 is run by inner nuclear layer.

Request-response unit 263, the interrupt requests received for the interrupt handling routine by the operating system of corresponding thread in client layer to request transmission unit 262 carry out interrupt response.

With reference to shown in Fig. 3 B, request transmission unit 262 can include：

First preserves subelement 262a, the operation scene for preserving the thread being interrupted in the core stack of inner nuclear layer, and operation scene includes the first User space location of instruction.

Shift subelement 262b, for the first preservation subelement 262a first User space locations of instruction preserved to be stored from the second storage location that the first storage location in core stack is transferred in shared memory, and the interrupt requests for receiving request reception unit 261 store the 3rd storage location into shared memory, shared memory is the memory block that inner nuclear layer and client layer can be accessed.

Interrupt storing sub-units 262c, after the second storage location that the first User space location of instruction is transferred in shared memory from the first storage location in core stack is stored in transfer subelement 262b, the initial order position of the interrupt handling routine in the operating system for the thread being interrupted is stored in the first storage location in core stack.

Subelement 262d is exited, for after storage initial order position in interrupting the first storage locations of the storing sub-units 262c in core stack, exiting response of the inner nuclear layer to interrupt requests.

With reference to shown in Fig. 3 C, request-response unit 263 can include：

First recovers subelement 263a, for exiting after subelement 262d exits response of the inner nuclear layer to interrupt requests, in the thread for recovering to be interrupted, from the initial order position of the interrupt handling routine of the first storage location read operation system of core stack.

Second preserves subelement 263b, the operation scene for preserving being interrupted for task in the user stack of the first recovery subelement 263a threads recovered, and operation scene includes the second user state location of instruction.

Stack switching subelement 263c, for switching to interrupt stack from user stack used in the second preservation subelement 263b.

Interrupt response subelement 263d, for reading interrupt requests from shared memory, and the interrupt stack switched to based on stack switching subelement 263c carries out interrupt response.

Second recovers subelement 263e, for after interrupt response subelement 263d interrupt responses terminate, and recovering being interrupted of the task or another needs the task of priority scheduling.

Wherein, request-response unit 263, can also include：

Subelement 263f is replaced, for the second user state location of instruction for preserving the second preservation subelement 263b in user stack, the first User space location of instruction preserved in the second storage location for replacing with shared memory；

Second recovers subelement 263e, for the operation scene by being preserved in user stack, recover being interrupted of the task, operation scene preserves subelement 263b by second and preserved, and be replaced subelement 263f the second user state location of instruction therein is replaced with into the first User space location of instruction.

In summary, the Task Processing Unit that the present embodiment is provided, by running operating system in thread, interrupt processing is carried out by the operating system in thread；Solving interrupt processing process needs repeatedly to switch to Linux inner core realization, causes the delay of single interrupt processing process larger, the problem of have impact on the real-time of task processes；Reach and interrupt processing is done directly in client layer, it is not necessary to repeatedly switched to inner nuclear layer and handled, reduced the time-consuming of interrupt processing, improved real-time during task processing.

Simultaneously as the interrupt response in background technology is carried out by inner nuclear layer, so the load of inner nuclear layer is higher, the Task Processing Unit that the present embodiment is provided may also reach up the effect of the load of reduction inner nuclear layer.

The Task Processing Unit that the present embodiment is provided, interrupt requests are also stored in by shared memory by inner nuclear layer, after the thread of client layer recovers, the interrupt requests are obtained from shared memory, allow inner nuclear layer that interrupt requests are reported into thread, the interrupt requests are handled by the operating system in thread.

The Task Processing Unit that the present embodiment is provided, also by by the first User space location of instruction in core stack, replace with the initial order position of the interrupt handling routine of operating system, so that after the thread of client layer recovers, it is not to enter the first User space location of instruction being interrupted to continue to run with, but the interrupt handling routine that pressure has been jumped in operating system, it is not delayed and has just been directly entered interrupt response process, realizes the quick effect for reporting and responding of interrupt requests.

The Task Processing Unit that the present embodiment is provided, also by the interrupt handling routine complete independently interrupt response by operating system, should during need not repeatedly switch to inner nuclear layer and handled, reached the time-consuming very small effect of a complete interrupt response process.

Fig. 4 is refer to, the block diagram of the Task Processing Unit provided it illustrates another embodiment of the present invention.The Task Processing Unit can be implemented in combination with all or part as electronic equipment by software, hardware or both.The Task Processing Unit can include：

First operation module 220, for running at least one thread in client layer.

Task processing module 260, for during processing task, the operating system run by the second operation module 240 in thread to carry out task scheduling.

In the present embodiment, task processing module 260, can include：

Task switching unit 264, for when switching to the second task from first task, the operating system run by the second operation module 240 preserves the operation scene for the first task being interrupted, and the operation scene of first task includes the lock interrupting information of register information, the 3rd User space location of instruction and first task.

First acquisition unit 265, behind operation scene for preserving the first task being interrupted in task switching unit 264, the operation scene of the second task is obtained by operating system, the operation scene of the second task includes the lock interrupting information of register information, the fourth user state location of instruction and the second task.

First recovery unit 266, the task of operation in-situ FTIR spectroelectrochemitry second of the second task preserved by operating system according to first acquisition unit 265 is simultaneously handled.

In the present embodiment, task processing module 260, can also include：

Task detection unit 267, at the end of an interrupt response, the operating system run by the second operation module 240, which detects whether to exist, to need the 3rd task of priority scheduling.

Second acquisition unit 268, for when task detection unit 267 detects the presence of three tasks, the operation scene of the 3rd task is obtained by operating system, the operation scene of the 3rd task includes the lock interrupting information of register information, the 5th User space location of instruction and the 3rd task.

Second recovery unit 269, for the task of operation in-situ FTIR spectroelectrochemitry the 3rd of the 3rd task got by operating system according to second acquisition unit 268 and is handled.

In summary, the Task Processing Unit that the present embodiment is provided, by running operating system in thread, task scheduling is carried out by the operating system in thread；Solving task scheduling process needs repeatedly to switch to Linux inner core realization, causes the delay of single task scheduling process larger, the problem of have impact on the real-time of task processes；Reach and task scheduling is done directly in client layer, it is not necessary to repeatedly switched to inner nuclear layer, reduced the time-consuming of task scheduling, improved the effect of real-time when task is handled.

Simultaneously as the task scheduling in background technology is carried out by inner nuclear layer, so the load of inner nuclear layer is higher, the Task Processing Unit that the present embodiment is provided may also reach up the effect of the load of reduction inner nuclear layer.

Fig. 5 A are refer to, the block diagram of the electronic equipment provided it illustrates one embodiment of the invention.The electronic equipment 500 includes：Processor 520 and memory 540, processor 520 can be connected with memory 540 by communication bus, and memory 540 can be command memory, internal memory and register etc..

Memory 540 is used to store one or more than one instruction, and the instruction is used to realize a kind of task processing method, and the instruction includes：

At least one thread is run in client layer；

Operating system is run in thread, the operating system is used to handle task；

During processing task, interrupt response and/or task scheduling are carried out by the operating system in thread.

Processor 520 is used to perform above-mentioned instruction.

Wherein, an operating system can have been run in each thread, the operating system is used to handle task.The operating system needs the function with complete independently interrupt response and/or task scheduling.Can be run in different threads in the operating system of same type, different threads can also run different types of operating system.The embodiment of the present invention is not specially limited to the type of aforesaid operations system.

In summary, the electronic equipment that the present embodiment is provided, interrupt response and/or task scheduling are carried out by the operating system in thread；Solving interrupt response process and task scheduling process needs repeatedly to switch in Linux inner core and is handled, and causes the delay of the interrupt response process and task scheduling process of single larger, have impact on the real-time of task processes；Reach and interrupt response and/or task scheduling are done directly in client layer, it is not necessary to repeatedly switched to inner nuclear layer and handled, reduced the time-consuming of interrupt response and/or task scheduling, the effect of real-time when improving task processing.

In the alternative embodiment provided based on Fig. 5 A illustrated embodiments, memory 540 is also stored with for performing the instruction operated below：

The interrupt requests of interrupt source are received by inner nuclear layer.

Interrupt requests are transferred to the operating system of corresponding thread in client layer by inner nuclear layer.

Interrupt response is carried out to interrupt requests by the interrupt handling routine of the operating system of corresponding thread in client layer；

Processor 520 is additionally operable to perform above-mentioned instruction.Wherein, processor 520 generally receives the interrupt requests of interrupt source by the interrupt line in bus 560.

Alternatively, memory 540 is also stored with for performing the instruction operated below：

The operation scene for the thread being interrupted is preserved in the core stack of inner nuclear layer, operation scene includes the first User space location of instruction.

The first User space location of instruction is stored from the second storage location that the first storage location in core stack is transferred in shared memory, and interrupt requests are stored into the 3rd storage location into shared memory.

The initial order position of the interrupt handling routine in the operating system for the thread being interrupted is stored in the first storage location in core stack；

Exit response of the inner nuclear layer to interrupt requests；

Processor 520 is additionally operable to perform above-mentioned instruction.Wherein, core stack, shared memory can be one piece of logical places in physical memory.The physical memory may belong to memory 540.

In the thread for recovering to be interrupted, the initial order position of the interrupt handling routine of the operating system is read from the first storage location of the core stack；

The operation scene of being interrupted for task is preserved in the user stack of thread, operation scene includes the second user state location of instruction；

Interrupt stack is switched to from user stack；

Interrupt requests are read from shared memory, and interrupt response is carried out based on interrupt stack；

After interrupt response terminates, recovering being interrupted of the task or another needs the task of priority scheduling；

Processor 520 is additionally operable to perform above-mentioned instruction.Wherein, interrupt stack and user stack corresponding with each thread can be one piece of logical places in physical memory.The physical memory may belong to memory 540.

By the second user state location of instruction preserved in user stack, the first User space location of instruction preserved in the second storage location for replacing with shared memory；

By the operation scene preserved in user stack, recover being interrupted for task；

Processor 520 is additionally operable to perform above-mentioned instruction.

In summary, the electronic equipment that the present embodiment is provided, interrupt requests are also stored in by shared memory by inner nuclear layer, after the thread of client layer recovers, the interrupt requests are obtained from shared memory, allow inner nuclear layer that interrupt requests are reported into thread, the interrupt requests are handled by the operating system in thread.

The electronic equipment that the present embodiment is provided, also by by the first User space location of instruction in core stack, replace with the initial order position of the interrupt handling routine of operating system, so that after the thread of client layer recovers, it is not to enter the first User space location of instruction being interrupted to continue to run with, but forces to have jumped to operating system In interrupt handling routine, be not delayed and be just directly entered interrupt response process, realize the quick effect for reporting and responding of interrupt requests.

The electronic equipment that the present embodiment is provided, also by the interrupt handling routine complete independently interrupt response by operating system, should during need not repeatedly switch to inner nuclear layer and handled, reached the time-consuming very small effect of a complete interrupt response process.

In the alternative embodiment provided based on Fig. 5 A illustrated embodiments：

Memory 540 is also stored with for performing the instruction operated below：

When switching to the second task from first task, the operation scene for the first task being interrupted is preserved by operating system, the operation scene of first task includes the lock interrupting information of register information, the 3rd User space location of instruction and first task.

The operation scene of the second task is obtained by operating system, the operation scene of second task includes the lock interrupting information of register information, the fourth user state location of instruction and the second task；

By the way that operating system is according to the task of operation in-situ FTIR spectroelectrochemitry second of the second task and handles；

Processor 520 is additionally operable to perform above-mentioned instruction.

At the end of an interrupt response, detecting whether to exist by operating system needs the 3rd task of priority scheduling.

When there is three tasks, the operation scene of the 3rd task is obtained by operating system, the operation scene of the 3rd task includes the lock interrupting information of register information, the 5th User space location of instruction and the 3rd task.

By the way that operating system is according to the task of operation in-situ FTIR spectroelectrochemitry the 3rd of the 3rd task and handles；

Processor 520 is additionally operable to perform above-mentioned instruction.

In summary, the electronic equipment that the present embodiment is provided, by running operating system in thread, task scheduling is carried out by the operating system in thread；Solving task scheduling process needs repeatedly to switch to Linux inner core realization, causes the delay of single task scheduling process larger, the problem of have impact on the real-time of task processes；Reach and task scheduling is done directly in client layer, it is not necessary to repeatedly switched to inner nuclear layer, reduced the time-consuming of task scheduling, improved the effect of real-time when task is handled.

In addition, incorporated by reference to Fig. 5 B are referred to, electronic equipment 500 can also include communication bus 530, transmitting electricity Road 552 and receiving circuit 554 etc..The operation of the control electronics 500 of processor 520, processor 520 can also be referred to as CPU (English：Central Processing Unit, abridge CPU).Memory 540 can include read-only storage and random access memory, and provide instruction and data to processor 520.The a part of of memory 540 can also include nonvolatile RAM (English：Non-Volatile Random Access Memory, abridge NVRAM).In specific application, radiating circuit 552 and receiving circuit 554 may be coupled to transceiver 550.Each component of electronic equipment 500 is coupled by communication bus 530, and wherein communication bus 530 can also include power bus, controlling bus, interrupt line and other status signal bus in addition etc. in addition to including data/address bus.But for the sake of clear explanation, various buses are all designated as communication bus 530 in figure.

Here is the embodiment of the method for the present invention, and each embodiment of the method and devices above embodiment are in correspondence with each other.

Fig. 6 A are refer to, it illustrates the structural representation of a kind of electronic equipment involved by task processing method provided in an embodiment of the present invention.The electronic equipment includes hardware layer 620, inner nuclear layer 640 and client layer 660.

Hardware layer 620 includes processor, and the processor can have a processor core 622, the i.e. processor to be single core processor.

Inner nuclear layer 640 includes operating system nucleus 642 and driver application (not shown), and the operating system nucleus 242 can be linux kernel.

Client layer 660 can be with active thread (English：Thread) 662, operation has an operating system (English in each thread 662：Operation system, abbreviation：Os), the thread 662 can be real-time thread and/or user thread.The operating system can monopolize the processor core 622, constitute asymmetric multiprocessing (English：Asymmetric Multi-Processing, abbreviation：AMP) structure.

Fig. 6 B are refer to, it illustrates the configuration diagram of another electronic equipment involved by task processing method provided in an embodiment of the present invention.The electronic equipment includes hardware layer 620, inner nuclear layer 640 and client layer 660.

Hardware layer 620 includes processor, and the processor can include the processor core 622 (being illustrated in figure with 2 processor cores) of 2 or more than 2, namely polycaryon processor.

Inner nuclear layer 640 includes operating system nucleus 642 and driver application (not shown), and the operating system nucleus 642 can be linux kernel.

Client layer 660, which can run operation in thread 662, each thread 662, an operating system, and the operating system is used to handle task.The thread 662 can be real-time thread and/or user thread.Each operating system can monopolize a processor core 622, composition symmetric multi-processors (English：Symmetric Multi-Processing, abbreviation：SMP) structure.

Fig. 7 is refer to, the method flow diagram of the task processing method provided it illustrates one embodiment of the invention.The present embodiment is applied in the electronic equipment shown in Fig. 6 A or Fig. 6 B illustrate with the task processing method.This method includes：

Step 701, at least one thread is run in client layer；

Step 702, operating system is run in thread, the operating system can be used for processing task；

An operating system can be run in each thread, the operating system is used to handle task.

The operating system needs the function with complete independently interrupt response and/or task scheduling.Can be run in different threads in the operating system of same type, different threads can also run different types of operating system.The embodiment of the present invention is not specially limited to the type of aforesaid operations system.

Task is to refer to the manageable task of operating system, when electronic equipment is base station equipment, and task can issue the task of dispatch command, the distributing channel resource of the task, the handling access request of the task etc..

Step 703, during execution task, interrupt response and/or task scheduling are carried out by the operating system in thread.

In summary, the task processing method that the present embodiment is provided, interrupt response and/or task scheduling are carried out by the operating system in thread；Solving interrupt response process and task scheduling process needs repeatedly to switch in Linux inner core and is handled, and causes the delay of the interrupt response process and task scheduling process of single larger, have impact on the real-time of task processes；Reach and interrupt response and/or task scheduling are done directly in client layer, it is not necessary to repeatedly switched to inner nuclear layer and handled, reduced the time-consuming of interrupt response and/or task scheduling, the effect of real-time when improving task processing.

2 embodiments are divided to be illustrated respectively to interrupting response process and task scheduling process below.

Fig. 8 is refer to, the method stream of the task processing method provided it illustrates another embodiment of the present invention Cheng Tu.The present embodiment is applied in the electronic equipment shown in Fig. 6 A or Fig. 6 B illustrate with the task processing method.This method includes：

Step 801, at least one thread is run in client layer；

Electronic equipment runs at least one thread in client layer, and the thread can be the real-time thread for handling real-time task or the common thread for handling common task.

Step 802, operating system is run in thread；

Electronic equipment runs operating system in thread.Can be with one operating system of isolated operation in each thread.Electronic equipment is handled task by the operating system.

Step 803, the interrupt requests of interrupt source are received by inner nuclear layer；

Electronic equipment receives the interrupt requests of interrupt source by inner nuclear layer, and the interrupt source can be external hardware device, and external hardware device can be the hardware device of mouse, keyboard, network interface card, video card etc.

Alternatively, it can realize that interrupts a quick processing routine in inner nuclear layer, the quick processing routine of the interruption is used to receive interrupt requests in inner nuclear layer, and the operating system that interrupt requests are reported in correspondence thread, so that the operating system in thread is responded to the interrupt requests.

Electronic equipment receives the interrupt requests of interrupt source by the quick processing routine of the interruption.

After the quick processing routine of interruption receives interrupt requests, electronic equipment enters to lock interrupt status by interrupting quick processing routine.

Lock interrupt status is used to avoid processor from receiving another interrupt requests again during an interrupt requests are handled, so as to cause the processing procedure of this interrupt requests to be interrupted.The realization of lock interrupt status can have hardware lock to interrupt and two kinds of software locks interruption.

When hardware lock is interrupted, inner nuclear layer will no longer receive other interrupt requests in the processing procedure of this interrupt requests.

When software locks are interrupted, inner nuclear layer still receives other interrupt requests in the processing procedure of this interrupt requests, but do not interrupt the processing procedure of this interrupt requests, but subsequently received interrupt requests are stored in the interrupt request queue in inner nuclear layer, Deng this interrupt requests processing procedure finish after, then other interrupt requests are handled from interrupt request queue successively.

Step 804, interrupt requests are transferred to the operating system of correspondence thread in client layer by inner nuclear layer；

From unlike background technology, electronic equipment does not respond the interrupt requests in inner nuclear layer, but interrupt requests are transferred in client layer in the operating system of corresponding thread by inner nuclear layer and responded.Thread corresponding with interrupt requests is typically the thread interrupted by the interrupt requests.That is, step 804 can include following sub-step, as shown in Figure 9：

804a, electronic equipment preserves the operation scene for the thread being interrupted in the core stack of inner nuclear layer, and operation scene includes the first User space location of instruction；

Because processor can only handle 1 usability of program fragments within the unit interval, such as, processor is presently processing a thread, then can not handle other threads or belong to the usability of program fragments of inner nuclear layer.When processor receives 1 interrupt requests in inner nuclear layer, the interrupt requests understand the thread that interrupt coprocessor is currently running, and now processor can transfer to respond the interrupt requests.In order to which the thread being interrupted can resume operation in following instant, electronic equipment preserves the operation scene for the thread being interrupted by interrupting quick processing routine in the core stack of inner nuclear layer, and operation scene includes the various register values and the first User space location of instruction thread when being interrupted.The first User space location of instruction is also referred to as the first User space PC (English：Program counter, Chinese：Program counter) pointer, the first User space PC pointers refer to the thread being interrupted corresponding position of will run next instruction in the original plan before interruption.When the thread is resumed, processor can be by running the programmed instruction corresponding to the first User space location of instruction, to recover the operation of the thread.

Core stack is the stack in inner nuclear layer.Electronic equipment is by interrupting quick processing routine by the operation Locale Holding of the thread in core stack.The first User space location of instruction is stored in the first storage location of core stack.

804b, electronic equipment is stored the first User space location of instruction from the second storage location that the first storage location in core stack is moved on in shared memory, and interrupt requests are stored into the 3rd storage location into shared memory, shared memory is the memory block that inner nuclear layer and client layer can be accessed；

The second storage location that the first User space location of instruction can be moved in shared memory by electronic equipment by the quick processing routine of interruption in inner nuclear layer from the first storage location in core stack.

The initial order position of the interrupt handling routine of storage program area in 804c, the first storage location of the electronic equipment in core stack；

Operating system in thread provided in an embodiment of the present invention has the function of complete independently interrupt response.Alternatively, an interrupt handling routine can be realized in the operating system of thread, the interrupt requests that the interrupt handling routine is used for the operating system reported to inner nuclear layer in thread are responded.

Electronic equipment is by the initial order position of the interrupt handling routine of storage program area in the first storage location of the quick processing routine of interruption in core stack in inner nuclear layer, and the operating system is the thread being interrupted In operating system.

That is, the thread being interrupted it is follow-up be resumed operation when, processor read by be operating system in the thread interrupt handling routine, rather than the programmed instruction corresponding to the first User space location of instruction.

804d, electronic equipment exits the processing of interrupt requests by inner nuclear layer.

Now, interrupt requests are stored in the operating system in the thread waited in shared memory in client layer to handle.

Realized it should be noted that step 804a to step 804d is electronic equipment by inner nuclear layer.

Step 805, interrupt response is carried out to interrupt requests by the interrupt handling routine in operating system.

Step 805 includes following sub-step, as shown in Figure 10：

805a, electronic equipment is in the thread for recovering to be interrupted, from the initial order position of the interrupt handling routine of the first storage location read operation system of core stack；

By the first User space location of instruction that the first storage location in core stack is stored is replaced by the initial order position of the interrupt handling routine of operating system.When the thread that electronic equipment is interrupted according to the operation in-situ FTIR spectroelectrochemitry preserved in core stack, the programmed instruction that first storage location of the processor in core stack is read is the programmed instruction corresponding to the interrupt handling routine of operating system in thread.Hereafter, operating system carries out interrupt response by the interrupt handling routine to interrupt requests in thread.

805b, electronic equipment preserves the operation scene of being interrupted for task in the user stack of thread, and operation scene includes the second user state location of instruction；

Because operating system is an independent operating system in thread, and the operating system in thread is used to handle task.When needing processing in the presence of an interrupt requests, the interrupt requests can interrupt being currently running in operating system for task, electronic equipment preserves the operation scene of being interrupted for task, various register values and the second user state location of instruction when operation scene is interrupted including the task by interrupt handling routine in the user stack of thread first.The second user state location of instruction is also referred to as second user state PC pointers, and second user state PC pointers are the pointer positions corresponding to the next instruction that being interrupted for task will be run in the original plan before interruption.

Because when step 805a threads recover, processor directly reads interrupt handling routine to run, so the second user state location of instruction is identical generally with the first User space location of instruction in step 804a.For example, step 804a threads are interrupted in the location A in will running to the corresponding program code of a certain task, then the programmed instruction position that will be run of being interrupted in step 805b threads for task should also be location A, not change.

Each thread possesses respective user stack, and electronic equipment is by interrupt handling routine by the operation of the task Locale Holding is in user stack.The second user state location of instruction is stored in the 4th storage location in user stack.

Step 805c, electronic equipment is by the second user state location of instruction preserved in user stack, the first User space location of instruction preserved in the second storage location for replacing with shared memory；

Because the second user state location of instruction stored in step 805b is possible to that mistake can be preserved, the second user state location of instruction for preserving mistake can be different from the first User space location of instruction, in order to ensure correctness of the task when resuming operation, so electronic equipment by interrupt handling routine by the second user state location of instruction preserved in step 805b in user stack, the first User space location of instruction preserved in the second storage location for replacing with shared memory, namely replace with the first User space location of instruction being transferred in step 804b in shared memory.

Step 805d, electronic equipment switches to interrupt stack from user stack；

Interrupt stack is used to store the data during interrupt response.

Step 805e, electronic equipment reads interrupt requests from shared memory, and carries out interrupt response based on interrupt stack；

Electronic equipment reads interrupt requests by interrupt handling routine from shared memory, and the interrupt requests can be specifically an interrupt number, and be then based on interrupt stack by the interrupt handling routine carries out interrupt response to the interrupt requests.

Step 805f, electronic equipment recovers being interrupted of the task or another needs the task of priority scheduling after interrupt response terminates；

After interrupt response terminates, if there is no other tasks of priority scheduling are needed, then electronic equipment recovers being interrupted for task by interrupt handling routine according to the operation scene preserved in user stack.

Other tasks of priority scheduling are needed if there is other, then electronic equipment is by interrupt handling routine according to the operation scene preserved in user stack, and recovering another needs the task of priority scheduling.

In being interrupted for task or the task recovery for needing priority scheduling, the lock interrupt status in inner nuclear layer can also be changed to unlock interrupt status by electronic equipment by interrupt handling routine.When in unblock interrupt status, electronic equipment can continue to interrupt requests.

Require supplementation with explanation is a bit, electronic equipment needs to be maintained at lock interrupt status in step 804d, due to the difference that hardware lock is interrupted and software locks are interrupted, if hardware lock is interrupted, as long as electronic equipment continues to keep lock interrupt status, if software locks are interrupted, then electronic equipment needs to exit the processing of interrupt requests in inner nuclear layer, and recover after the thread that is interrupted, check whether the state that software locks are interrupted is lock interrupt status, if it is not, then needing to update the state of software locks interruption for lock interrupt status and keeping.

Supplementary notes are also needed on the other hand, because the state that software locks are interrupted is electricity when locking interrupt status Inner nuclear layer in sub- equipment still receives the interrupt requests of interrupt source, and these interrupt requests are stored in the interrupt request queue of inner nuclear layer.So after step 805f, if the state that electronic equipment interrupts software locks is changed to unlock interrupt status from lock interrupt status, then also need to whether there is in detection interrupt request queue and there are other interrupt requests, if there is other interrupt requests, then electronic equipment re-executes the interrupt response process shown by step 804 and step 805 in above-described embodiment.

In summary, the task processing method that the present embodiment is provided, by running operating system in thread, interrupt processing is carried out by the operating system in thread；Solving interrupt processing process needs repeatedly to switch to Linux inner core realization, causes the delay of single interrupt processing process larger, the problem of have impact on the real-time of task processes；Reach and interrupt processing is done directly in client layer, it is not necessary to repeatedly switched to inner nuclear layer and handled, reduced the time-consuming of interrupt processing, improved real-time during task processing.

Simultaneously as the interrupt response in background technology is carried out by inner nuclear layer, so the load of inner nuclear layer is higher, the task processing method that the present embodiment is provided may also reach up the effect of the load of reduction inner nuclear layer.

The task processing method that the present embodiment is provided, interrupt requests are also stored in by shared memory by inner nuclear layer, after the thread of client layer recovers, the interrupt requests are obtained from shared memory, allow inner nuclear layer that interrupt requests are reported into thread, the interrupt requests are handled by the operating system in thread.

The task processing method that the present embodiment is provided, also by by the first User space location of instruction in core stack, replace with the initial order position of the interrupt handling routine of operating system, so that after the thread of client layer recovers, it is not to enter the first User space location of instruction being interrupted to continue to run with, but the interrupt handling routine that pressure has been jumped in operating system, it is not delayed and has just been directly entered interrupt response process, realizes the quick effect for reporting and responding of interrupt requests.

The task processing method that the present embodiment is provided, also by the interrupt handling routine complete independently interrupt response by operating system, should during need not repeatedly switch to inner nuclear layer and handled, reached the time-consuming very small effect of a complete interrupt response process.

Figure 11 is refer to, the method flow diagram of the task processing method provided it illustrates further embodiment of the present invention.The present embodiment is applied in the electronic equipment shown in Fig. 6 A or Fig. 6 B illustrate with the task processing method.This method includes：

Step 1101, at least one thread is run in client layer；

Electronic equipment runs at least one thread in client layer.The thread can be the real-time thread for handling real-time task or the common thread for handling common task.

Step 1102, operating system is run in thread, the operating system is used to handle task；

Step 1103, during processing task, task scheduling is carried out by the operating system in thread.

From unlike background technology, electronic equipment not by inner nuclear layer come in thread task carry out task scheduling, but by the operating system in thread come in thread task carry out task scheduling.Both the interrupt response logic of inner nuclear layer had not been needed, had not been influenceed by the task scheduling of inner nuclear layer yet, independently task scheduling has been completed.Scheduling strategy during scheduling can use existing task scheduling strategy.

Common task scheduling includes following 2 kinds：

The first, to need exemplified by first task switches to the second task, this step includes following sub-step, as shown in figure 12：

1103A, when switching to the second task from first task, electronic equipment preserves the operation scene for the first task being interrupted by the operating system in thread, and the operation scene of first task includes the lock interrupting information of register information, the 3rd User space location of instruction and first task；

Operating system in the thread that the present embodiment is supplied to has the function of complete independently task scheduling.A task dispatch can be realized in the operating system of thread, the task dispatch is used to carry out task scheduling to each task handled in operating system.

Alternatively, switching to the second task from first task can be triggered by interrupt requests, can also actively be triggered by the task dispatch in operating system.

Such as, second task needs n milliseconds of delay, then second task can enable 1 timer after hang-up, the timer delay n millisecond after generation 1 interrupt requests, the interrupt requests are used to ask to interrupt the first task being currently running, and the first task being currently running is switched into the second task, to recover the operation of the second task.

Again such as, the first task being currently running can be switched to the second task by task dispatch when the priority of the second task reaches preparatory condition.

Now, electronic equipment preserves the operation scene for the first task being interrupted by the task dispatch in operating system, and the operation scene of first task includes register information, the 3rd User space location of instruction and first The lock interrupting information of task.

Wherein, lock interrupting information refers to：Because task A may be interrupted by task B, task B may be interrupted by task C again, can now form interrupt nesting, and lock interrupting information refers to level of the interrupt requests in interrupt nesting.

1103B, electronic equipment obtains the operation scene of the second task by the operating system in thread, and the operation scene of the second task includes the lock interrupting information of register information, the fourth user state location of instruction and the second task；

Electronic equipment can obtain the operation scene of the second task by the task dispatch in operating system.

1103C, electronic equipment is by the way that the operating system in thread is according to the task of operation in-situ FTIR spectroelectrochemitry second of the second task and handles.

Electronic equipment can recover the second task by register information of the task dispatch in operating system in operation scene and the fourth user state location of instruction.

When the second task is resumed, electronic equipment, according to the lock interrupting information of the second task switching unblock interrupt status, then handles second task by task dispatch.

Second, so that after an interrupt processing, electronic equipment is dispatched to exemplified by the 3rd task for needing priority scheduling, the 3rd task can be new task.This step includes following sub-step, as shown in figure 13：

1103a, at the end of an interrupt processing, electronic equipment detects whether to exist by the operating system in thread needs the 3rd task of priority scheduling；

Electronic equipment detects whether to exist by the task dispatch in operating system needs the 3rd task of priority scheduling.

Such as, network card equipment receives 1 new packet, now can also produce 1 interrupt requests, and the interrupt requests are used to ask to handle the packet, and the interrupt requests can produce the 3rd task for handling the packet after being responded.

1103b, if in the presence of the 3rd task, electronic equipment obtains the operation scene of the 3rd task by the operating system in thread, and the operation scene of the 3rd task includes the lock interrupting information of register information, the 5th User space location of instruction and the 3rd task；

Electronic equipment obtains the operation scene of the 3rd task by the task dispatch in operating system.

1103c, electronic equipment is by the way that the operating system in thread is according to the task of operation in-situ FTIR spectroelectrochemitry the 3rd of the 3rd task and handles.

Electronic equipment can recover the 3rd task according to the register information and the 5th User space location of instruction in operation scene.

When the 3rd task is resumed, the lock interrupt status in inner nuclear layer is switched to unblock interrupt status by electronic equipment by task dispatch according to the lock interrupting information of the 3rd task, then handles the 3rd task.

In summary, the task processing method that the present embodiment is provided, by running operating system in thread, task scheduling is carried out by the operating system in thread；Solving task scheduling process needs repeatedly to switch to Linux inner core realization, causes the delay of single task scheduling process larger, the problem of have impact on the real-time of task processes；Reach and task scheduling is done directly in client layer, it is not necessary to repeatedly switched to inner nuclear layer, reduced the time-consuming of task scheduling, improved the effect of real-time when task is handled.

Simultaneously as the task scheduling in background technology is carried out by inner nuclear layer, so the load of inner nuclear layer is higher, the task processing method that the present embodiment is provided may also reach up the effect of the load of reduction inner nuclear layer.

It is appreciated that, the electronic equipment that the Task Processing Unit or Fig. 5 A or Fig. 5 B embodiment that Fig. 2-Fig. 4 any embodiments are provided are provided can perform the task processing method of Fig. 7-Figure 13 any embodiments offer, it is succinct to describe, the concrete function and workflow of device embodiment each unit or module are referred to the correlation of embodiment of the method part, do not do and excessively repeat, meanwhile, the content description for each embodiment that the present invention is provided can also be cross-referenced.

One of ordinary skill in the art will appreciate that realizing all or part of step of above-described embodiment can be completed by hardware, the hardware of correlation can also be instructed to complete by program, described program can be stored in a kind of computer-readable recording medium, storage medium mentioned above can be read-only storage, disk or CD etc..

Presently preferred embodiments of the present invention is the foregoing is only, is not intended to limit the invention, within the spirit and principles of the invention, any modification, equivalent substitution and improvements made etc. should be included in the scope of the protection.

Claims

A kind of Task Processing Unit, it is characterised in that described device includes：

First operation module, for running at least one thread in client layer；

Second operation module, for running operating system in the thread, the operating system is used to handle task；

Task processing module, for during the task is handled, interrupt response and/or task scheduling to be carried out by the operating system in the thread.
Device according to claim 1, it is characterised in that the task processing module, including：

Request reception unit, the interrupt requests for receiving interrupt source by inner nuclear layer；

Ask transmission unit, the operating system for the interrupt requests to be transferred to corresponding thread in the client layer by the inner nuclear layer；

The interrupt requests are carried out interrupt response by request-response unit for the interrupt handling routine by the operating system of corresponding thread in the client layer.
Device according to claim 2, it is characterised in that the request transmission unit, including：

First preserves subelement, the operation scene for preserving the thread being interrupted in the core stack of the inner nuclear layer, and the operation scene includes the first User space location of instruction；

Shift subelement, for the first User space location of instruction to be stored from the second storage location that the first storage location in the core stack is transferred in shared memory, and by interrupt requests storage to the 3rd storage location in the shared memory, the shared memory is the memory block that the inner nuclear layer and the client layer can be accessed；

Storing sub-units are interrupted, the initial order position for the interrupt handling routine in the operating system for the thread being interrupted described in storage in the first storage location in the core stack；

Subelement is exited, for exiting response of the inner nuclear layer to the interrupt requests.
Device according to claim 3, it is characterised in that the request-response unit, including：

First recovers subelement, in the thread being interrupted described in recovery, the initial order position of the interrupt handling routine of the operating system to be read from the first storage location of the core stack；

Second preserves subelement, the operation scene for preserving being interrupted for task in the user stack of the thread, The operation scene includes the second user state location of instruction；

Stack switching subelement, for switching to interrupt stack from the user stack；

Interrupt response subelement, interrupt response is carried out for reading the interrupt requests from the shared memory, and based on the interrupt stack；

Second recovers subelement, for after the interrupt response terminates, recover described in being interrupted of the task or another need the task of priority scheduling.
Device according to claim 4, it is characterised in that the request-response unit, in addition to：

Replace subelement, for by the second user state location of instruction preserved in the user stack, the first User space location of instruction preserved in the second storage location for replacing with the shared memory；

Described second recovers subelement, for the operation scene by being preserved in the user stack, being interrupted described in recovery for task.
According to any described device of claim 1 to 5, it is characterised in that the task processing module, including：

Task switching unit, for when switching to the second task from first task, the operation scene for the first task being interrupted is preserved by the operating system, the operation scene of the first task includes the lock interrupting information of register information, the 3rd User space location of instruction and the first task；

First acquisition unit, the operation scene for obtaining second task by the operating system, the operation scene of second task includes the lock interrupting information of register information, the fourth user state location of instruction and second task；

First recovery unit, the second task and is handled by the operating system according to the operation in-situ FTIR spectroelectrochemitry of second task.
According to any described device of claim 1 to 5, it is characterised in that the task processing module, including：

Task detection unit, at the end of an interrupt response, detecting whether to exist by the operating system to need the 3rd task of priority scheduling；

Second acquisition unit, for when there is three task, the operation scene of the 3rd task is obtained by the operating system, the operation scene of the 3rd task includes the lock interrupting information of register information, the 5th User space location of instruction and the 3rd task；

Second recovery unit, for the 3rd task and being handled according to the operation in-situ FTIR spectroelectrochemitry of the 3rd task by the operating system.
A kind of electronic equipment, it is characterised in that the electronic equipment includes：Processor and memory；

The memory is used to store one or more than one instruction, described to instruct for realizing a kind of task processing method；

Methods described includes：

At least one thread is run in client layer；

Operating system is run in the thread, the operating system is used to handle task；

During the task is handled, interrupt response and/or task scheduling are carried out by the operating system in the thread；

The processor is used to perform the instruction.
Electronic equipment according to claim 8, it is characterised in that the memory is also stored with for performing the instruction operated below：

The interrupt requests of interrupt source are received by inner nuclear layer；

The interrupt requests are transferred to the operating system of corresponding thread in the client layer by the inner nuclear layer；

Interrupt response is carried out to the interrupt requests by the interrupt handling routine of the operating system of corresponding thread in the client layer；

The processor is additionally operable to perform the instruction.
Electronic equipment according to claim 9, it is characterised in that the memory is also stored with for performing the instruction operated below：

The operation scene for the thread being interrupted is preserved in the core stack of the inner nuclear layer, the operation scene includes the first User space location of instruction；

The first User space location of instruction is stored from the second storage location that the first storage location in the core stack is transferred in shared memory, and the interrupt requests are stored to the 3rd storage location in the shared memory；

The initial order position of interrupt handling routine in the operating system for the thread being interrupted in the first storage location in the core stack described in storage；

Exit response of the inner nuclear layer to the interrupt requests；

The processor is additionally operable to perform the instruction.
Electronic equipment according to claim 10, it is characterised in that the memory is also stored with for performing the instruction operated below：

In the thread being interrupted described in recovery, the initial order position of the interrupt handling routine of the operating system is read from the first storage location of the core stack；

The operation scene of being interrupted for task is preserved in the user stack of the thread, the operation scene includes the second user state location of instruction；

Interrupt stack is switched to from the user stack；

The interrupt requests are read from the shared memory, and interrupt response is carried out based on the interrupt stack；

After the interrupt response terminates, recover described in being interrupted of the task or another need the task of priority scheduling；

The processor is additionally operable to perform the instruction.
Electronic equipment according to claim 11, it is characterised in that be also stored with for performing the instruction operated below：

By the second user state location of instruction preserved in the user stack, the first User space location of instruction preserved in the second storage location for replacing with the shared memory；

By the operation scene preserved in the user stack, being interrupted described in recovery for task；

The processor is additionally operable to perform the instruction.
According to any described electronic equipment of claim 8 to 12, it is characterised in that be also stored with for performing the instruction operated below：

When switching to the second task from first task, the operation scene for the first task being interrupted is preserved by the operating system, the operation scene of the first task includes the lock interrupting information of register information, the 3rd User space location of instruction and the first task；

The operation scene of second task is obtained by the operating system, the operation scene of second task includes the lock interrupting information of register information, the fourth user state location of instruction and second task；

The second task and handled according to the operation in-situ FTIR spectroelectrochemitry of second task by the operating system；

The processor is additionally operable to perform the instruction.
According to any described electronic equipment of claim 8 to 12, it is characterised in that be also stored with for performing the instruction operated below：

At the end of an interrupt response, detecting whether to exist by the operating system needs the 3rd task of priority scheduling；

When there is three task, the operation scene of the 3rd task is obtained by the operating system, the operation scene of the 3rd task includes the lock interrupting information of register information, the 5th User space location of instruction and the 3rd task；

The 3rd task and handled according to the operation in-situ FTIR spectroelectrochemitry of the 3rd task by the operating system；

The processor is additionally operable to perform the instruction.
A kind of task processing method, it is characterised in that methods described includes：

At least one thread is run in client layer；

Operating system is run in the thread, the operating system is used to handle task；

During the task is handled, interrupt response and/or task scheduling are carried out by the operating system in the thread.
Method according to claim 15, it is characterised in that described during the task is handled, interrupt response is carried out by the operating system in the thread, including：

The interrupt requests of interrupt source are received by inner nuclear layer；

The interrupt requests are transferred to the operating system of corresponding thread in the client layer by the inner nuclear layer；

Interrupt response is carried out to the interrupt requests by the interrupt handling routine of the operating system of corresponding thread in the client layer.
Method according to claim 16, it is characterised in that the operating system that the interrupt requests are transferred to the corresponding thread in the client layer by the inner nuclear layer, including：

The operation scene for the thread being interrupted is preserved in the core stack of the inner nuclear layer, the operation scene includes the first User space location of instruction；

The first User space location of instruction is stored from the second storage location that the first storage location in the core stack is transferred in shared memory, and by interrupt requests storage to the 3rd storage location in the shared memory, the shared memory is the memory block that the inner nuclear layer and the client layer can be accessed；

The initial order position of interrupt handling routine in the operating system for the thread being interrupted in the first storage location in the core stack described in storage；

Exit response of the inner nuclear layer to the interrupt requests.
Method according to claim 17, it is characterised in that the interrupt handling routine by the operating system carries out interrupt response to the interrupt requests, including：

In the thread being interrupted described in recovery, the initial order position of the interrupt handling routine of the operating system is read from the first storage location of the core stack；

The operation scene of being interrupted for task is preserved in the user stack of the thread, the operation scene includes the second user state location of instruction；

Interrupt stack is switched to from the user stack；

The interrupt requests are read from the shared memory, and interrupt response is carried out based on the interrupt stack；

After the interrupt response terminates, recover described in being interrupted of the task or another need the task of priority scheduling.
Method according to claim 18, it is characterised in that it is described switch to interrupt stack from the user stack before, in addition to：

By the second user state location of instruction preserved in the user stack, the first User space location of instruction preserved in the second storage location for replacing with the shared memory；

It is described after the interrupt response terminates, recover described in being interrupted of the task, including：

By the operation scene preserved in the user stack, being interrupted described in recovery for task.
According to any described method of claim 15 to 19, it is characterised in that described during the task is performed, task scheduling is carried out by the operating system in the thread, including：

When switching to the second task from first task, the operation scene for the first task being interrupted is preserved by the operating system, the operation scene of the first task includes the lock interrupting information of register information, the 3rd User space location of instruction and the first task；

The operation scene of second task is obtained by the operating system, the operation scene of second task includes the lock interrupting information of register information, the fourth user state location of instruction and second task；

The second task and handled according to the operation in-situ FTIR spectroelectrochemitry of second task by the operating system.
According to any described method of claim 15 to 19, it is characterised in that described during the task is performed, task scheduling is carried out by the operating system in the thread, including：

At the end of an interrupt response, detecting whether to exist by the operating system needs the 3rd task of priority scheduling；

When there is three task, the operation scene of the 3rd task is obtained by the operating system, the operation scene of the 3rd task includes the lock interrupting information of register information, the 5th User space location of instruction and the 3rd task；

The 3rd task and handled according to the operation in-situ FTIR spectroelectrochemitry of the 3rd task by the operating system.