CN105575817A - Manufacturing method of film transistor - Google Patents
Manufacturing method of film transistor Download PDFInfo
- Publication number
- CN105575817A CN105575817A CN201510951852.3A CN201510951852A CN105575817A CN 105575817 A CN105575817 A CN 105575817A CN 201510951852 A CN201510951852 A CN 201510951852A CN 105575817 A CN105575817 A CN 105575817A
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- CN
- China
- Prior art keywords
- film transistor
- thin
- photoresistance unit
- photoresist layer
- manufacture method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 37
- 229910052751 metal Inorganic materials 0.000 claims abstract description 40
- 239000002184 metal Substances 0.000 claims abstract description 40
- 239000010409 thin film Substances 0.000 claims description 44
- 229920002120 photoresistant polymer Polymers 0.000 claims description 42
- 238000000034 method Methods 0.000 claims description 41
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 claims description 16
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 9
- 238000005530 etching Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention provides a manufacturing method of a film transistor. The manufacturing method of the film transistor comprises the steps of: providing a bearing body, wherein the bearing body comprises a first surface and a second surface which are opposite to each other, light resistance units are formed on the first surface of the bearing body at intervals, a gas is formed between adjacent light resistance units, and a part of the first surface is exposed; deposing metal, and forming a metal layer on the part, exposed from the gaps, of the first metal, wherein the metal layer is one or more from a light shielding layer, a grid electrode, a source electrode, a drain electrode and a storage electrode; and stripping the light resistance units. By adopting the manufacturing method, the manufacturing period of the film transistor is shortened.
Description
Technical field
The present invention relates to the manufacture field of thin-film transistor, particularly relate to a kind of manufacture method of thin-film transistor.
Background technology
Thin-film transistor (thinfilmtransistor, TFT) is widely used in the electronic installations such as liquid crystal indicator as a kind of switch element.In prior art, in the manufacturing process of thin-film transistor, in making light shield layer, grid, source electrode, drain electrode or in the storage capacitance that thin-film transistor is connected, there is etch process.Be described for light shield layer below, when making light shield layer, first the metal level of a flood be set, then by etch process, the etching metal layer of flood become the shape of needs, with shape light shield layer.Owing to needing etch process in the process made, the time cycle that therefore thin-film transistor can be caused to make is longer.
Summary of the invention
The invention provides a kind of manufacture method of thin-film transistor, the manufacture method of described thin-film transistor comprises:
There is provided supporting body, described supporting body comprises the first surface and second surface that are oppositely arranged;
The first surface of described supporting body is formed spaced photoresistance unit, between adjacent photoresistance unit, forms gap and exposed portion first surface;
Plated metal, the first surface exposed by described gap forms metal level, wherein, described metal level be in light shield layer, grid, source electrode, drain electrode, storage electrode any one or multiple;
Peel off described photoresistance unit.
Wherein, " on the first surface of described supporting body, form spaced photoresistance unit in described step, between adjacent photoresistance unit, form gap and exposed portion first surface " and comprising:
The described first surface of described supporting body is formed the photoresist layer of flood;
Described photoresist layer is exposed, to form spaced described photoresistance unit, between adjacent photoresistance unit, forms gap and exposed portion first surface.
Wherein, described step " exposes described photoresist layer, to form spaced described photoresistance unit, forms gap and exposed portion first surface between adjacent photoresistance unit " and comprising:
There is provided light shield, described light shield and one section, described photoresist layer interval predeterminable range and be oppositely arranged, described light shield comprises Part I and Part II, described Part I and described Part II different to the iris action of light;
Light source is provided, described light source is arranged on the side of described light shield away from described photoresist layer, the light that described light source sends is irradiated to described Part I and described Part II forms spaced photoresistance unit to make described photoresist layer, wherein, described Part I is corresponding with described photoresistance unit, and the gap between described Part II and adjacent photoresistance unit is corresponding.
Wherein, the manufacture method of described thin-film transistor also comprises:
Adjust the light that described light source sends, form chamfering to make the position in the contiguous described gap of described photoresistance unit.
Wherein, described step " forms spaced photoresistance unit, forms gap and exposed portion first surface between adjacent photoresistance unit " and comprising on the first surface of described supporting body:
The described first surface of described supporting body is formed the photoresist layer of flood;
Prebake conditions is carried out to described photoresist layer;
Photoresist layer through prebake conditions is carried out to the baking of preset temperature and Preset Time;
Development treatment is carried out to the photoresist layer after roasted, to form spaced described photoresistance unit, between adjacent photoresistance unit, forms gap and exposed portion first surface.
Wherein, when carrying out development treatment, use the KOH of the TMAH of the 2.38% or TMAH of 0.4% or 4.5%.
Wherein, the thickness of described photoresist layer is 1 micron ~ 5 microns.
Wherein, when described metal level is light shield layer, described supporting body is transparency carrier.
Wherein, when described metal level be source electrode and drain electrode time, described source electrode and described drain electrode are formed simultaneously.
Wherein, when described metal level be grid and storage electrode time, described grid and described storage electrode are formed simultaneously.
Compared to prior art, the manufacture method of thin-film transistor of the present invention, the first surface of supporting body is formed spaced photoresistance unit, form gap and exposed portion first surface, then plated metal between adjacent photoresistance unit, the first surface exposed by described gap forms metal level, wherein, described metal level be in light shield layer, grid, source electrode, drain electrode, storage electrode any one or multiple, then, peel off described photoresistance unit.As can be seen here, the manufacture method of thin-film transistor of the present invention does not need to carry out the middle processing procedure such as etching, thus reduces the time cycle of thin-film transistor making.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the flow chart of the manufacture method of the thin-film transistor of the present invention one better embodiment.
Fig. 2 is the cross-sectional view of thin-film transistor in the manufacture method of the thin-film transistor of the correspondence of step S101 of the present invention.
Fig. 3 is the cross-sectional view of thin-film transistor in the manufacture method of the thin-film transistor that step S102 of the present invention is corresponding.
Fig. 4 is the cross-sectional view of thin-film transistor in the manufacture method of the thin-film transistor that step S103 of the present invention is corresponding.
Fig. 5 is the cross-sectional view of thin-film transistor in the manufacture method of the thin-film transistor that step S104 of the present invention is corresponding.
Fig. 6 be photoresist layer flood of the present invention be arranged on the cross-sectional view of the first surface of supporting body.
Fig. 7 is the cross-sectional view of thin-film transistor in Step II-I in the manufacture method of thin-film transistor of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only a part of embodiment of the present invention, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
It should be noted that, the term used in embodiments of the present invention is only for the object describing specific embodiment, and not intended to be limiting the present invention." one ", " described " and " being somebody's turn to do " of the singulative used in the embodiment of the present invention and appended claims is also intended to comprise most form, unless context clearly represents other implications.It is also understood that term "and/or" used herein refer to and comprise one or more project of listing be associated any or all may combine.In addition, term " first ", " second ", " the 3rd " and " the 4th " etc. in specification of the present invention and claims and above-mentioned accompanying drawing are for distinguishing different object, instead of for describing particular order.In addition, term " comprises " and " having " and their any distortion, and intention is to cover not exclusive comprising.Such as contain the process of series of steps or unit, method, system, product or equipment and be not defined in the step or unit listed, but also comprise the step or unit do not listed alternatively, or also comprise alternatively for other intrinsic step of these processes, method, product or equipment or unit.
Refer to Fig. 1, Fig. 1 is the flow chart of the manufacture method of the thin-film transistor of the present invention one better embodiment.The manufacture method of described thin-film transistor includes but are not limited to following steps.
Step S101, provides supporting body 100, and described supporting body 100 comprises the first surface 100a and second surface 100b that are oppositely arranged.Refer to Fig. 2, in the present embodiment, described supporting body 100 can be transparency carrier, such as glass substrate, plastic base etc., also can for after being provided with other layers (such as resilient coating or semiconductor layer or insulating barrier) on the transparent substrate, other layers that described transparency carrier and described transparency carrier are arranged are regarded as supporting body in the lump.
Step S102, the first surface 100a of described supporting body 100 is formed spaced photoresistance unit 210, forms gap 220 and exposed portion first surface 100a between adjacent photoresistance unit 210.Refer to Fig. 3, schematically illustrate two photoresistance unit 210 in figure 3, the first surface 100a that two photoresistance unit 210 are arranged on described supporting body 100 forms gap 220 between two photoresistance unit 210, spills part first surface 100a by described gap 220.Understandably, the number of described photoresistance unit 210 is not limited to two, also can be N number of (N is more than or equal to 3), then, the number in the gap 220 formed between adjacent photoresist layer 210 is then N-1.
Step S103, plated metal, on the first surface 100a exposed by described gap 220 formed metal level 500, refer to Fig. 4, wherein, described metal level 500 be in light shield layer, grid, source electrode, drain electrode, storage electrode any one or multiple.During plated metal, the first surface 100a that can expose on described photoresistance unit 210 and by the gap 220 between photoresistance unit 210 forms metal level 500.The metal level be formed on photoresistance unit 210 can be removed in follow-up making step, and the metal level that the first surface 100a exposed by the gap 220 between photoresist layer 210 is formed can be storage electrode in the light shield layer in thin-film transistor, grid, source electrode, drain electrode, storage capacitance etc.The material of described metal level can be but be not limited only to as molybdenum (Mo) etc.Understandably, the quantity of the described metal level in described first surface 100a formation is corresponding with the quantity in described gap 220.When described metal level 500 is light shield layer, described supporting body 100 is transparency carrier.When described metal level 500 be source electrode and drain electrode time, described source electrode and described drain electrode are formed simultaneously.When described metal level be grid and storage electrode time, described grid and described storage electrode are formed simultaneously.
Step S104, peels off described photoresistance unit 210.Refer to Fig. 5, due in step s 103, the first surface 100a exposed on described photoresistance unit 210 and through the gap 220 between photoresistance unit 210 all defines metal level.By peeling off described photoresistance unit 210, thus the metal level be formed on described photoresistance unit 210 is removed in the lump together with described photoresistance unit 210, only leave the metal level 500 that the first surface 100a that exposes in the gap between described photoresistance unit 210 is formed.Namely described metal level 500 constitutes storage electrode in light shield layer in thin-film transistor, grid, source electrode, drain electrode, storage capacitance etc.
Understandably, in one embodiment, described step S102 comprises the steps.
Step I, the described first surface 100a of described supporting body 100 is formed the photoresist layer 200 of flood.Refer to Fig. 6, be arranged on the first surface 100a of described supporting body 100 to described photoresist layer 200 flood.
Step II, exposes described photoresist layer 200, to form spaced described photoresistance unit 210, forms gap 220 and exposed portion first surface 100a between adjacent photoresistance unit 210.Particularly, described Step II comprises the following steps.
Step II-I, light shield 300 is provided, described light shield 300 and one section, described photoresist layer 200 interval predeterminable range and be oppositely arranged, described light shield 300 comprises Part I 310 and Part II 320, and the iris action of described Part I 310 and described Part II 320 pairs of light is different.Refer to Fig. 7, wherein, when light is irradiated on photoresist layer 200 by described Part I 310, the photoresist layer 200 corresponding with described Part I 310 does not change; When light is irradiated on photoresist layer 200 by described Part II 320, the photoresist layer 200 corresponding with described Part II 320 dissolves, be irradiated to irradiation time and the exposure intensity of the light on photoresist layer 200 by described Part II 320 by adjustment, thus the photoresist layer 200 corresponding with described Part II is all dissolved, to expose first surface.
Step II-II, light source 400 is provided, described light source 400 is arranged on the side of described light shield 300 away from described photoresist layer 200, the light that described light source 400 sends is irradiated to Part I 310 and Part II 320 forms spaced photoresistance unit 210 to make described photoresist layer 200, wherein, described Part I 310 is corresponding with described photoresistance unit 210, and the gap 220 between described Part II 320 and adjacent photoresistance unit 210 is corresponding.
The manufacture method of described thin-film transistor, also comprises step: the light that adjustment light source 400 sends, and forms chamfering (undercut) to make the position in the contiguous described gap 220 of described photoresistance unit 210.Preferably can adjust the angle of the light that described light source 400 sends, form chamfering, to peel off photoresistance unit 210 in described step S104 to make the position in the contiguous described gap 220 of described photoresistance unit 210 and contiguous described first surface 100a.By forming chamfering in the position in the contiguous described gap 220 of described photoresistance unit 210, described photoresistance unit 210 can be made to strip down from the described first surface 100a of described supporting body 100 easily.Preferably, the angle of described chamfering is greater than 75 °.
In another embodiment, described step S102 comprises the steps.
Step a, the described first surface 100a of described supporting body 100 is formed the photoresist layer 200 of flood.The thickness of described photoresist layer 200 is 1 micron ~ 5 microns.
Step b, carries out prebake conditions to described photoresist layer 200.
Step c, carries out the baking of budget temperature and Preset Time to the photoresist layer 200 through prebake conditions.
Step c, carries out development treatment to the photoresist layer 200 after roasted, to form spaced described photoresistance unit 210, forms gap 220 and exposed portion first surface 100a between adjacent photoresistance unit 210.Particularly, when carrying out development treatment, use the Tetramethylammonium hydroxide (TetramethylammoniumHydroxide, TMAH) of 2.38%, or the TMAH of 0.4%, or the potassium hydroxide of 4.5% (KOH).
Compared to prior art, the manufacture method of thin-film transistor of the present invention, the first surface 100a of supporting body 100 forms spaced photoresistance unit 210, gap 220 is formed and exposed portion first surface 100a between adjacent photoresistance unit 210, then plated metal, the first surface exposed by described gap 220 forms metal level, wherein, described metal level be in light shield layer, grid, source electrode, drain electrode, storage electrode any one or multiple, then, described photoresistance unit 210 is peeled off.As can be seen here, the manufacture method of thin-film transistor of the present invention does not need to carry out the middle processing procedure such as etching, thus reduces the time cycle of thin-film transistor making.
Above disclosedly be only a kind of preferred embodiment of the present invention, certainly the interest field of the present invention can not be limited with this, one of ordinary skill in the art will appreciate that all or part of flow process realizing above-described embodiment, and according to the equivalent variations that the claims in the present invention are done, still belong to the scope that invention is contained.
Claims (10)
1. a manufacture method for thin-film transistor, is characterized in that, the manufacture method of described thin-film transistor comprises:
There is provided supporting body, described supporting body comprises the first surface and second surface that are oppositely arranged;
The first surface of described supporting body is formed spaced photoresistance unit, between adjacent photoresistance unit, forms gap and exposed portion first surface;
Plated metal, the first surface exposed by described gap forms metal level, wherein, described metal level be in light shield layer, grid, source electrode, drain electrode, storage electrode any one or multiple;
Peel off described photoresistance unit.
2. the manufacture method of thin-film transistor as claimed in claim 1, it is characterized in that, " on the first surface of described supporting body, form spaced photoresistance unit in described step, between adjacent photoresistance unit, form gap and exposed portion first surface " and comprising:
The described first surface of described supporting body is formed the photoresist layer of flood;
Described photoresist layer is exposed, to form spaced described photoresistance unit, between adjacent photoresistance unit, forms gap and exposed portion first surface.
3. the manufacture method of thin-film transistor as claimed in claim 2, it is characterized in that, described step " exposes described photoresist layer, to form spaced described photoresistance unit, forms gap and exposed portion first surface between adjacent photoresistance unit " and comprising:
There is provided light shield, described light shield and one section, described photoresist layer interval predeterminable range and be oppositely arranged, described light shield comprises Part I and Part II, described Part I and described Part II different to the iris action of light;
Light source is provided, described light source is arranged on the side of described light shield away from described photoresist layer, the light that described light source sends is irradiated to described Part I and described Part II forms spaced photoresistance unit to make described photoresist layer, wherein, described Part I is corresponding with described photoresistance unit, and the gap between described Part II and adjacent photoresistance unit is corresponding.
4. the manufacture method of thin-film transistor as claimed in claim 3, it is characterized in that, the manufacture method of described thin-film transistor also comprises:
Adjust the light that described light source sends, form chamfering to make the position in the contiguous described gap of described photoresistance unit.
5. the manufacture method of thin-film transistor as claimed in claim 2, it is characterized in that, described step " forms spaced photoresistance unit, forms gap and exposed portion first surface between adjacent photoresistance unit " and comprising on the first surface of described supporting body:
The described first surface of described supporting body is formed the photoresist layer of flood;
Prebake conditions is carried out to described photoresist layer;
Photoresist layer through prebake conditions is carried out to the baking of preset temperature and Preset Time;
Development treatment is carried out to the photoresist layer after roasted, to form spaced described photoresistance unit, between adjacent photoresistance unit, forms gap and exposed portion first surface.
6. the manufacture method of thin-film transistor as claimed in claim 5, is characterized in that, when carrying out development treatment, uses the KOH of the TMAH of the 2.38% or TMAH of 0.4% or 4.5%.
7. the manufacture method of thin-film transistor as claimed in claim 5, it is characterized in that, the thickness of described photoresist layer is 1 micron ~ 5 microns.
8. the manufacture method of thin-film transistor as claimed in claim 1, it is characterized in that, when described metal level is light shield layer, described supporting body is transparency carrier.
9. the manufacture method of thin-film transistor as claimed in claim 1, is characterized in that, when described metal level be source electrode and drain electrode time, described source electrode and described drain electrode are formed simultaneously.
10. the manufacture method of thin-film transistor as claimed in claim 1, is characterized in that, when described metal level be grid and storage electrode time, described grid and described storage electrode are formed simultaneously.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510951852.3A CN105575817A (en) | 2015-12-17 | 2015-12-17 | Manufacturing method of film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510951852.3A CN105575817A (en) | 2015-12-17 | 2015-12-17 | Manufacturing method of film transistor |
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| Publication Number | Publication Date |
|---|---|
| CN105575817A true CN105575817A (en) | 2016-05-11 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510951852.3A Pending CN105575817A (en) | 2015-12-17 | 2015-12-17 | Manufacturing method of film transistor |
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| CN (1) | CN105575817A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040229417A1 (en) * | 2002-12-11 | 2004-11-18 | Kenichi Furuta | Method of forming film |
| CN1713352A (en) * | 2004-06-23 | 2005-12-28 | 日立电线株式会社 | Manufacture of semiconductor device |
| CN102169959A (en) * | 2010-01-11 | 2011-08-31 | 三星移动显示器株式会社 | Method of manufacturing high resolution organic thin film pattern |
| CN104319293A (en) * | 2014-11-10 | 2015-01-28 | 京东方科技集团股份有限公司 | Metallic oxide thin film transistor, array substrate, manufacturing method and display device |
| CN104797086A (en) * | 2014-01-17 | 2015-07-22 | 冠捷投资有限公司 | Method for forming circuit pattern on substrate |
-
2015
- 2015-12-17 CN CN201510951852.3A patent/CN105575817A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040229417A1 (en) * | 2002-12-11 | 2004-11-18 | Kenichi Furuta | Method of forming film |
| CN1713352A (en) * | 2004-06-23 | 2005-12-28 | 日立电线株式会社 | Manufacture of semiconductor device |
| CN102169959A (en) * | 2010-01-11 | 2011-08-31 | 三星移动显示器株式会社 | Method of manufacturing high resolution organic thin film pattern |
| CN104797086A (en) * | 2014-01-17 | 2015-07-22 | 冠捷投资有限公司 | Method for forming circuit pattern on substrate |
| CN104319293A (en) * | 2014-11-10 | 2015-01-28 | 京东方科技集团股份有限公司 | Metallic oxide thin film transistor, array substrate, manufacturing method and display device |
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Application publication date: 20160511 |
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