CN105553590B - The clock synchronizing method and device of a kind of packet switching network - Google Patents

The clock synchronizing method and device of a kind of packet switching network Download PDF

Info

Publication number
CN105553590B
CN105553590B CN201510906351.3A CN201510906351A CN105553590B CN 105553590 B CN105553590 B CN 105553590B CN 201510906351 A CN201510906351 A CN 201510906351A CN 105553590 B CN105553590 B CN 105553590B
Authority
CN
China
Prior art keywords
phase difference
send
state
receive clock
switching network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201510906351.3A
Other languages
Chinese (zh)
Other versions
CN105553590A (en
Inventor
王德明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raisecom Technology Co Ltd
Original Assignee
Raisecom Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raisecom Technology Co Ltd filed Critical Raisecom Technology Co Ltd
Priority to CN201510906351.3A priority Critical patent/CN105553590B/en
Publication of CN105553590A publication Critical patent/CN105553590A/en
Application granted granted Critical
Publication of CN105553590B publication Critical patent/CN105553590B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0647—Synchronisation among TDM nodes

Abstract

It is accurate to capture and track source clock to overcome the baneful influence that network PDV is brought the invention discloses a kind of clock synchronizing method of packet switching network and device, meet the clock performance demand of traditional TDM business.The clock synchronizing method of packet switching network, including：Obtain send-receive clock phase difference corresponding to the packet message received；According to the reception of packet message order using multiple packet messages as one group, it is multigroup by the send-receive clock phase difference got, the minimum send-receive clock phase difference in every group of send-receive clock phase difference is obtained, and calculates the variance of the minimum send-receive clock phase difference of predetermined number in multiple minimum send-receive clock phase differences；The state of packet switching network is determined according to the relation of variance and predetermined threshold value, and gain of the local terminal to feedback phase difference is adjusted according to the state of packet switching network, phase adjustment value is calculated according to feedback phase difference and gain, and the phase of local terminal recovered clock is adjusted using phase adjustment value.

Description

The clock synchronizing method and device of a kind of packet switching network
Technical field
The present invention relates to the clock synchronizing method and device of communication technical field, more particularly to a kind of packet switching network.
Background technology
With the evolution and development of communication network, traditional circuit-switched network is gradually by follow-on high-speed packet Exchange network is substituted.The evolution of network is one and deposits the process with merging, for the needs of protection operator existing investment, And the chronicity of packet switching network construction considers, existing traditional time division is multiplexed (Time Division Multiplexing, TDM) network will exist within a very long time.Therefore, relayed in follow-on packet switching network The traditional TDM business of continuous carrying is very necessary.Internet Engineering Task group (The Internet Engineering Task Force, IETF) normal structure Pseudo Wire Emulation Edge-to-Edge working group (Pseudo Wire Emulation Edge to Edge, PWE3) simulation technology that proposes is the current mainstream technology for carrying TDM on a packet switched network.
In TDM circuit emulation technology, in sending side, specifically to encapsulate, by continuous tdm traffic, with fixed net Lotus number is encapsulated into packet message, periodically sends packet message.In receiving side, because packet switching network message is trembled in the presence of delay Dynamic (packet delay variation, PDV), it is therefore desirable to a jitter cache (jitter buffer) buffers PDV, TDM payloads are cached into jitter cache, then sent out TDM payloads with TDM tranmitting data registers.TDM tranmitting data register should be with Source clock keeps synchronous, and in general TDM tranmitting data register can be other external clock references such as GPS, BITS, while also may be used To be self-adaptive recovery clock (adaptive clock recovery, ACR).
Self-adaptive recovery clock technology is an important technology of simulation technology, and it is independent of outside clock Source, the time stamp statistical information reached by TDM packet messages, compared with local terminal recovered clock, adjust local terminal recovered clock Deviation, it is synchronous with source clock to be finally reached local terminal recovered clock, and substantially self-adaptive recovery clock is also a kind of lock phase Ring (Phase Locked Loop, PLL).Existing circuit emulation service (Circuit Emulation Service, CES) is adopted Clock recovery techniques have two kinds：One kind be using RTP (Real-time Transport Protocol, RTP) carry and send time stab information, the transmission time stab information carried using the RTP received carries out clock recovery；One kind be directly according to The time reached according to packet message, which obtains, receives time stab information, and clock recovery is carried out using time stab information is received.
G.8261, ITU describes the discharge model of packet switching network, can accordingly be obtained according to these models corresponding The PDV distributions of network.And the difficult point of adaptive clock recovery technology is that in packet message PDV be present, due to packet switch There is larger PDV in network, common PLL can not correctly track the clock of source, simultaneously because PDV low frequency characteristic, leads The tracking clock drift performance for causing common PLL to obtain is very poor.
In summary, larger delay jitter in packet switching network in the prior art be present, give packet switching network band Ill effect is carried out, has caused local terminal recovered clock accurately can not capture and track source clock, so as to which traditional TDM can not be met The clock performance demand of business.
The content of the invention
The embodiments of the invention provide a kind of clock synchronizing method of packet switching network and device, to overcome network The baneful influence that PDV is brought, it is accurate to capture and track source clock, meet the clock performance demand of traditional TDM business.
A kind of clock synchronizing method of packet switching network provided in an embodiment of the present invention, this method include：Obtain and receive Send-receive clock phase difference corresponding to the packet message arrived, the send-receive clock phase difference are the source that local terminal receives the packet message The phase and local terminal of clock send the difference of the phase of the local terminal recovered clock of corresponding packet message；It is suitable according to the reception of packet message The send-receive clock phase difference got is multigroup, obtains every group of send-receive clock phase by sequence using multiple packet messages as one group When the minimum send-receive clock phase difference in difference, obtaining multiple minimum send-receive clock phase differences, and calculating the multiple minimum transmitting-receiving The variance of the minimum send-receive clock phase difference of predetermined number in clock phase difference；Determined according to the relation of the variance and predetermined threshold value The state of the packet switching network, and increasing of the local terminal to feedback phase difference is adjusted according to the state of the packet switching network Benefit, the feedback phase difference are the minimum send-receive clock phase differences in every group of send-receive clock phase difference；According to the feedback phase Phase adjustment value is calculated in poor and described gain, and the phase of the local terminal recovered clock is entered using the phase adjustment value Row adjustment.
In the above method provided in an embodiment of the present invention, according to the reception of packet message order using multiple packet messages as one Group, it is multigroup by the send-receive clock phase difference got, obtains the minimum send-receive clock phase in every group of send-receive clock phase difference Potential difference, multiple minimum send-receive clock phase differences are obtained, and it is minimum to calculate predetermined number in multiple minimum send-receive clock phase differences The variance of send-receive clock phase difference；The state of packet switching network is determined according to the variance, and according to the shape of packet switching network State adjusts gain of the local terminal to feedback phase difference, and phase adjustment value, and profit then is calculated according to feedback phase difference and gain The phase of local terminal recovered clock is adjusted with phase adjustment value, with larger prolong in prior art packet switching network be present When shake, cause local terminal recovered clock can not accurately capture with tracking source clock compare, effectively prevent network it is big delay tremble Dynamic interference so that local terminal recovered clock accurately can capture and track source clock, meet the clock performance of traditional TDM business Demand.
In a kind of possible embodiment, in the above method provided in an embodiment of the present invention, according to the variance and in advance If the relation of threshold value determines the state of the packet switching network, including：When the variance is less than the first predetermined threshold value, it is determined that The state of the packet switching network is non-congested state, and when the variance is more than the second predetermined threshold value, it is determined that described The state of packet switching network is congestion state, wherein, first predetermined threshold value is less than second predetermined threshold value.
In a kind of possible embodiment, in the above method provided in an embodiment of the present invention, according to the packet switch Gain of the state adjustment local terminal of network to feedback phase difference, including：When the state of the packet switching network is non-congested shape It is preset gain that gain of the local terminal to feedback phase difference is adjusted during state；When the state of the packet switching network is congestion state Adjust the preset multiple that gain of the local terminal to feedback phase difference is the preset gain.
In a kind of possible embodiment, in the above method provided in an embodiment of the present invention, when obtaining every group of transmitting-receiving After minimum send-receive clock phase difference in clock phase difference, determine that the packet is handed over according to the relation of the variance and predetermined threshold value Before the state of switching network, this method also includes：The multiple minimum send-receive clock phase difference is sent to wave filter and filtered Ripple processing, judges whether the minimum send-receive clock phase difference after filtered processing restrains；According to the variance and predetermined threshold value Relation determine the state of the packet switching network, including：Minimum send-receive clock phase after filtered processing is judged During difference convergence, the state of the packet switching network is determined according to the relation of the variance and predetermined threshold value.
In a kind of possible embodiment, in the above method provided in an embodiment of the present invention, this method also includes：Work as institute When the state for stating packet switching network is non-congested state or congestion state, the phase data of local terminal recovered clock is stored.
In a kind of possible embodiment, in the above method provided in an embodiment of the present invention, when according to packet message Reception order is using multiple packet messages as one group, by the send-receive clock phase difference got for after multigroup, according to variance and Before the relation of predetermined threshold value determines the state of packet switching network, this method also includes：Obtain every group of send-receive clock phase difference In maximum send-receive clock phase difference, and amplitude limit is carried out to every group of send-receive clock phase difference using preset value, after calculating amplitude limit The average value of every group of send-receive clock phase difference；When it is determined that the maximum send-receive clock phase difference in any group of send-receive clock phase difference is big In the 3rd predetermined threshold value, and when the average value of the send-receive clock phase difference after this group of amplitude limit is with transmitting-receiving after this group of previous group amplitude limit When the difference of the average value of clock phase difference is more than four predetermined threshold values, the state for determining the packet switching network is guard mode, Then local terminal recovered clock tracks the packet switching network and is in the phase data stored when non-congested state or congestion state, its In, the 3rd predetermined threshold value is more than the 4th predetermined threshold value.
In the above method provided in an embodiment of the present invention, when it is determined that the maximum in any group of send-receive clock phase difference is received and dispatched Clock phase difference is more than the 3rd predetermined threshold value, and the average value of the send-receive clock phase difference after this group of amplitude limit and this group of previous group amplitude limit When the difference of the average value of send-receive clock phase difference afterwards is more than four predetermined threshold values, it is determined that the state of packet switching network is guarantor Shield state, local terminal recovered clock tracking packet switching network are in the phase data stored when non-congested state or congestion state, It is very long one section so as to longer the time required to avoiding the state that packet switching network is determined according to the relation of variance and predetermined threshold value In time can not the state of real-time judge packet switching network make corresponding feedback, what local terminal recovered clock vibrated asks Topic.
In a kind of possible embodiment, in the above method provided in an embodiment of the present invention, according to the packet switch Before gain of the state adjustment local terminal of network to feedback phase difference, this method also includes：Feedback phase difference is passed through two Level exponentially weighted moving average (EWMA) (Exponentially Weighted Moving-Average, EWMA) wave filter is filtered Processing.
In the above method provided in an embodiment of the present invention, on the one hand, send multiple minimum send-receive clock phase differences to filter Ripple device is filtered processing, judges whether the minimum send-receive clock phase difference after filtered processing restrains, when it is determined that filtered When minimum send-receive clock phase difference after processing is restrained, packet switching network is determined according to the relation of variance and predetermined threshold value State, on the other hand, local terminal recovered clock track multiple minimum send-receive clock phase differences and obtained by two-stage EWMA filter filterings The feedback phase arrived is poor, namely using the separated two-stage phase-locked loop structures of Carrier acquisition and tracking source clock, finally by obtaining The minimum send-receive clock phase difference in every group of send-receive clock phase difference is taken, effectively reduces delay larger in packet switching network The influence of shake, improves signal to noise ratio, according to every group of send-receive clock phase difference after maximum send-receive clock phase difference and amplitude limit Average value, the state for determining packet switching network is guard mode, avoid according to the relation of variance and predetermined threshold value determine point Local terminal recovered clock is vibrated during the state of group exchange network, and the packet switching network is determined according to the relation of variance and predetermined threshold value The state of network, gain of the local terminal to feedback phase difference is adjusted according to the state of packet switching network, it is then poor according to feedback phase Phase adjustment value is calculated with gain, and the phase of local terminal recovered clock is adjusted using phase adjustment value, so as to Enough clock locks for reaching pinpoint accuracy when packet message has larger delay jitter and tracking source clock.
A kind of clock synchronization apparatus of packet switching network provided in an embodiment of the present invention, including：Acquiring unit, for obtaining Send-receive clock phase difference corresponding to the packet message received is taken, the send-receive clock phase difference is that local terminal receives the packet message Source clock phase and local terminal send corresponding packet message local terminal recovered clock phase difference；Processing unit, it is used for According to the reception of packet message order using multiple packet messages as one group, be by the send-receive clock phase difference got it is multigroup, The minimum send-receive clock phase difference in every group of send-receive clock phase difference is obtained, obtains multiple minimum send-receive clock phase differences, and count The variance of the minimum send-receive clock phase difference of predetermined number in the multiple minimum send-receive clock phase difference is calculated, then according to The relation of variance and predetermined threshold value determines the state of the packet switching network, is adjusted according to the state of the packet switching network Gain of the local terminal to feedback phase difference, the feedback phase difference is the minimum send-receive clock phase in every group of send-receive clock phase difference Difference；Phasing unit, for phase adjustment value to be calculated according to the poor and described gain of the feedback phase, and described in utilization Phase adjustment value is adjusted to the phase of the local terminal recovered clock.
In said apparatus provided in an embodiment of the present invention, according to the reception of packet message order using multiple packet messages as one Group, it is multigroup by the send-receive clock phase difference got, obtains the minimum send-receive clock phase in every group of send-receive clock phase difference Potential difference, multiple minimum send-receive clock phase differences are obtained, and it is minimum to calculate predetermined number in multiple minimum send-receive clock phase differences The variance of send-receive clock phase difference；The state of packet switching network is determined according to the variance, and according to the shape of packet switching network State adjusts gain of the local terminal to feedback phase difference, and phase adjustment value, and profit then is calculated according to feedback phase difference and gain The phase of local terminal recovered clock is adjusted with phase adjustment value, with larger prolong in prior art packet switching network be present When shake, cause local terminal recovered clock can not accurately capture with tracking source clock compare, effectively prevent network it is big delay tremble Dynamic interference so that local terminal recovered clock accurately can capture and track source clock, meet the clock performance of traditional TDM business Demand.
In a kind of possible embodiment, in said apparatus provided in an embodiment of the present invention, the processing unit according to The relation of the variance and predetermined threshold value determines the state of the packet switching network, is specifically used for：When the variance is less than the During one predetermined threshold value, the processing unit determines that the state of the packet switching network is non-congested state, and as the side When difference is more than the second predetermined threshold value, the processing unit determines that the state of the packet switching network is congestion state, wherein, institute State the first predetermined threshold value and be less than second predetermined threshold value.
In a kind of possible embodiment, in said apparatus provided in an embodiment of the present invention, the processing unit according to Gain of the state adjustment local terminal of the packet switching network to feedback phase difference, is specifically used for：When the packet switching network State when being non-congested state, gain of the processing unit adjustment local terminal to feedback phase difference is preset gain；When described Gain of the processing unit adjustment local terminal to feedback phase difference is described pre- when the state of packet switching network is congestion state If the preset multiple of gain.
In a kind of possible embodiment, in said apparatus provided in an embodiment of the present invention, obtained in the processing unit After taking the minimum send-receive clock phase difference in every group of send-receive clock phase difference, the processing unit is according to the variance with presetting Before the relation of threshold value determines the state of the packet switching network, the processing unit is additionally operable to：By the multiple minimum receipts Hair clock skew, which is sent to wave filter, is filtered processing, judges that the minimum send-receive clock phase difference after filtered processing is No convergence；The processing unit determines the state of the packet switching network according to the relation of the variance and predetermined threshold value, bag Include：When the minimum send-receive clock phase difference convergence after the processing unit judges filtered processing, the processing unit root The state of the packet switching network is determined according to the relation of the variance and predetermined threshold value.
In a kind of possible embodiment, in said apparatus provided in an embodiment of the present invention, the processing unit is also used In：When the state of the packet switching network is non-congested state or congestion state, the number of phases of local terminal recovered clock is stored According to.
In a kind of possible embodiment, in said apparatus provided in an embodiment of the present invention, when the processing unit root According to packet message reception order using multiple packet messages as one group, by the send-receive clock phase difference got be it is multigroup it Afterwards, before the processing unit determines the state of packet switching network according to the relation of variance and predetermined threshold value, the processing is single Member is additionally operable to：The maximum send-receive clock phase difference in every group of send-receive clock phase difference is obtained, and using preset value to every group of transmitting-receiving Clock skew carries out amplitude limit, calculates the average value of every group of send-receive clock phase difference after amplitude limit；When it is determined that during any group of transmitting-receiving Maximum send-receive clock phase difference in clock phase difference is more than the 3rd predetermined threshold value, and the send-receive clock phase difference after this group of amplitude limit When the difference of the average value of send-receive clock phase difference after average value and this group of previous group amplitude limit is more than four predetermined threshold values, institute is determined The state for stating packet switching network is guard mode, then local terminal recovered clock tracks the packet switching network and is in non-congested shape The phase data stored when state or congestion state, wherein, the 3rd predetermined threshold value is more than the 4th predetermined threshold value.
In said apparatus provided in an embodiment of the present invention, when it is determined that the maximum in any group of send-receive clock phase difference is received and dispatched Clock phase difference is more than the 3rd predetermined threshold value, and the average value of the send-receive clock phase difference after this group of amplitude limit and this group of previous group amplitude limit When the difference of the average value of send-receive clock phase difference afterwards is more than four predetermined threshold values, it is determined that the state of packet switching network is guarantor Shield state, local terminal recovered clock tracking packet switching network are in the phase data stored when non-congested state or congestion state, It is very long one section so as to longer the time required to avoiding the state that packet switching network is determined according to the relation of variance and predetermined threshold value In time can not the state of real-time judge packet switching network make corresponding feedback, what local terminal recovered clock vibrated asks Topic.
In a kind of possible embodiment, in said apparatus provided in an embodiment of the present invention, the processing unit according to Before gain of the state adjustment local terminal of the packet switching network to feedback phase difference, it is additionally operable to：The feedback phase is poor Processing is filtered by two-stage exponentially weighted moving average (EWMA) EWMA wave filters.
In said apparatus provided in an embodiment of the present invention, on the one hand, send multiple minimum send-receive clock phase differences to filter Ripple device is filtered processing, judges whether the minimum send-receive clock phase difference after filtered processing restrains, when it is determined that filtered When minimum send-receive clock phase difference after processing is restrained, packet switching network is determined according to the relation of variance and predetermined threshold value State, on the other hand, local terminal recovered clock track multiple minimum send-receive clock phase differences and obtained by two-stage EWMA filter filterings The feedback phase arrived is poor, namely using the separated two-stage phase-locked loop structures of Carrier acquisition and tracking source clock, finally by obtaining The minimum send-receive clock phase difference in every group of send-receive clock phase difference is taken, effectively reduces delay larger in packet switching network The influence of shake, improves signal to noise ratio, according to every group of send-receive clock phase difference after maximum send-receive clock phase difference and amplitude limit Average value, the state for determining packet switching network is guard mode, avoid according to the relation of variance and predetermined threshold value determine point Local terminal recovered clock is vibrated during the state of group exchange network, and the packet switching network is determined according to the relation of variance and predetermined threshold value The state of network, gain of the local terminal to feedback phase difference is adjusted according to the state of packet switching network, it is then poor according to feedback phase Phase adjustment value is calculated with gain, and the phase of local terminal recovered clock is adjusted using phase adjustment value, so as to Enough clock locks for reaching pinpoint accuracy when packet message has larger delay jitter and tracking source clock.
Brief description of the drawings
Fig. 1 is a kind of schematic flow diagram of the clock synchronizing method of packet switching network provided in an embodiment of the present invention；
Fig. 2 is a kind of schematic flow diagram for determining packet switching network state provided in an embodiment of the present invention；
Fig. 3 is a kind of structural representation of the clock synchronization apparatus of packet switching network provided in an embodiment of the present invention；
Fig. 4 is that a kind of concrete structure of clock synchronization apparatus of packet switching network provided in an embodiment of the present invention is illustrated Figure.
Embodiment
Below in conjunction with the accompanying drawings, to the clock synchronizing method and device of a kind of packet switching network provided in an embodiment of the present invention Embodiment be described in detail.
The clock synchronizing method of packet switching network provided in an embodiment of the present invention, is applicable not only to adaptive clock recovery Pattern, it is equally applicable to differential clocks reforestation practices.
The clock synchronizing method of a kind of packet switching network provided in an embodiment of the present invention, as shown in figure 1, this method bag Include：
Step 102, send-receive clock phase difference corresponding to the packet message received is obtained, send-receive clock phase difference is local terminal Receive the phase of the source clock of the packet message and local terminal send corresponding packet message local terminal recovered clock phase difference；
Step 104, according to the reception of packet message order using multiple packet messages as one group, the send-receive clock that will be got Phase difference is multigroup, obtains the minimum send-receive clock phase difference in every group of send-receive clock phase difference, obtains multiple minimum transmitting-receivings Clock skew, and calculate the variance of the minimum send-receive clock phase difference of predetermined number in multiple minimum send-receive clock phase differences；
Step 106, the state of packet switching network is determined according to the relation of variance and predetermined threshold value, and according to packet switch Gain of the state adjustment local terminal of network to feedback phase difference, feedback phase difference are the minimum receipts in every group of send-receive clock phase difference Send out clock skew；
Step 108, phase adjustment value is calculated according to feedback phase difference and gain, and using phase adjustment value to local terminal The phase of recovered clock is adjusted.
In method provided in an embodiment of the present invention, according to the reception of packet message order using multiple packet messages as one group, It is multigroup by the send-receive clock phase difference got, obtains the minimum send-receive clock phase in every group of send-receive clock phase difference Difference, multiple minimum send-receive clock phase differences are obtained, and calculate the minimum receipts of predetermined number in multiple minimum send-receive clock phase differences Send out the variance of clock skew；The state of packet switching network is determined according to the variance, and according to the state of packet switching network Gain of the local terminal to feedback phase difference is adjusted, phase adjustment value is then calculated according to feedback phase difference and gain, and utilize Phase adjustment value is adjusted to the phase of local terminal recovered clock, with larger delay in prior art packet switching network be present Shake, cause local terminal recovered clock not capture accurately and compared with tracking source clock, by choosing minimum send-receive clock phase The message of difference, the larger message of send-receive clock phase difference is abandoned, effectively prevent the interference of the big delay jitter of network so that local terminal Recovered clock accurately can capture and track source clock, meet the clock performance demand of traditional TDM business.
What deserves to be explained is source can be network side in the embodiment of the present invention, source sends packet report with source clock Text, local terminal receives the packet message sent with source clock, while the sending side of local terminal is with corresponding to the transmission of local terminal recovered clock Packet message, wherein, the packet message that the packet message that local terminal receiving side receives is sent with local terminal sending side is not same point Group message, wherein, the feedback phase difference in the embodiment of the present invention can be in the every group of send-receive clock phase difference got most Small send-receive clock phase difference, more preferably, for multiple minimum send-receive clock phase differences, device filters feedback phase difference after filtering Obtain afterwards, such as：Wave filter is two-stage exponentially weighted moving average (EWMA) EWMA wave filters.
When it is implemented, when extracting the packet message of respective channel according to property sort, arriving for the packet message is recorded Up to the time, T is designated asrx(n), while when the packet message leaves, the time departure of corresponding packet message is recorded, is designated as Ttx (n), it is assumed that it is X (n) to remember send-receive clock phase difference corresponding to the packet message, then has：X (n)=(Trx(n+1)-Trx(n))- (Ttx(n+1)-Ttx(n))。
According to the reception of packet message order using multiple packet messages as one group, the send-receive clock phase difference that will get To be multigroup, the minimum send-receive clock phase difference in every group of send-receive clock phase difference is obtained, obtains multiple minimum send-receive clock phases Difference, and calculate the variance of the minimum send-receive clock phase difference of predetermined number in multiple minimum send-receive clock phase differences, specific implementation When：Send-receive clock phase difference X (n) corresponding to multiple packet messages is received, according to reception order according to one group of the composition per N number of X (n) Data Xk(n) (n ∈ [0, N-1]), X is obtainedk(n) the minimum send-receive clock phase difference in, calculate individual most per M (i.e. predetermined number) The average Eb (m) and variance Db (m) of small send-receive clock phase difference, wherein, N and M value can use default value, can also be free Setting, but need to ensure that N is more than or equal to M.Such as：N=20, M=10.
In a kind of possible embodiment, in method provided in an embodiment of the present invention, according to variance and predetermined threshold value Relation determines the state of packet switching network, including：When variance is less than the first predetermined threshold value, the shape of packet switching network is determined State is non-congested state, and when variance is more than the second predetermined threshold value, the state for determining packet switching network is congestion state, Wherein, the first predetermined threshold value is less than the second predetermined threshold value.
As more specific embodiment, when variance is less than the first predetermined threshold value, the state of packet switching network is determined For non-congested state, and when variance is more than the second predetermined threshold value, the state for determining packet switching network is congestion state, its In, the first predetermined threshold value and the second predetermined threshold value can use default value, can also freely set, but need to ensure that first is default Threshold value is less than the second predetermined threshold value, such as：First predetermined threshold value is 5, and the second predetermined threshold value is 20.
In a kind of possible embodiment, in method provided in an embodiment of the present invention, according to the shape of packet switching network State adjusts gain of the local terminal to feedback phase difference, including：Local terminal is adjusted when the state of packet switching network is non-congested state Gain to feedback phase difference is preset gain；Local terminal is adjusted when the state of packet switching network is congestion state to feeding back phase The gain of potential difference is the preset multiple of preset gain.
When it is implemented, assume that adjustment local terminal is poor to feedback phase when the state of packet switching network is non-congested state Gain be preset gain G, then when the state of packet switching network is congestion state adjust local terminal to feedback phase difference increasing Benefit is the preset multiple of preset gain, and preset multiple is any multiple more than 0 and less than 1, more preferably, works as packet switch The half that gain of the local terminal to feedback phase difference is preset gain is adjusted when the state of network is congestion state, wherein, preset and increase Benefit can use default value, can also freely set, such as：G=2db.
In a kind of possible embodiment, in method provided in an embodiment of the present invention, every group of send-receive clock phase is being obtained After minimum send-receive clock phase difference in potential difference, the state of packet switching network is determined according to the relation of variance and predetermined threshold value Before, this method also includes：Multiple minimum send-receive clock phase differences are sent to wave filter and are filtered processing, are judged filtered Whether the minimum send-receive clock phase difference after processing restrains；Packet switching network is determined according to the relation of variance and predetermined threshold value State, including：When the minimum send-receive clock phase difference convergence after judging filtered processing, according to variance and predetermined threshold value Relation determine the state of packet switching network.
Processing, conventional filter are filtered when it is implemented, multiple minimum send-receive clock phase differences are sent to wave filter Ripple device has non-recursive type (Finite Impulse Response, FIR) wave filter, EWMA wave filters and Kalman filter etc., Specifically can be by the way of prior art, here is omitted.Judge the minimum send-receive clock phase difference after filtered processing Whether restrain, when the minimum send-receive clock phase difference convergence after judging filtered processing, according to variance and predetermined threshold value Relation determines the state of packet switching network, when the minimum send-receive clock phase difference after judging filtered processing is not restrained, Then continue to judge.
It should be noted that when the minimum send-receive clock phase difference convergence after judging filtered processing, according to variance The state of packet switching network is determined with the relation of predetermined threshold value, when the state of packet switching network is non-congested state or congestion During state, it is still desirable to judge whether the minimum send-receive clock phase difference after filtered processing restrains, once filtered processing Minimum send-receive clock phase difference afterwards is not restrained, then needs the minimum send-receive clock phase difference after filtered processing is judged During convergence, the state of packet switching network is determined according to the relation of variance and predetermined threshold value again.
In a kind of possible embodiment, in method provided in an embodiment of the present invention, this method also includes：When packet is handed over When the state of switching network is non-congested state or congestion state, the phase data of local terminal recovered clock is stored.
When it is implemented, when the state of packet switching network is non-congested state or congestion state, storage local terminal recovers The phase data of clock, in order to which when the state of packet switching network is guard mode, the tracking packet of local terminal recovered clock is handed over The normal phase data that the state of switching network stores when being non-congested state or congestion state, namely it is easy to local terminal recovered clock Tracking packet switching network is in the phase data stored when non-congested state or congestion state.
When it is implemented, although the change by the variance Db (m) of the minimum send-receive clock phase difference of predetermined number can The state of packet switching network noise is reacted, but the time required for variance statistic is longer, can just be obtained per N*M packet message One group of data is obtained, and can regard non-thread as due to obtaining minimum send-receive clock phase difference in every group of send-receive clock phase difference Property filtering, jittering noise suppressed to a certain degree, further increases the required time, causes very long one section Be in time can not real-time judge packet switching network state change, make corresponding feedback, local terminal recovered clock is sent out therewith Raw vibration.
In consideration of it, in a kind of possible embodiment, in method provided in an embodiment of the present invention, when according to packet message Reception order using multiple packet messages as one group, by the send-receive clock phase difference got be it is multigroup after, according to variance Before the state that packet switching network is determined with the relation of predetermined threshold value, this method also includes：Obtain every group of send-receive clock phase Maximum send-receive clock phase difference in difference, and amplitude limit is carried out to every group of send-receive clock phase difference using preset value, after calculating amplitude limit Every group of send-receive clock phase difference average value；When it is determined that maximum send-receive clock phase difference in any group of send-receive clock phase difference More than the 3rd predetermined threshold value, and the average value of the send-receive clock phase difference after this group of amplitude limit and the transmitting-receiving after this group of previous group amplitude limit When the difference of the average value of clock skew is more than four predetermined threshold values, the state for determining packet switching network is guard mode, then Local terminal recovered clock tracking packet switching network is in the phase data stored when non-congested state or congestion state, wherein, the Three predetermined threshold values are more than the 4th predetermined threshold value.
In method provided in an embodiment of the present invention, it is determined that maximum send-receive clock phase in any group of send-receive clock phase difference Potential difference is more than the 3rd predetermined threshold value, and after the average value of the send-receive clock phase difference after this group of amplitude limit and this group of previous group amplitude limit When the difference of the average value of send-receive clock phase difference is more than four predetermined threshold values, it is determined that the state of packet switching network is protection shape State, local terminal recovered clock tracking packet switching network are in the phase data stored when non-congested state or congestion state, so as to Avoid state required time longer, a very long time that packet switching network is determined according to the relation of variance and predetermined threshold value It is interior can not the state of real-time judge packet switching network make corresponding feedback, the problem of local terminal recovered clock vibrates.
When it is implemented, wherein, amplitude limit is carried out to every group of send-receive clock phase difference using preset value, preset value can be free Setting, such as：100 microseconds, the 3rd predetermined threshold value and the 4th predetermined threshold value can also freely be set, but need to ensure that the 3rd is default Threshold value is more than the 4th predetermined threshold value, and more preferably, the 3rd predetermined threshold value is much larger than the 4th predetermined threshold value, such as：3rd is default Threshold value is 1, and the 4th predetermined threshold value is 10.
What deserves to be explained is when the state of packet switching network is guard mode, the tracking packet of local terminal recovered clock is handed over Switching network is in the phase data stored when non-congested state or congestion state, while when the state of packet switching network is protection During state, the variance of the minimum send-receive clock phase difference of predetermined number is calculated, packet switch is determined according to the variance being calculated Whether the state of network can switch to non-congested state and congestion state.
Certainly, when the state of packet switching network is non-congested state, if receiving Network Packet Loss alarm, packet is handed over The state of switching network switches to guard mode.
In a kind of possible embodiment, in the above method provided in an embodiment of the present invention, according to packet switching network State adjustment local terminal to feedback phase difference gain before, this method also includes：Feedback phase difference is added by two-stage index Power rolling average EWMA wave filters are filtered processing.
In method provided in an embodiment of the present invention, on the one hand, send multiple minimum send-receive clock phase differences to wave filter Processing is filtered, judges whether the minimum send-receive clock phase difference after filtered processing restrains, when it is determined that filtered processing When minimum send-receive clock phase difference afterwards is restrained, the shape of packet switching network is determined according to the relation of variance and predetermined threshold value State, on the other hand, local terminal recovered clock track multiple minimum send-receive clock phase differences and obtained by two-stage EWMA filter filterings Feedback phase it is poor, namely using the separated two-stage phase-locked loop structures of Carrier acquisition and tracking source clock, finally by acquisition Minimum send-receive clock phase difference in every group of send-receive clock phase difference, effectively reduces delay larger in packet switching network and trembles Dynamic influence, improves signal to noise ratio, according to every group of send-receive clock phase difference after maximum send-receive clock phase difference and amplitude limit Average value, the state for determining packet switching network is guard mode, avoids determining to be grouped according to the relation of variance and predetermined threshold value Local terminal recovered clock is vibrated during the state of exchange network, and packet switching network is determined according to the relation of variance and predetermined threshold value State, according to the state of packet switching network adjust local terminal to feedback phase difference gain, then according to feedback phase difference and Phase adjustment value is calculated in gain, and the phase of local terminal recovered clock is adjusted using phase adjustment value, so as to Reach the clock lock and tracking source clock of pinpoint accuracy when packet message has larger delay jitter.
With reference to determinations of the Fig. 2 to non-congested state provided in an embodiment of the present invention, congestion state and guard mode Flow illustrates, as shown in Fig. 2 including：
Step 202, the state of initial packet exchange network is non-congested state；
Step 204, the maximum send-receive clock phase difference in every group of send-receive clock phase difference is obtained, and using preset value to every Group send-receive clock phase difference carries out amplitude limit, calculates the average value of every group of send-receive clock phase difference after amplitude limit；Judge maximum transmitting-receiving Whether clock skew is flat more than the send-receive clock phase difference after the 3rd predetermined threshold value L2 and two adjacent groups packet message amplitude limit Whether the difference of average is more than the 4th predetermined threshold value L1, if so, then performing step 206, otherwise, the state of packet switching network is still The value of non-congested state, wherein L1, L2 can freely be set, but need to ensure that L2 value is more than L1 value, such as：L1=1, L2 =10；
Step 206, transmitting-receiving after judging that maximum send-receive clock phase difference is more than L2 and two adjacent groups packet message amplitude limit When the difference of the average value of clock skew is more than L1, the state for determining packet switching network is guard mode, then when local terminal recovers Clock tracking packet switching network is in the phase data stored when non-congested state or congestion state, while calculates predetermined number The variance of minimum send-receive clock phase difference；
Step 208, judge whether the variance of the minimum send-receive clock phase difference of predetermined number is more than the second predetermined threshold value L3, If so, then performing step 210, otherwise, step 216 is performed, wherein, L3 value can freely be set, such as：L3=20；
Step 210, when the variance for judging the minimum send-receive clock phase difference of predetermined number is more than L3, packet switch is determined The state of network is congestion state, then adjusts the preset multiple that gain of the local terminal to feedback phase difference is preset gain, preset again Number is any multiple more than 0 and less than 1, more preferably, preset multiple 0.5；
Step 212, judge whether the variance of the minimum send-receive clock phase difference of predetermined number is less than the first predetermined threshold value L4, If so, then performing step 214, otherwise the state of packet switching network is still congestion state, wherein, L4 value can freely be set It is fixed, but it is the need to ensure that L4 value is less than L3 value, such as：L3=5；
Step 214, when the variance for judging the minimum send-receive clock phase difference of predetermined number is less than L4, packet switch is determined The state of network is non-congested state, then it is preset gain to adjust gain of the local terminal to feedback phase difference；
Step 216, when the variance for judging the minimum send-receive clock phase difference of predetermined number is less than L3, protection shape is exited State, the state for determining packet switching network are non-congested state.
A kind of clock synchronization apparatus of packet switching network provided in an embodiment of the present invention, as shown in figure 3, including：Obtain Unit 302, for obtaining send-receive clock phase difference corresponding to the packet message received, the send-receive clock phase difference is local terminal Receive the phase of the source clock of the packet message and local terminal send corresponding packet message local terminal recovered clock phase difference； Processing unit 304, for the reception order according to packet message using multiple packet messages as one group, the send-receive clock that will be got Phase difference is multigroup, obtains the minimum send-receive clock phase difference in every group of send-receive clock phase difference, obtains multiple minimum transmitting-receivings Clock skew, and the variance of the minimum send-receive clock phase difference of predetermined number in multiple minimum send-receive clock phase differences is calculated, Then the state of packet switching network is determined according to the relation of variance and predetermined threshold value, is adjusted according to the state of packet switching network Gain of the local terminal to feedback phase difference, the feedback phase difference is the minimum send-receive clock phase in every group of send-receive clock phase difference Difference；Phasing unit 306, for phase adjustment value to be calculated according to feedback phase difference and gain, and utilize phase adjustment Value is adjusted to the phase of local terminal recovered clock.
In device provided in an embodiment of the present invention, according to the reception of packet message order using multiple packet messages as one group, It is multigroup by the send-receive clock phase difference got, obtains the minimum send-receive clock phase in every group of send-receive clock phase difference Difference, multiple minimum send-receive clock phase differences are obtained, and calculate the minimum receipts of predetermined number in multiple minimum send-receive clock phase differences Send out the variance of clock skew；The state of packet switching network is determined according to the variance, and according to the state of packet switching network Gain of the local terminal to feedback phase difference is adjusted, phase adjustment value is then calculated according to feedback phase difference and gain, and utilize Phase adjustment value is adjusted to the phase of local terminal recovered clock, with larger delay in prior art packet switching network be present Shake, cause local terminal recovered clock not capture accurately and compared with tracking source clock, by choosing minimum send-receive clock phase The message of difference, the larger message of send-receive clock phase difference is abandoned, effectively prevent the interference of the big delay jitter of network so that local terminal Recovered clock accurately can capture and track source clock, meet the clock performance demand of traditional TDM business.
In a kind of possible embodiment, in device provided in an embodiment of the present invention, processing unit 304 according to variance with The relation of predetermined threshold value determines the state of packet switching network, is specifically used for：When variance is less than the first predetermined threshold value, processing is single Member 304 determines that the state of packet switching network is non-congested state, and when variance is more than the second predetermined threshold value, processing unit The state of 304 determination packet switching networks is congestion state, wherein, the first predetermined threshold value is less than the second predetermined threshold value.
In a kind of possible embodiment, in device provided in an embodiment of the present invention, processing unit 304 is handed over according to packet Gain of the state adjustment local terminal of switching network to feedback phase difference, is specifically used for：When the state of packet switching network is non-congested During state, it is preset gain that processing unit 304, which adjusts gain of the local terminal to feedback phase difference,；When the state of packet switching network is During congestion state, processing unit 304 adjusts the preset multiple that gain of the local terminal to feedback phase difference is preset gain.
In a kind of possible embodiment, in device provided in an embodiment of the present invention, every group is obtained in processing unit 304 After minimum send-receive clock phase difference in send-receive clock phase difference, processing unit 304 is according to variance and the relation of predetermined threshold value Before the state for determining packet switching network, processing unit 304 is additionally operable to：Multiple minimum send-receive clock phase differences are sent to filter Ripple device is filtered processing, judges whether the minimum send-receive clock phase difference after filtered processing restrains；Processing unit 304 The state of packet switching network is determined according to the relation of variance and predetermined threshold value, including：When processing unit 304 judges filtered processing When minimum send-receive clock phase difference afterwards is restrained, processing unit 304 determines that packet is handed over according to the relation of variance and predetermined threshold value The state of switching network.
In a kind of possible embodiment, in device provided in an embodiment of the present invention, processing unit 304 is additionally operable to：When When the state of packet switching network is non-congested state or congestion state, the phase data of local terminal recovered clock is stored.
In a kind of possible embodiment, in device provided in an embodiment of the present invention, when processing unit 304 is according to packet The reception order of message is using multiple packet messages as one group, after being multigroup by the send-receive clock phase difference got, processing Before unit 304 determines the state of packet switching network according to the relation of variance and predetermined threshold value, processing unit 304 is additionally operable to： The maximum send-receive clock phase difference in every group of send-receive clock phase difference is obtained, and using preset value to every group of send-receive clock phase difference Amplitude limit is carried out, calculates the average value of every group of send-receive clock phase difference after amplitude limit；When it is determined that in any group of send-receive clock phase difference Maximum send-receive clock phase difference be more than the 3rd predetermined threshold value, and the average value of the send-receive clock phase difference after this group of amplitude limit with should When the difference of the average value of send-receive clock phase difference after group previous group amplitude limit is more than four predetermined threshold values, packet switching network is determined State be guard mode, then local terminal recovered clock tracking packet switching network is stored when being in non-congested state or congestion state Phase data, wherein, the 3rd predetermined threshold value is more than the 4th predetermined threshold value.
In device provided in an embodiment of the present invention, it is determined that maximum send-receive clock phase in any group of send-receive clock phase difference Potential difference is more than the 3rd predetermined threshold value, and after the average value of the send-receive clock phase difference after this group of amplitude limit and this group of previous group amplitude limit When the difference of the average value of send-receive clock phase difference is more than four predetermined threshold values, it is determined that the state of packet switching network is protection shape State, local terminal recovered clock tracking packet switching network are in the phase data stored when non-congested state or congestion state, so as to Avoid state required time longer, a very long time that packet switching network is determined according to the relation of variance and predetermined threshold value It is interior can not the state of real-time judge packet switching network make corresponding feedback, the problem of local terminal recovered clock vibrates.
In a kind of possible embodiment, in device provided in an embodiment of the present invention, processing unit 304 is handed over according to packet Before gain of the state adjustment local terminal of switching network to feedback phase difference, it is additionally operable to：Feedback phase difference is added by two-stage index Power rolling average EWMA wave filters are filtered processing.
In device provided in an embodiment of the present invention, on the one hand, send multiple minimum send-receive clock phase differences to wave filter Processing is filtered, judges whether the minimum send-receive clock phase difference after filtered processing restrains, when it is determined that filtered processing When minimum send-receive clock phase difference afterwards is restrained, the shape of packet switching network is determined according to the relation of variance and predetermined threshold value State, on the other hand, local terminal recovered clock track multiple minimum send-receive clock phase differences and obtained by two-stage EWMA filter filterings Feedback phase it is poor, namely using the separated two-stage phase-locked loop structures of Carrier acquisition and tracking source clock, finally by acquisition Minimum send-receive clock phase difference in every group of send-receive clock phase difference, effectively reduces delay larger in packet switching network and trembles Dynamic influence, improves signal to noise ratio, according to every group of send-receive clock phase difference after maximum send-receive clock phase difference and amplitude limit Average value, the state for determining packet switching network is guard mode, avoids determining to be grouped according to the relation of variance and predetermined threshold value Local terminal recovered clock is vibrated during the state of exchange network, and packet switching network is determined according to the relation of variance and predetermined threshold value State, according to the state of packet switching network adjust local terminal to feedback phase difference gain, then according to feedback phase difference and Phase adjustment value is calculated in gain, and the phase of local terminal recovered clock is adjusted using phase adjustment value, so as to Reach the clock lock and tracking source clock of pinpoint accuracy when packet message has larger delay jitter.
In the clock synchronization apparatus of packet switching network provided in an embodiment of the present invention, acquiring unit 302, processing unit 304 and phasing unit 306 can use CPU processor etc..
When it is implemented, a kind of clock synchronization apparatus of packet switching network provided in an embodiment of the present invention, such as Fig. 4 institutes Show, including：It is time stamp processing module 402, sampled point analysis module 404, frequency acquisition module 406, filtration module 408, network-like State monitoring modular 410, state control centre 412, numerically-controlled oscillator NCO 414 and sending module 416, wherein, obtain Unit 302 includes：Time stamp processing module 402, processing unit 304 include：Sampled point analysis module 404, frequency acquisition module 406 And filtration module 408, Network Expert Systems module 410 and state control centre 412, phasing unit 306 include：Number Word control oscillator NCO 414 and sending module 416, it is specifically, each in the clock synchronization apparatus of packet switching network Module is act as：
Time stamp processing module 402：The packet message of respective channel is extracted according to property sort, time stamp processing module is to note Record the arrival time T of the packet messagerx(n), while NCO 414 then sends the local terminal recovered clock of recovery to sending module 416, sending module 416 tells the transmission time of corresponding packet message to time stamp processing module 402, time stamp processing module record pair Answer the transmission time T of packet messagetx(n).The send-receive clock phase difference that time stamp processing module 402 exports is represented by：X (n)= (Trx(n+1)-Trx(n))-(Ttx(n+1)-Ttx(n))。
Sampled point analysis module 404：Obtain send-receive clock phase difference X (n), each X that time stamp processing module 402 is sent (n) it is a sampled point, according to one group of data X of composition per N number of X (n)k(n) (n ∈ [0, N-1]), by choosing Xk(n) in Minimum send-receive clock phase difference obtains new sampling point information X as new sampled pointbest(k)；And by new sampling point information Send to frequency acquisition module 406 and filtration module 408.In addition, sampled point analysis module 404 is additionally operable to：
Calculate Xbest(k) per the average Eb (m) of M sampled point, variance Db (m) information in；
Obtain Xk(n) maximum Xmax(k)；
To Xk(n) carry out amplitude limit and obtain Xklimit(n), for the X after amplitude limitklimit(n) calculate and be worth to E (k)；
By Db (m), Xmax(k), E (k) is sent to Network Expert Systems module 410.
Frequency acquisition module 406：The new sampling point information that sampled point analysis module 404 is sent is received, is adopted according to new Sampling point information, is filtered, and conventional wave filter has FIR filter, EWMA wave filters, Kalman filter etc., prior art It is described, does not repeat.After the minimum send-receive clock phase difference after judging filtered processing reaches convergence, state is notified Control centre 412 has completed trapped state, can be switched to Phase Tracking state.
Filtration module 408：Using the EWMA wave filters of two-stage, realize and the phase that sampled point analysis module 404 exports is missed The filtering process of poor information, and the feedback phase difference after the filtering of minimum send-receive clock phase difference will be sent to state control centre 412 phases for being used for the adjustment local terminal recovered clock under Phase Tracking state are allowed to track the phase of source clock.
Network Expert Systems module 410：The Db (m) being calculated according to sampled point analysis module 404, according to input data Noise situations, notice state control centre 412 produces corresponding actions dynamically to adjust gain of the local terminal to feedback phase difference.
State control centre 412：Before frequency acquisition, the collection frequency trapping module 406 of state control centre 412 is caught Information is obtained, and the state of network capture is judged according to these information, produces the LOCK state instructions of phaselocked loop.In frequency After capture, it is tracking mode that phaselocked loop is put by state control centre 412, and under tracking mode, frequency is collected by state control centre 412 The information of rate trapping module 406, and judge whether losing lock, notify system to carry out re-synchronization if losing lock.
In the case where phaselocked loop is in tracking mode, the congestion shape of the collection network state monitoring module 410 of state control centre 412 State and guard mode information.The gain of the feedback phase difference obtained from filtration module 408 is reduced in congestion state dynamic, it is assumed that Gain of the loop to feedback phase difference during non-congested state is G, then gain of the loop to feedback phase difference in congestion state G preset multiples are reduced to, such as：It is reduced to 0.5G.State control centre 412 is responsible for collecting the NCO under normal condition simultaneously 414 phase datas, are recorded in buffering area.Once it was found that it is under guard mode, then the phase data that playback buffer area records.Together When Shi Ruguo receives Network Packet Loss alarm, notice NCO 414 is tracked holding.In non-congested state, state control centre 412 It is poor then to collect the feedback phase that filtration module 408 obtains, and track according to the loop gain-adjusted NCO 414 poor to feedback phase The phase place change of source clock.
In summary, the clock synchronizing method and device of a kind of packet switching network provided in an embodiment of the present invention, a side Face, multiple minimum send-receive clock phase differences are sent to wave filter and are filtered processing, judge the minimum after filtered processing Whether send-receive clock phase difference restrains, when it is determined that the minimum send-receive clock phase difference after filtered processing is restrained, according to side The relation of difference and predetermined threshold value determines the state of packet switching network, and on the other hand, the multiple minimums of local terminal recovered clock tracking are received The feedback phase that hair clock skew obtains by two-stage EWMA filter filterings is poor, namely uses Carrier acquisition and tracking source The separated two-stage phase-locked loop structures of clock, finally by the minimum send-receive clock phase obtained in every group of send-receive clock phase difference Difference, the influence of delay jitter larger in packet switching network is effectively reduced, improves signal to noise ratio, according to maximum send-receive clock The average value of every group of send-receive clock phase difference after phase difference and amplitude limit, the state for determining packet switching network are protection shape State, avoid determining that local terminal recovered clock vibrates during the state of packet switching network according to the relation of variance and predetermined threshold value, The state of packet switching network is determined according to the relation of variance and predetermined threshold value, local terminal is adjusted according to the state of packet switching network Gain to feedback phase difference, phase adjustment value is then calculated according to feedback phase difference and gain, and utilizes phase adjustment Value is adjusted to the phase of local terminal recovered clock, so as to reach high-precision when packet message has larger delay jitter The clock lock and tracking source clock of exactness.
It should be understood by those skilled in the art that, embodiments of the invention can be provided as method, system or computer program Product.Therefore, the present invention can use the reality in terms of complete hardware embodiment, complete software embodiment or combination software and hardware Apply the form of example.Moreover, the present invention can use the computer for wherein including computer usable program code in one or more The shape for the computer program product that usable storage medium is implemented on (including but is not limited to magnetic disk storage and optical memory etc.) Formula.
The present invention is the flow with reference to method according to embodiments of the present invention, equipment (system) and computer program product Figure and/or block diagram describe.It should be understood that can be by every first-class in computer program instructions implementation process figure and/or block diagram Journey and/or the flow in square frame and flow chart and/or block diagram and/or the combination of square frame.These computer programs can be provided The processors of all-purpose computer, special-purpose computer, Embedded Processor or other programmable data processing devices is instructed to produce A raw machine so that produced by the instruction of computer or the computing device of other programmable data processing devices for real The device for the function of being specified in present one flow of flow chart or one square frame of multiple flows and/or block diagram or multiple square frames.
These computer program instructions, which may be alternatively stored in, can guide computer or other programmable data processing devices with spy Determine in the computer-readable memory that mode works so that the instruction being stored in the computer-readable memory, which produces, to be included referring to Make the manufacture of device, the command device realize in one flow of flow chart or multiple flows and/or one square frame of block diagram or The function of being specified in multiple square frames.
These computer program instructions can be also loaded into computer or other programmable data processing devices so that counted Series of operation steps is performed on calculation machine or other programmable devices to produce computer implemented processing, so as in computer or The instruction performed on other programmable devices is provided for realizing in one flow of flow chart or multiple flows and/or block diagram one The step of function of being specified in individual square frame or multiple square frames.
Obviously, those skilled in the art can carry out the essence of various changes and modification without departing from the present invention to the present invention God and scope.So, if these modifications and variations of the present invention belong to the scope of the claims in the present invention and its equivalent technologies Within, then the present invention is also intended to comprising including these changes and modification.

Claims (14)

1. a kind of clock synchronizing method of packet switching network, it is characterised in that this method includes：
Send-receive clock phase difference corresponding to the packet message received is obtained, the send-receive clock phase difference is that local terminal receives this point The phase and local terminal of the source clock of group message send the difference of the phase of the local terminal recovered clock of corresponding packet message；
It is more by the send-receive clock phase difference got according to the reception of packet message order using multiple packet messages as one group Group, the minimum send-receive clock phase difference in every group of send-receive clock phase difference is obtained, obtain multiple minimum send-receive clock phase differences, and Calculate the variance of the minimum send-receive clock phase difference of predetermined number in the multiple minimum send-receive clock phase difference；
The state of the packet switching network is determined according to the relation of the variance and predetermined threshold value, and according to the packet switch Gain of the state adjustment local terminal of network to feedback phase difference, the feedback phase difference do not correspond to every group of send-receive clock phase difference In minimum send-receive clock phase difference；
Phase adjustment value is calculated according to the poor and described gain of the feedback phase, and using the phase adjustment value to described The phase of local terminal recovered clock is adjusted.
2. according to the method for claim 1, it is characterised in that according to determining the relation of the variance and predetermined threshold value The state of packet switching network, including：
When the variance is less than the first predetermined threshold value, the state for determining the packet switching network is non-congested state, and When the variance is more than the second predetermined threshold value, the state for determining the packet switching network is congestion state, wherein, described One predetermined threshold value is less than second predetermined threshold value.
3. according to the method for claim 2, it is characterised in that local terminal pair is adjusted according to the state of the packet switching network The gain of feedback phase difference, including：
It is default increasing that gain of the local terminal to feedback phase difference is adjusted when the state of the packet switching network is non-congested state Benefit；
It is described default that gain of the local terminal to feedback phase difference is adjusted when the state of the packet switching network is congestion state The preset multiple of gain.
4. according to the method for claim 3, it is characterised in that the minimum transmitting-receiving in every group of send-receive clock phase difference is obtained , should before the state that the packet switching network is determined according to the relation of the variance and predetermined threshold value after clock skew Method also includes：
The multiple minimum send-receive clock phase difference is sent to wave filter and is filtered processing, after judging filtered processing Whether minimum send-receive clock phase difference restrains；
The state of the packet switching network is determined according to the relation of the variance and predetermined threshold value, including：It is filtered when judging When minimum send-receive clock phase difference after processing is restrained, determine that the packet is handed over according to the relation of the variance and predetermined threshold value The state of switching network.
5. according to the method for claim 4, it is characterised in that this method also includes：When the shape of the packet switching network When state is non-congested state or congestion state, the phase data of local terminal recovered clock is stored.
6. according to the method for claim 5, it is characterised in that when the reception order according to packet message is reported with multiple packets Wen Weiyi groups, after being multigroup by the send-receive clock phase difference got, determine to divide according to the relation of variance and predetermined threshold value Before the state of group exchange network, this method also includes：
The maximum send-receive clock phase difference in every group of send-receive clock phase difference is obtained, and using preset value to every group of send-receive clock phase Potential difference carries out amplitude limit, calculates the average value of every group of send-receive clock phase difference after amplitude limit；
When it is determined that the maximum send-receive clock phase difference in any group of send-receive clock phase difference is more than the 3rd predetermined threshold value, and group limit The difference of the average value of send-receive clock phase difference after the average value of send-receive clock phase difference after width and this group of previous group amplitude limit is big When four predetermined threshold values, the state for determining the packet switching network is guard mode, then described in the tracking of local terminal recovered clock Packet switching network is in the phase data stored when non-congested state or congestion state, wherein, the 3rd predetermined threshold value is big In the 4th predetermined threshold value.
7. according to the method any one of claim 1-6, it is characterised in that according to the state of the packet switching network Before adjusting gain of the local terminal to feedback phase difference, this method also includes：Feedback phase difference is passed through into two-stage exponential weighting Rolling average EWMA wave filters are filtered processing.
A kind of 8. clock synchronization apparatus of packet switching network, it is characterised in that including：
Acquiring unit, for obtaining send-receive clock phase difference corresponding to the packet message received, the send-receive clock phase difference The phase of the source clock of the packet message and the phase of the local terminal recovered clock of the corresponding packet message of local terminal transmission are received for local terminal The difference of position；
Processing unit, for the reception order according to packet message using multiple packet messages as one group, during the transmitting-receiving that will be got Clock phase difference is multigroup, obtains the minimum send-receive clock phase difference in every group of send-receive clock phase difference, obtains multiple minimum receipts Clock skew is sent out, and calculates the minimum send-receive clock phase difference of predetermined number in the multiple minimum send-receive clock phase difference Variance, the state of the packet switching network is then determined according to the relation of the variance and predetermined threshold value, according to the packet Gain of the state adjustment local terminal of exchange network to feedback phase difference, the feedback phase difference do not correspond to every group of send-receive clock phase Minimum send-receive clock phase difference in potential difference；
Phasing unit, for phase adjustment value to be calculated according to the poor and described gain of the feedback phase, and utilize institute Phase adjustment value is stated to be adjusted the phase of the local terminal recovered clock.
9. device according to claim 8, it is characterised in that the processing unit is according to the variance and predetermined threshold value Relation determines the state of the packet switching network, is specifically used for：
When the variance is less than the first predetermined threshold value, the processing unit determines that the state of the packet switching network is gathered around to be non- Plug-like state, and when the variance is more than the second predetermined threshold value, the processing unit determines the shape of the packet switching network State is congestion state, wherein, first predetermined threshold value is less than second predetermined threshold value.
10. device according to claim 9, it is characterised in that the processing unit is according to the packet switching network State adjusts gain of the local terminal to feedback phase difference, is specifically used for：
When the state of the packet switching network is non-congested state, the processing unit adjustment local terminal is to feedback phase difference Gain is preset gain；
When the state of the packet switching network is congestion state, increasing of the processing unit adjustment local terminal to feedback phase difference Benefit is the preset multiple of the preset gain.
11. device according to claim 10, it is characterised in that obtain every group of send-receive clock phase in the processing unit After minimum send-receive clock phase difference in difference, the processing unit is according to determining the relation of the variance and predetermined threshold value Before the state of packet switching network, the processing unit is additionally operable to：
The multiple minimum send-receive clock phase difference is sent to wave filter and is filtered processing, after judging filtered processing Whether minimum send-receive clock phase difference restrains；
The processing unit determines the state of the packet switching network according to the relation of the variance and predetermined threshold value, including： When the minimum send-receive clock phase difference convergence after the processing unit judges filtered processing, according to the variance with presetting The relation of threshold value determines the state of the packet switching network.
12. device according to claim 11, it is characterised in that the processing unit is additionally operable to：When the packet switch When the state of network is non-congested state or congestion state, the phase data of local terminal recovered clock is stored.
13. device according to claim 12, it is characterised in that when the processing unit is suitable according to the reception of packet message Sequence is using multiple packet messages as one group, by the send-receive clock phase difference got for after multigroup, the processing unit according to Before the relation of variance and predetermined threshold value determines the state of packet switching network, the processing unit is additionally operable to：
The maximum send-receive clock phase difference in every group of send-receive clock phase difference is obtained, and using preset value to every group of send-receive clock phase Potential difference carries out amplitude limit, calculates the average value of every group of send-receive clock phase difference after amplitude limit；
When it is determined that the maximum send-receive clock phase difference in any group of send-receive clock phase difference is more than the 3rd predetermined threshold value, and group limit The difference of the average value of send-receive clock phase difference after the average value of send-receive clock phase difference after width and this group of previous group amplitude limit is big When four predetermined threshold values, the state for determining the packet switching network is guard mode, then described in the tracking of local terminal recovered clock Packet switching network is in the phase data stored when non-congested state or congestion state, wherein, the 3rd predetermined threshold value is big In the 4th predetermined threshold value.
14. according to the device any one of claim 8-13, it is characterised in that the processing unit is according to the packet Before gain of the state adjustment local terminal of exchange network to feedback phase difference, it is additionally operable to：Feedback phase difference is passed through into two-stage Exponentially weighted moving average (EWMA) EWMA wave filters are filtered processing.
CN201510906351.3A 2015-12-09 2015-12-09 The clock synchronizing method and device of a kind of packet switching network Active CN105553590B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510906351.3A CN105553590B (en) 2015-12-09 2015-12-09 The clock synchronizing method and device of a kind of packet switching network

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510906351.3A CN105553590B (en) 2015-12-09 2015-12-09 The clock synchronizing method and device of a kind of packet switching network

Publications (2)

Publication Number Publication Date
CN105553590A CN105553590A (en) 2016-05-04
CN105553590B true CN105553590B (en) 2017-11-24

Family

ID=55832545

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510906351.3A Active CN105553590B (en) 2015-12-09 2015-12-09 The clock synchronizing method and device of a kind of packet switching network

Country Status (1)

Country Link
CN (1) CN105553590B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106357459B (en) * 2016-11-02 2019-09-17 瑞斯康达科技发展股份有限公司 A kind of method and device of delay jitter processing, clock synchronization apparatus
CN108259105B (en) * 2016-12-28 2019-12-13 中国移动通信有限公司研究院 time synchronization processing method and device and synchronization network
CN112583510A (en) * 2019-09-30 2021-03-30 华为技术有限公司 Message forwarding method, device and system

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8031747B2 (en) * 2009-04-29 2011-10-04 Juniper Networks, Inc. Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values
CN104253665B (en) * 2013-06-28 2017-06-13 上海贝尔股份有限公司 Synchronizer and the synchronization system comprising the equipment
CN104049525B (en) * 2014-03-24 2016-04-20 成都可为科技发展有限公司 A kind of method eliminating phase differential between multiple time input source in clock

Also Published As

Publication number Publication date
CN105553590A (en) 2016-05-04

Similar Documents

Publication Publication Date Title
CN100550720C (en) Clock synchronization on Packet Based Network
US8416814B2 (en) System and method for high precision clock recovery over packet networks
EP2164194B1 (en) Method and device for improving clock stability
US8018968B2 (en) System and method for high precision clock recovery over packet networks
CN101771409B (en) Phase locked loop with optimal state feedback controller
CN105553590B (en) The clock synchronizing method and device of a kind of packet switching network
EP2360861B1 (en) Clock recovery method over packet switched networks based on network quiet period detection
EP1394975B1 (en) Adaptive Clock Recovery
JP5123403B2 (en) Adaptive clock recovery with step delay precompensation
CN108833366B (en) Control frame compression method based on AS6802 protocol
EP3598247B1 (en) Network time correction method and apparatus
CN101795190B (en) Method and arrangement for adjustment of a clock signal
CN112994819A (en) Message processing method for clock synchronization, clock synchronization method and device
CN105794130B (en) It is used for synchronous method and apparatus using linear programming
JP2007306497A (en) Clock synchronization method and circuit in packet transmission
CN102684805B (en) For the method and apparatus controlling clock-signal generator
CN106357459B (en) A kind of method and device of delay jitter processing, clock synchronization apparatus
Aichhorn et al. Accurate clock synchronization for power systems protection devices over packet switched networks
CN116566529A (en) Time adjustment method, network equipment and system
CN109709422B (en) Clock drift elimination method and device
JP5168734B2 (en) Queuing delay measurement method, synchronization system using the method, method and program
CN103227707A (en) Synchronization processing apparatus, synchronization processing method and program
CN1615602B (en) Frame boundary discriminator
CN104954630B (en) Video time stamp acquisition methods, video processing equipment and video system
EP4149026A1 (en) System and method of clock recovery in a packet-compatible network

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant