CN105549006A - FPGA & SOC based handheld ground penetrating radar (GPR) system - Google Patents

Abstract

The invention discloses a hand-held ground-penetrating radar system based on FPGA&SOC. The system uses an integrated chip embedded with FPGA and ARM processor as the main control unit, and cooperates with the peripheral circuit and communication unit to complete the functions of radar pulse transmission, data reception and signal processing. The radar pulse transmitting unit and the programmable gain amplifying circuit complete the functions of radar pulse transmitting and receiving as well as filtering and amplifying; the equivalent sampling timing control unit based on FPGA design ensures the accuracy and resolution of the echo; the ARM processor controls the radar The echo is processed in real time, and the human-computer interaction is performed through the touch screen controller. At the same time, the radar data can be uploaded to the upper PC or stored in the cloud. It has small size, light weight and good portability. It can realize the real-time online processing function of radar data, and ensure the high precision of measurement, freedom of operation and humanization. It has broad application prospects in military, industrial control and civilian fields.

Description

A Handheld Ground Penetrating Radar System Based on FPGA&SOC

technical field

The invention relates to the field of ground penetrating radar, in particular to a hand-held ground penetrating radar system based on FPGA&SOC.

Background technique

Ground Penetrating Radar (GPR) is a non-destructive detection instrument that uses the penetration ability of electromagnetic waves to the surface to detect subsurface structures or buried objects. It transmits a specific form of electromagnetic waves to the subsurface, and measures the depth, medium structure and properties of the measurement target according to the parameters such as time delay, shape and spectrum characteristics of the echo signal. On this basis, the feature extraction of digital images is used. With the reconstruction technology, the underground target is imaged and processed in order to achieve the positioning and detection of the underground target.

The traditional ground penetrating radar system is divided into two types, one is to use PC computer, data transmission drive unit and peripheral circuit to design the radar system, in which the data transmission drive unit includes board card, USB drive and other types, responsible for receiving PC computer instructions Execute the driving task, the PC computer controls the board driver and the peripheral circuit to complete the transmission and reception of radar signals and data transmission, and at the same time complete the analysis, processing and imaging of radar data; the other uses the architecture of upper computer and lower computer, the upper computer uses The PC computer is used as a carrier to store, image and post-process radar data; the lower computer is generally composed of MPU or FPGA, and is responsible for the transmission and reception of radar signals and data transmission.

Chinese patent application CN200810104724.5 (publication number CN101566687A) discloses a ground radar numerical control acquisition system, which includes a host computer, a USB control module and a digital control unit. The development of the radar host driver is completed through the CPLD and the USB control module, and the CPLD is driven through the PC computer to complete the transmission, reception and transmission of radar signals.

Chinese patent application CN201219280937.X (publication number CN102799131A) discloses a ground penetrating radar lower computer control system based on FPGA. The system uses FPGA as the main control unit, cooperates with the transmitter pulse control unit, data sampling control unit and data communication unit to realize the control of various functions such as ultra-narrow pulse ground penetrating radar transmission, data reception and transmission. The FPGA first triggers the transmitter to emit a narrow pulse through the transmitter pulse control unit, then transmits the sampling control signal through the data sampling control unit, and completes the signal receiving operation through the sampling data receiving unit. After the ground penetrating radar lower computer system completes a complete detection, the sampling data is sent to the upper computer through the data communication unit for subsequent processing.

Existing radar systems, whether they use a PC as the main control unit or use other on-chip systems such as MPU as the transmission control unit, are inseparable from the back-end support of the PC computer, resulting in the bulky radar host and inconvenient operation. Both radar data acquisition and back-end analysis require a long cycle and require a lot of time overhead.

Contents of the invention

In order to solve the problems of complex, bulky and inconvenient operation of the existing ground penetrating radar system, the present invention provides a hand-held ground penetrating radar system based on FPGA&SOC, which uses an integrated chip embedded with FPGA and ARM processor as the main control The unit cooperates with peripheral circuits and communication units to complete the functions of ground penetrating radar pulse transmission, data reception, signal processing, and data transmission. The entire radar host is small in size, light in weight, and has good portability, which can realize real-time online radar data Processing function.

In order to solve the problems of the technologies described above, the technical scheme adopted in the present invention is as follows:

A hand-held ground-penetrating radar system based on FPGA&SOC, including a SOC integrated chip as a main control unit, a radar pulse transmitting unit, a programmable gain amplifier circuit, a radar antenna and a touch screen controller,

The SOC integrated chip is embedded with an FPGA and an ARM processor, and the FPGA is respectively connected to the radar pulse transmitting unit and the programmable gain amplifier circuit through the IO interface, and the radar pulse transmitter unit and the programmable gain amplifier circuit are respectively connected to the radar antenna , by coordinating the working status of each unit, complete the launch and collection of radar signals; the ARM processor and FPGA are connected through the AXI bus to complete the work of parameter design, echo gain table downloading, and radar data uploading. The ARM processor processes the radar data in real time, and completes the display and interaction functions by connecting with the touch screen controller.

Wherein, the system also includes a communication unit, the communication unit includes a 4G module and an Ethernet module, so that the radar data can be uploaded to the upper PC through the Ethernet module or synchronized to the cloud for backup through the 4G module, and the cloud can be controlled online Radar system setup parameters.

Wherein, the FPGA includes an equivalent sampling timing control unit, the radar pulse transmitting unit includes a temperature-compensated crystal oscillator, a delay chip, and a radio frequency modulation circuit, and the equivalent sampling timing control unit is connected to the radio frequency modulation circuit through a delay chip, and the The radio frequency modulation circuit is connected with the radar antenna; the equivalent sampling timing control unit uses the temperature-compensated crystal oscillator as the control clock, and accurately controls the radar equivalent sampling timing through the method of FPGA internal coarse delay and delay chip fine delay, and transmits radar pulses.

Wherein, the programmable gain amplifying circuit is completed by AD8336 of ADI Company, and the ARM processor transmits the echo gain table to the memory of the FPGA through the AXI bus, and the FPGA controls the DA according to the echo gain table through the coordinated timing sequence. The output voltage is used to complete the time-varying gain amplification of the radar echo.

Among them, the uploading of the radar data has gone through the FPGA memory, the ARM processor memory, and the upper PC memory respectively, and can be stored permanently in the memory card of the ARM processor and the memory disk of the upper PC respectively; it is completed through the ping-pong operation during the FPGA transmission process The operation of "interval storage from AD sampling module to FPGA memory" to "burst upload from FPGA memory to ARM memory" is realized.

Among them, the embedded linux operating system is used in the ARM processor to complete radar data processing, feature extraction, color image display and parameter control, and the radar interface design interaction function is completed based on the Qt framework.

Among them, the minimum time step accuracy of the system is 10ps, the transmit pulse repetition frequency is optional from 100KHz to 1MHz, the sampling depth is optional from 128 to 4096, the scanning rate per second is optional from 16 to 2048, the analog-to-digital conversion is 16 bits, and the pre-gain is 0db ~100db is optional, manual or automatic adjustment of the radar echo gain curve, display mode: waveform, color, gray scale optional, acquisition trigger mode: marking, measurement wheel, duration optional.

Wherein, the SOC integrated chip further includes a sampling storage unit, and the sampling storage unit is connected to the FPGA through an IO interface.

Beneficial effect:

A kind of hand-held ground-penetrating radar system based on FPGA&SOC of the present invention has the following advantages: all digital parts of the whole system are completed by an integrated chip, so that the whole radar host is small in size, light in weight, low in power consumption, and has Good portability; powerful ARM processor cooperates with FPGA parallel programming to realize real-time online processing of radar echo data; the timing system designed by "high stable temperature compensated crystal oscillator + coarse delay + fine delay" ensures system measurement High precision, embedded linux program design based on Qt interface ensures software freedom and interactive humanization; it can also perform online data upload and cloud synchronization operations, and has a wide range of application prospects in military, industrial control, and civilian fields.

Description of drawings

Fig. 1 is the overall structural block diagram of the present invention based on FPGA&SOC hand-held ground-penetrating radar system.

FIG. 2 is a structural diagram of equivalent sampling timing control and transmission sampling timing synchronization in the present invention.

Fig. 3 is a spatial structure diagram for realizing the time-varying gain of the radar echo in the present invention.

Fig. 4 is a space transmission diagram of radar acquisition data in the present invention.

Fig. 5 is the software flowchart of the ARM processor in the FPGA-SOC handheld ground-penetrating radar system based on the present invention.

Fig. 6 is the actual working test interface of the software of the present invention.

In the picture:

1-SOC integrated chip, 2-ARM processor, 3-FPGA, 4-radar pulse transmitting unit, 5-programmable gain amplifier circuit, 6-radar antenna, 7-sampling storage unit, 8-touch screen controller.

detailed description

The technical solutions of the present invention will be further specifically described below through the embodiments and in conjunction with the accompanying drawings.

Fig. 1 is the overall structural block diagram of the present invention based on FPGA&SOC hand-held ground-penetrating radar system. As shown in Figure 1, a kind of hand-held ground-penetrating radar system based on FPGA&SOC of the present invention is characterized in that, comprises the SOC integrated chip 1 as main control unit, radar pulse emission unit 4, programmable gain amplifier circuit 5, Radar antenna 6 and touch screen controller 8,

The SOC integrated chip 1 is embedded with FPGA3 and ARM processor 2, and the FPGA3 is connected to the radar pulse transmitting unit 4 and the programmable gain amplifier circuit 5 through the IO interface respectively, and the radar pulse transmitting unit 4 and the programmable gain amplifier circuit 5 are respectively connected with the radar antenna 6, and by coordinating the working state of each unit, complete the emission and collection of radar signals; the ARM processor 2 and FPGA3 are connected through the AXI bus to complete parameter design, echo gain table downloading, For the uploading of radar data, the ARM processor 2 processes the radar data in real time, and is connected with the touch screen controller 8 to complete the functions of display and interaction.

The system also includes a communication unit, the communication unit includes a 4G module and an Ethernet module, so that the radar data can be uploaded to the upper PC through the Ethernet module or synchronized to the cloud for backup through the 4G module, and the cloud can control the radar system online at the same time Setting parameters.

The SOC integrated chip 1 also includes a sampling storage unit 7, and the sampling storage unit 7 is connected to the FPGA 3 through an IO interface.

It can be seen that the system of the present invention completes the design of the system through an SOC integrated chip 1 embedded with FPGA 3 and ARM processor 2 in cooperation with peripheral circuits and communication units. Among them, FPGA3 is respectively connected with radar pulse transmitting unit 4, programmable gain amplifier circuit 5, and sampling storage unit 7 through IO, and completes the transmission and collection of radar signals by coordinating the working status of each unit. The ARM processor 2 and FPGA3 are connected through the AXI bus to complete the work of parameter design, echo gain table download, and radar data upload. The ARM processor 2 processes the radar data in real time, and completes the display and interaction functions through the touch screen controller 8 . At the same time, the radar data can be uploaded to the upper PC or synchronized to the cloud for backup. All the digital parts of the whole system are completed by an integrated chip, which makes the whole radar host small in size, light in weight, low in power consumption, and has good portability.

As shown in Figure 1, the FPGA3 includes an equivalent sampling timing control unit, and the radar pulse transmitting unit 4 includes a temperature-compensated crystal oscillator, a delay chip and a radio frequency modulation circuit, and the equivalent sampling timing control unit is modulated by a delay chip and a radio frequency modulation circuit. The circuit is connected, and the radio frequency modulation circuit is connected with the radar antenna 6; the equivalent sampling timing control unit uses the temperature-compensated crystal oscillator as the control clock, and accurately controls the radar equivalent sampling timing through the method of FPGA3 internal coarse delay and delay chip fine delay, Sends radar pulses.

FIG. 2 is a structural diagram of equivalent sampling timing control and transmission sampling timing synchronization in the present invention. As shown in Figure 2, the precise clock CLK is given as the working clock of all timing control units and synchronization modules through a high-temperature-compensated crystal oscillator. The interval trigger module generates trigger pulses at equal intervals according to the interval period T set by the control command. The equivalent delay module performs a coarse delay operation of an integer number of CLK clock cycles on the basis of the interval pulse, and obtains an interval pulse with a coarse delay, and then passes The inverse clock of CLK is latched to ensure the steepness and stability of the rising edge of the interval pulse with coarse delay. The interval pulse with coarse delay is output through a dedicated clock port as the trigger signal of the delay chip, and the radar sequential sampling synchronization signal with "coarse delay + fine delay" is obtained according to the delay time set by the delay chip synchronization. In addition, the interval pulse output by the interval trigger module triggers the echo gain control module through one delay module to complete the operation of synchronous control gain, and triggers the acquisition module through another delay module to complete the acquisition work. Among them, controlling the delay time of different modules can control the relative positional relationship of the gain curve relative to the radar echo, and the sampling point sequence relative to the radar echo.

The programmable gain amplifying circuit 5 adopts the AD8336 of ADI Company to complete, and the ARM processor 2 transmits the echo gain table to the memory of the FPGA3 through the AXI bus, and the FPGA3 controls the DA according to the echo gain table through the coordinated timing sequence. The output voltage is used to complete the time-varying gain amplification of the radar echo. Fig. 3 is a spatial structure diagram for realizing the time-varying gain of the radar echo in the present invention. As shown in Figure 3, the ARM processor 2 saves the echo time-varying gain map input by the user in the form of a wave table for short in the memory of the ARM processor 2, and the echo gain table is passed through the AXI bus. Downloaded to the memory of FPGA3, the DA control unit of FPGA3 reads the echo gain table data and outputs the gain control voltage under the trigger control of the clock synchronization unit, and controls two pieces of AD8336 of ADI Company to complete the echo time-varying two-stage amplification.

The uploading of the radar data has gone through the FPGA3 memory, the ARM processor 2 memory, and the upper PC memory respectively, and can be permanently stored in the memory card of the ARM processor 2 and the memory disk of the upper PC respectively; it is completed through the ping-pong operation during the FPGA3 transmission process The operation of "interval storage from AD sampling module to FPGA memory" to "burst upload from FPGA memory to ARM memory" is realized.

Fig. 4 is a space transmission diagram of radar acquisition data in the present invention. As shown in Figure 4, the upload process of radar sampling data will go through FPGA3 internal memory SRAM, ARM processor 2 memory, and upper PC memory disk, which can be performed on the memory SD card of ARM processor 2 and the upper PC memory disk respectively Save forever. Among them, FPGA3 is equipped with a storage space SRAM with twice the sampling depth, and the radar echo data is stored at equal intervals by address increment operation on the basis of the set timing cycle. The radar data is initially stored from the zero address of the low address segment. When a frame of echo data acquisition is completed, the low address segment is just full, and the AD sampling module generates an interrupt signal to notify the ARM processor 2 to use DMA to stream read the low address. At the same time, the radar data starts to be stored from the zero address of the high address segment. When an echo data collection is completed, the high address segment is just full, and the AD sampling module generates an interrupt signal to inform the ARM processor 2 to use DMA to stream Read the data of the high address segment. The uninterrupted upload operation of radar data is completed through such ping-pong operation. When the radar data needs to be stored in the hard disk of the host PC, the ARM processor 2 buffers 5 frames of radar data in the FIFO queue, and then completes the stream transmission of the data to the host PC through the TCP protocol. At the same time, the upper PC can send commands through UDP to set the corresponding parameters to complete the relevant operations in the process of radar transmission and reception. It should be noted that the AD sampling module is a unit module inside the FPGA3 and is controlled by the FPGA3.

The ARM processor 2 uses an embedded linux operating system to complete radar data processing, feature extraction, color image display and parameter control, and completes radar interface design interaction functions based on the Qt framework. Fig. 5 is a software flow chart of the ARM processor 2 in the FPGA&SOC handheld GPR system based on the present invention. As shown in Figure 5, the software part uses a customized embedded linux operating system as the operating environment of the program. The interaction of radar data is completed by developing the corresponding FPGA3 radar data interaction driver, and the interface program is written through the Qt framework to cooperate with the touch screen controller 8 to complete the man-machine interactive features. When the system is powered on, uboot completes the operation process of FPGA3 configuration and linux kernel startup successively. During the linux kernel startup process, the corresponding FPGA3 radar module driver is loaded to establish the Qt program operating environment. After the kernel startup is completed, the GPR main program based on the Qt framework is guided by the self-starting item, and multiple threads such as file management, parameter setting, data collection, data processing, and data push are respectively opened. Modifying the interface parameters in the parameter settings can control the above-mentioned threads to be in the running or suspended state respectively, and change the running state of the program and the display structure of the interface; modify the echo gain table to set the radar echo time-varying gain; modify the sampling The timing parameters can control the sequential sampling transmitter unit of the FPGA3 to transmit radar broadband pulse signals meeting different timing requirements, and at the same time control the synchronization module to change the relative positional relationship between the gain curve and the radar echo, and the sampling point sequence relative to the radar echo.

Fig. 6 is the actual working test interface of the software of the present invention. As shown in Figure 6, the radar system is designed through ARM+FPGA+hardware collaboration. The specific parameters are as follows: the minimum time step accuracy is 10 ps, the transmit pulse repetition frequency is optional from 100KHz to 1MHz, and the sampling depth is optional from 128 to 4096. Scan rate 16~2048 optional, analog-to-digital conversion 16 bits, pre-gain 0db~100db optional, manual or automatic adjustment of radar echo gain curve, display mode: waveform, color, gray scale optional, acquisition trigger mode: open Marker, measuring wheel, and duration are selectable.

The radar system integrates a 4G module and cooperates with the cloud server to open up a network link channel to realize quasi-real-time upload of radar data. At the same time, it can also complete remote control through the cloud to remotely modify radar working parameters.

The above-described embodiments and application scenarios are only preferred embodiments and application scenarios of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention and their Applications in other fields and scenarios should be included within the protection scope of the present invention.

Claims (8)

1. A hand-held ground-penetrating radar system based on FPGA&SOC, is characterized in that, comprises the SOC integrated chip (1) as main control unit, radar pulse transmitting unit (4), programmable gain amplifier circuit (5), radar antenna ( 6) and touch screen controller (8), The SOC integrated chip (1) is embedded with an FPGA (3) and an ARM processor (2), and the FPGA (3) is respectively connected to the radar pulse transmitting unit (4) and the programmable gain amplifier circuit (5) through an IO interface , the radar pulse transmitting unit (4) and the programmable gain amplifying circuit (5) are respectively connected with the radar antenna (6), and by coordinating the working states of each unit, the transmission and collection of radar signals are completed; the ARM processing The device (2) and FPGA (3) are connected through the AXI bus to complete the work of parameter design, echo gain table download, and radar data upload. The ARM processor (2) processes radar data in real time and communicates with the touch screen controller (8) Connect to complete the display and interaction functions. 2. A kind of hand-held ground-penetrating radar system based on FPGA&SOC according to claim 1, it is characterized in that, described system, also comprises communication unit, and described communication unit comprises 4G module and Ethernet module, makes radar data pass Ethernet The network module can be uploaded to the upper PC or synchronized to the cloud for backup through the 4G module. At the same time, the cloud can control the radar system setting parameters online. 3. a kind of hand-held ground-penetrating radar system based on FPGA&SOC according to claim 1, is characterized in that, described FPGA (3) comprises equivalent sampling timing control unit, and described radar pulse transmitting unit (4) comprises temperature compensation A crystal oscillator, a delay chip, and a radio frequency modulation circuit, the equivalent sampling timing control unit is connected to the radio frequency modulation circuit through the delay chip, and the radio frequency modulation circuit is connected to the radar antenna (6); the equivalent sampling timing control unit is The crystal oscillator is used as the control clock to accurately control the equivalent sampling timing of the radar through the coarse delay inside the FPGA (3) and the fine delay of the delay chip, and transmit radar pulses. 4. A kind of hand-held ground-penetrating radar system based on FPGA&SOC according to claim 1, characterized in that, the programmable gain amplifier circuit (5) is completed by AD8336 of ADI Company, and the ARM processor (2) passes The AXI bus transmits the echo gain table to the memory of the FPGA (3), and the FPGA (3) completes the time-varying gain amplification of the radar echo by controlling the DA according to the output voltage of the echo gain table through coordinated timing. 5. a kind of hand-held ground-penetrating radar system based on FPGA&SOC according to claim 2, is characterized in that, the uploading of radar data has passed through FPGA (3) memory, ARM processor (2) memory, host PC memory respectively, It can be stored permanently in the memory card of the ARM processor (2) and the memory disk of the upper PC; in the transmission process of the FPGA (3), the "interval storage from the AD sampling module to the FPGA memory" is completed through the ping-pong operation to the "FPGA "burst upload from memory to ARM memory". 6. A kind of hand-held ground-penetrating radar system based on FPGA&SOC according to claim 1, characterized in that, the embedded linux operating system is used in the ARM processor (2) to complete radar data processing, feature extraction, color map Display and parameter control, and complete the radar interface design interaction function based on the Qt framework. 7. A kind of hand-held ground-penetrating radar system based on FPGA&SOC according to claim 1, characterized in that, the minimum time step accuracy of the system is 10ps, the transmit pulse repetition frequency is optional from 100KHz to 1MHz, and the sampling depth is optional from 128 to 4096 Optional, scan rate per second 16~2048 optional, analog-to-digital conversion 16 bits, pre-gain 0db~100db optional, manual or automatic adjustment of radar echo gain curve, display mode: waveform, color, gray scale optional, acquisition Trigger mode: marking, measuring wheel, and duration are optional. 8. A hand-held ground-penetrating radar system based on FPGA&SOC according to claim 1, characterized in that, the SOC integrated chip (1) also includes a sampling storage unit (7), and the sampling storage unit (7) passes The IO interface is connected with the FPGA (3).