CN105531938A - A turbo decoder for decoding an input signal - Google Patents
A turbo decoder for decoding an input signal Download PDFInfo
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- CN105531938A CN105531938A CN201380079480.9A CN201380079480A CN105531938A CN 105531938 A CN105531938 A CN 105531938A CN 201380079480 A CN201380079480 A CN 201380079480A CN 105531938 A CN105531938 A CN 105531938A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/258—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with turbo codes, e.g. Turbo Trellis Coded Modulation [TTCM]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/296—Particular turbo code structure
- H03M13/2972—Serial concatenation using convolutional component codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/2978—Particular arrangement of the component decoders
- H03M13/2981—Particular arrangement of the component decoders using as many component decoders as component codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/6331—Error control coding in combination with equalisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03171—Arrangements involving maximum a posteriori probability [MAP] detection
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03178—Arrangements involving sequence estimation techniques
- H04L25/03248—Arrangements for operating in conjunction with other apparatus
- H04L25/03286—Arrangements for operating in conjunction with other apparatus with channel-decoding circuitry
Abstract
The invention relates to a turbo decoder (300) for decoding an input signal, the turbo decoder comprises a first decoder (301 ), a second decoder (303), a first limiter (305) arranged between the first decoder (301 ) and the second decoder (303), and a second limiter (307) arranged between the second decoder (303) and the first decoder (301 ).
Description
Technical field
The present invention relates to turbo decoding field.
Background technology
Long-haul optical fiber communication system can be used for realizing remote high data throughput, and need not regenerated signal in the optical domain.
In fiber optic communication systems, palarization multiplexing, quadrature amplitude modulation and relevant detection are expected to the very promising combination becoming Large Copacity optical transmission system of future generation, because its permission carries out information coding under the various available degree of freedom.
In fiber optic communication systems, the code requirement of output error rate (biterrorrate, BER) is usually comparatively harsh.In some applications, require that BER value is lower than 10
-15.This may become a major challenge when designing error correction coding and error correction decoder.Efficient error correction decoder possibility performance is lower, and high-performance decoders possibility error floor is higher and/or error code correction scarce capacity.
The turbo decoder of soft-decision decoding is used to provide the very promising decoding scheme of one, the existing discussion in " the soft-decision LDPCTurbo of DQPSK modulation the decode in for coherent optical heterodyne communicatio " of to be delivered by F.Yu, N.Stojanovic, F.N.Hauske, D.Chang, Z.Xiao, G.Bauch, D.Pflueger, C.Xie, Y.Zhao, L.Jin, Y.Li, L.Li, X.Xu and Q.Xiong during ECOC2011 for 2011 of this soft-decision decoding.
Although turbo decoder has good decoding performance, the needs improving error-correcting performance further still may be there are.
Summary of the invention
The object of the present invention is to provide a kind of efficient turbo decoder promoting error-correcting performance.
This object is realized by the feature of independent claims.Concrete form of implementation can be made to be easier to understand in conjunction with dependent claims, specification and accompanying drawing.
The present invention is based on following discovery: the information that the decoder of restriction turbo decoder exchanges can improve error-correcting performance.
For describing the present invention in detail, following term, abbreviation and symbol can be used:
MAP:MaximumAPosterioriProbability maximum a posteriori probability
LDPL:LowDensityParityCheck low-density checksum
FEC:ForwardErrorCorrection forward error correction
LLR:Log-LikelihoodRatio log-likelihood ratio
APP:APosterioriProbability posterior probability
BCJR:Bahl-Cocke-Jelinek-RavivBahl-Cocke-Jelinek-Raviv algorithm
SOVA:SoftOutputViterbiAlgorithm soft output Viterbi algorithm
ADC:Analogue/DigitalConverter A/D converter
AGC:AutomaticGainControl automatic growth control
FIR:FiniteImpulseResponse finite impulse response (FIR)
CD:ChromaticDispersion chromatic dispersion
VCO:VoltageControlledOscillator voltage controlled oscillator
QPSK:QuaternaryPhaseShiftKeying Quadrature Phase Shift Keying
DP-QPSK:DualPolarizationQuaternaryPhaseShiftKeying dual polarization Quadrature Phase Shift Keying
FFT:FastFourierTransform fast Fourier transform
IFFT:InverseFastFourierTransform inverse fast fourier transform
DSP:DigitalSignalProcessing Digital Signal Processing
OFE:OpticalFrontEnd light front end
The BER:BitErrorRate error rate
DE:DifferentialEncoder differential encoder
DD:DifferentialDecoder differential decoder
MOD:Modulator modulator
NCG:NetCodingGain net coding gain
CPE:ContinuousPhaseEncoder continuous phase encoder
CPR:CompactPositionReport compacted location is reported
SDE:StandardDeviationEstimation standard deviation is estimated
TD:TimeDomain time domain
FD:FrequencyDomain frequency domain
According to first aspect, the present invention relates to a kind of turbo decoder of decode input signals, comprise the first decoder, the second decoder, be arranged on the first limiter between described first decoder and described second decoder, and be arranged on the second limiter between described second decoder and described first decoder.Therefore, efficient turbo decoder can be realized.
Described turbo decoder can be used for decoding and uses the input signal of forward error correction (forwarderrorcorrection, FEC) code coding.
Described input signal can be sampling and quantizes signal of communication.Described input signal can derive from optical fiber communication signal.
Described first decoder can be used for for described sampling and each bit or the symbol that quantize signal of communication, with the form output information of log-likelihood ratio (log-likelihoodratio, LLR).Described first decoder also can be used for the information that output represents posterior probability (aposterioriprobability, APP) in log-domain.
Described second decoder can be used for, from the output information of described first decoder, generating the external information for described first decoder.Described second decoder also can be used for exporting the information representing APP in log-domain.
Described first limiter can be used for the described APP value that described first decoder of restriction is determined.
Described second limiter can be used for the described external information that described second decoder of restriction is determined.
According to first aspect, in the implementation that the first is possible, described first decoder is maximum a posteriori probability (maximumaposterioriprobability, MAP) decoder.Therefore, high-efficiency decoding device can be used.
Described MAP decoder can based on maximum a-posteriori estimation.BCJR scheme, maximum-star scheme can be used in described MAP decoder, or SOVA scheme.
According to the first implementation of first aspect or first aspect, in the implementation that the second of first aspect is possible, described second decoder is LDPC decoder.Therefore, efficient error correction scheme can be used.
Described LDPC decoder can be used for decoding and uses the signal of low-density checksum (LDPC) code coding.
According to first or the second implementation of first aspect or first aspect, in the implementation that the third is possible, described turbo decoder also comprises the summing unit be arranged between described second limiter and described first decoder, and described summing unit is for adding up to the output information of described second limiter.Therefore, the signal of the external information comprised for described first decoder can be provided.
Described summing unit can be used for the output information signal by adding up to described second limiter, provides the signal of the external information comprised for described first decoder.
According to the third implementation of first aspect, in the 4th kind of possible implementation, described turbo decoder also comprises adder, for the output signal of described first limiter and described summing unit being added.Therefore, the signal of decoding judgement can be provided.
Described decoding judgement can be hard decision.
According to the 4th kind of implementation of first aspect, in the 5th kind of possible implementation, described turbo decoder also comprises decision device, for carrying out hard decision based on described sum signal.Therefore, decoded signal can be provided.
According to first aspect or the arbitrary aforesaid implementation of first aspect, in the 6th kind of possible implementation, described turbo decoder also comprises the substracting unit be arranged between described first decoder and described first limiter, and described substracting unit is used for the restricted information deducting described second decoder from the output of described first decoder.Therefore, can be described second decoder and input signal is provided.
According to first aspect or the arbitrary aforesaid implementation of first aspect, in the 7th kind of possible implementation, described second limiter is used for exporting to the second decoder transfers.Therefore, can be described second decoder and feedback loop is provided.
According to first aspect or the arbitrary aforesaid implementation of first aspect, in the 8th kind of possible implementation, described turbo decoder also comprises offset estimator, described standard deviation for determining the standard deviation of described input signal, and is supplied to described first decoder to carry out MAP decoding by described offset estimator.Therefore, can be the standard deviation that described first decoder provides described input signal.
According to the 8th kind of implementation of first aspect, in the 9th kind of possible implementation, described turbo decoder also comprises multiplier, be arranged between described second decoder and described second limiter, described multiplier is used for the output of described second decoder and the output multiplication of described offset estimator.Therefore, the signal comprising weighting external information can be provided.
According to the 8th or the 9th kind of implementation of first aspect, in the tenth kind of possible implementation, described turbo decoder also comprises determiner, for based on the output of described offset estimator and the first predefined parameter, for the first limiting parameter determined by described first limiter, and based on described first limiting parameter and the second predefined parameter, for the second limiting parameter determined by described second limiter.Therefore, can be provided for configuring the first limiting parameter of described first limiter and the second limiting parameter for configuring described second limiter.
Described first limiting parameter is provided by following equation:
Wherein, L
frepresent described first limiting parameter, n represents described first predefined parameter, and s represents the standard deviation of the input signal that described offset estimator is determined.
Described first predefined parameter n can be one in following parameter: 1.4,2.3,2.5,4.2,12,17.1,21.
Described first limiter can be used for determining its absolute limit based on described first limiting parameter.
Described second limiting parameter is provided by following equation:
Wherein, L
srepresent described second limiting parameter, L
frepresent described first limiting parameter, and m represents described second predefined parameter.
Described second predefined parameter m can be one in following parameter: 0.04,0.6,0.91,1,2.1,2.4,13.
Described second limiter can be used for determining its absolute limit based on described second limiting parameter.
According to the tenth kind of implementation of first aspect, in the 11 kind of possible implementation, described determiner is arranged between described offset estimator and described first limiter, and described determiner is used for described first limiting parameter of described first limiter transmission.Therefore, can be described first limiter and described first limiting parameter is provided.
According to the tenth or the 11 kind of implementation of first aspect, in the 12 kind of possible implementation, described determiner is arranged between described offset estimator and described second limiter, and described determiner is used for described second limiting parameter of described second limiter transmission.Therefore, can be described second limiter and described second limiting parameter is provided.
According to second aspect, the present invention relates to a kind of turbo coding/decoding method of input signal, described method comprises: use input signal described in the first decoders decode, generates the first decoded signal; From described first decoded signal, deduct restriction external information signal, subtract rear signal to obtain; Use described in the second decoders decode and subtract rear signal, generate the second decoded signal; With the second decoded signal described in the standard deviation weighting of described input signal, to obtain weighted signal; Limit described weighted signal or its process version, to obtain described restriction external information signal.Therefore, the high efficiency method of decode input signals in turbo decoder can be provided.
The more multiple features of the method is directed to the function of the described turbo decoder of the arbitrary aforementioned implementation of described first aspect or described first aspect.
Such as, the method can be performed by the described turbo decoder of the arbitrary aforementioned implementation according to described first aspect or described first aspect.
According to the third aspect, the present invention relates to a kind of computer program, when it performs on computers, for performing the method for described second aspect.Therefore, described method can be performed in automatically and repeatably mode.
This computer program is provided with the form of machine readable code.This computer program can comprise the series of orders of computer processor.The processor of described computer can be used for performing this computer program.
Described computer can comprise processor, memory, and/or input/output device.
The present invention can realize with hardware and/or software form.
Accompanying drawing explanation
The specific embodiment of the present invention will be described in conjunction with the following drawings, wherein:
Fig. 1 shows a kind of schematic diagram of basic DSP block of bipolar coherent optical heterodyne communicatio;
Fig. 2 shows a kind of schematic diagram of transmission system of differential coding;
Fig. 3 shows a kind of schematic diagram of turbo decoder of decode input signals.
Embodiment
Fig. 1 shows the schematic diagram of basic Digital Signal Processing (digitalsignalprocessing, the DSP) block of bipolar coherent optical heterodyne communicatio 100.
Described bipolar coherent optical heterodyne communicatio 100 comprises analog to digital converter (analoguetodigitalconverter, ADC) device 101, be arranged on skew and the Gain tuning in described ADC device 101 downstream, automatic growth control (automaticgaincontrol, AGC) device 103, be arranged on the chromatic dispersion (chromaticdispersion in described AGC device 103 downstream, CD) compensation arrangement 105, be arranged on the frequency recovery apparatus 107 in described CD compensation arrangement 105 downstream, be arranged on the finite impulse response (FIR) (finiteimpulseresponse in described frequency recovery apparatus 107 downstream, FIR) device 109, be connected to the timing estimating apparatus 111 of described CD compensation arrangement 105 and described FIR device 109, be arranged on the voltage controlled oscillator (voltagecontrolledoscillator between described timing estimating apparatus 111 and described ADC device 101, VCO) device 113, be arranged on the carrier resetting device 115 in described FIR device 109 downstream, and be arranged on the decoding device 117 in described carrier resetting device 115 downstream.
Described ADC device 101 can comprise multiple analog to digital converter, as each input signal one.
Described CD compensation arrangement 105 can comprise multiple CD compensator, as one, X pole, and one, Y pole.
Carry out skew and gain calibration in described AGC device 103 after, in described CD compensation arrangement 105, use two fast fourier transform (fastFouriertransformation, FFT) blocks to carry out equilibrium to the chromatic dispersion in the frequency domain of four signals.Frequency shift (FS) is eliminated in frequency recovery apparatus 107.Use the FIR filter be arranged in the butterfly structure of FIR device 109, in time domain (timedomain, TD), complete polarization tracking, PMD compensates and remaining CD compensates.Residual frequency offset and carrier phase recovery is completed in described carrier resetting device 115.Error bit/the symbol in described decoding device 117 is repaired in forward error correction (forwarderrorcorrection, FEC).
Described decoding device 117 (FEC block) can be used for using hard information and can being placed on line side.But in order to improve systematic function, described decoding device 117 (FEC block) also can realize and can use Soft Inform ation in ASIC.By this method, the overall performance about BER, power loss, size and/or DEMUX complexity can be improved.
Phase ambiguity may be use the challenging problem in the system of phase-modulation.In order to alleviate this problem, differential encoder can be used in emitter side.At receiver side, shown block can process Received signal strength, then differential decoding.
Fig. 2 shows a kind of schematic diagram of transmission system 200 of differential coding.
Described transmission system 200 comprises FEC code device 201, be arranged on the differential coding device in described FEC code device 201 downstream, differential encoder (differentialencoder, DE) 203, be arranged on the modulator (modulator in described DE device 203 downstream, MOD) device 205, be arranged on the transmission link 207 in described MOD device 205 downstream, be arranged on the OFE device 209 in described transmission link 207 downstream, be arranged on the DSP device 211 in described OFE device 209 downstream, be arranged on the differential decoding device in described DSP device 211 downstream, differential decoder (differentialdecoder, DD) 213, and be arranged on the fec decoder apparatus 215 in described DD device 213 downstream.
Described DE device 203 can comprise multiple differential encoder, e.g., and one, X pole, one, Y pole.
Described DD device 213 can comprise multiple differential decoder, e.g., and one, X pole, one, Y pole.
Described fec decoder device 215 can comprise multiple fec decoder device, e.g., and one, X pole, one, Y pole.
In photosystem, the differential coding device 203 shown in Fig. 2 and differential decoding device 213 can be used.Because two poles can be used in coherent light system, so two differential encoders can be used.In described FEC code device 201 and/or described fec decoder device 215, a FEC equipment can be used to cover two poles, or alternatively, use two FEC equipment to cover two poles, e.g., one, every pole.
In described modem devices 205, available 2 take advantage of 2 signal of telecommunication modulated laser signals.Carry out opto-electronic conversion in described smooth front end (opticalfront-end, OFE) device 209 after, can compensate for link damage in described DSP device 211.Because CPE & is CPR, (continuousphaseencoderandcompactpositionreport, continuous phase encoder and compacted location report) can introduce cycle slip, needs to use described differential decoding device 213 to be corrected.
Described differential decoding device 213 can be used for exporting soft or hard information.Because use soft FEC scheme to improve performance, described DD device 213 provides Soft Inform ation.The quality of Soft Inform ation may affect the BER after FEC.
Use turbo demodulation method can realize good performance, wherein soft FEC and differential decoder exchange external information.Described maximum a posteriori probability (maximumaposterioriprobability, MAP) block can being realized, as by using the grid of BCJR, maximum-star, SOVA or further algorithm, thinking that described fec decoder device produces Soft Inform ation.
By one group of low-density checksum (low-densityparitycheck, LDPC) code and quasi-periodic low-density checksum (quasicycliclow-densityparitycheck, QC-LDPC) code provide with the medium strong FEC scheme realizing complexity.This can the low encoder of implementation complexity.The shift register set can be used to realize described encoder and described decoder.Such coding can provide high net coding gain (netcodinggain, NCG) and low error floor.
Compared with the system not having differential coding, the simple soft demodulation after LDPC decoder can cause the loss of about 2.7dB.Use iterative demodulation and decoding, the income being greater than 2dB can be realized, e.g., in QPSK modulation format.Unconventional LDPC coding can realize better performance, but too increases the complexity of Code And Decode.
QC-LDPC code is provided by the kernel of the array of onesize rarefaction cycles matrix.For two positive integer c and t (c<=t), the parity matrix of QC-LDPC coding is that (k takes advantage of the c × t of k) circular matrix, and (c takes advantage of t) array for k × k on GF (2).Moved by suitable row, each circular matrix can be obtained from k × k unit matrix.Such coding is conventional, because row's weighting is identical and equals c, and all row's weightings all equal t.
The parity matrix of QC-LDPC code is provided by following equation:
The regular code of careful design can realize high NCG, appropriateness coding word length and can acceptance error flat bed.When not adopting differential encoder/decoder, conventional QC-LDPC code can show better.When adopting differential decoding, unusual code can show better, and can compensate the loss of more differential codings.On the other hand, unusual code is difficult to realize, and may show high error floor.When not adopting differential encoder, the performance of unusual code may be lower.
Therefore, specification when needing a half-way house realize employing or do not adopt this two kinds of scenes of differential coding.
Even if there is good FEC code design, the inappropriate information interaction between MAP and fec decoder device may cause error floor.In actual MAP decoder, log probability can be used in path metric calculates.Described MAP decoder can distribute the log-likelihood ratio of each bit or symbol to follow-up fec decoder device.In next decode iteration step, this information can used for described MAP decoder produces in the fec decoder device of external information.
Information from described MAP and described fec decoder device all can represent the posterior probability (aposterioriprobability, APP) in log-domain.Because constantly after iteration, described APP may increase fast in signal to noise ratio, because complexity reason should limit described APP.Usually, several bit can be used quantize and/or represent these values, if six (6) bit quantizations may be good selections.Therefore, sample circuit can be used as limiter, that is, when absolute APP value and quantize to decompose some that define and limit crossing, can limit described value.
The decoding scene that described APP value restriction can be depending on applied decoding algorithm and uses.In differential coding system, decoding may be very concrete.Described differential encoder may be the non-systemic encoder that code rate equals 1.The MAP decoding using grid and BCJR, maximum-star or SOVA scheme can be realized.Due to complexity, seldom use original BCJR scheme.
Only Received signal strength can be used in the first iterative step not from the prior information of described fec decoder device.Can suppose that noise is Gauss, simple log probability therefore can be used to complete forward direction or backcasting, e.g., by described grid.It may be the log-likelihood ratio (log-likelihoodratio, LLR) having arbitrary value that described MAP exports.Also this value can be limited.
When there is frequency shift (FS) and/or phase noise, foregoing problems may be more outstanding.Feed forward carrier phase estimation and recovery scheme can be applicable in coherent light system.Make mistakes than the easier of other in each cycle slip position.When employing inappropriate restriction, such position great majority can facilitate the generation of error floor.
LDPC can be used to encode.Each bit can be contributed in four (4) individual equatioies, makes external information can comprise four (4) parts.External information sum can be limited in 128, as quantized value.Described MAP output information can not be limited.Can be QPSK signal and use differential encoder.Laser phase noise and residual frequency offset can be increased, and feed forward carrier phase recovery can be used.Cycle slip at least one times can be there is in a code word.
In this example, after the tenth iterative step, remain 3 mistakes, and by increasing described number of iteration steps, may can not eliminate.Can in described mistake shown in the fritter of the LLR coordinate of I and Q signal component.Can find out, also can think that other point is suspicious.
Fig. 3 shows a kind of schematic diagram of turbo decoder 300 of decode input signals.
Described turbo decoder 300 can be used as the decoding device 117 in the bipolar coherent optical heterodyne communicatio 100 shown in Fig. 1, or is used as the fec decoder device 215 in the transmission system 200 shown in Fig. 2.
The turbo decoder 300 of described decode input signals comprises the first decoder 301, second decoder 303, be arranged on the first limiter 305 between described first decoder 301 and described second decoder 303, and is arranged on the second limiter 307 between described second decoder 303 and described first decoder 301.
Described turbo decoder 300 also comprises summing unit 309, adder 311, decision device 313, substracting unit 315, offset estimator 319, multiplier 321 and determiner 323.Described second limiter 307 can be used for transmitting output 317 to described second decoder 303.
Described turbo decoder 300 can be used for decoding and uses the input signal of forward error correction coding.
Described input signal can be sampling and quantizes signal of communication.Described input signal can derive from optical fiber communication signal.
Described first decoder 301 can be used for for described sampling and each bit or the symbol that quantize signal of communication, with the form output information of log-likelihood ratio.Described first decoder 301 also can be used for exporting the information of the posterior probability (aposterioriprobability, APP) represented in log-domain.
Described second decoder 303 can be used for, from the output information of described first decoder 301, generating the external information for described first decoder 301.Described second decoder 303 also can be used for exporting the information representing APP in log-domain.
Described first limiter 305 can be used for the APP value that described first decoder 301 of restriction is determined.
Described second limiter 307 can be used for the external information that described second decoder 303 of restriction is determined.
Described summing unit 309 can be used for the output information signal by amounting to described second limiter 307, provides the signal of the external information comprised for described first decoder 301.
Described adder 311 can be used for the output signal from described first limiter 305 and described summing unit 309 to be added.
Described decision device 313 can be used for carrying out hard decision based on described sum signal.
Described substracting unit 315 can be arranged between described first decoder 301 and described first limiter 305.Described substracting unit 315 can be used for the restricted information deducting described second decoder 303 from the output of described first decoder 301.
Described output 317 can be transmitted to described second decoder 303 from described second limiter 307.
Described offset estimator 319 can be used for determining the standard deviation of described input signal and described standard deviation is supplied to described first decoder 301 and carries out MAP decoding.
Described multiplier 321 can be arranged between described second decoder 303 and described second limiter 307.Described multiplier 321 can be used for the described output of the second decoder 303 and the output multiplication of described offset estimator 319.
Described determiner 323 can be used for output based on described offset estimator 319 and the first predefined parameter, for the first limiting parameter determined by described first limiter 305, and based on described first limiting parameter and the second predefined parameter, for the second limiting parameter determined by described second limiter 307.
Described first decoder 301 (MAP decoder) based on output signal and the external information from the second decoder 303 (LDPC decoder), can produce APP value.Deduct the external information of described second decoder 303 (LDPC decoder) from the output of described first decoder 301 (MAP decoder) after, described APP value can be limited by described first limiter 305 (limiter 2).Described second decoder 303 (LDPC decoder) can use described restricted information and the restriction external information that generates to generate new external information for described first decoder 301 (MAP decoder) above.
According to a kind of implementation, can limitation forwarding to the external information of described first decoder 301 (MAP decoder) and described Decision Block.Final decoding can use the restriction output of described first decoder 301 (MAP decoder) and the restriction external information of described second decoder 303 (LDPC decoder).
After the external information deducting described second decoder 303 (LDPC decoder), being applied to described first limiter 305 (limiter 2) that described first decoder 301 (MAP decoder) exports can operating limit value L2=n/s
2, the wherein standard deviation of the input signal of the first decoder 301 (MAP decoder) described in behalf.In QPSK situation, the real part of signal that receives or the standard deviation of imaginary part described in being enough to estimate.Described standard deviation can be estimated in described offset estimator 319 (standarddeviationestimationblock, standard deviation estimates block SDE).In order to improve the performance of iterative decoding, described standard deviation can be used in described first decoder 301 (MAP decoder).Described standard deviation also can the external information of the second decoder 303 (LDPC decoder) described in weighting.The weighting external information of described second decoder 303 (LDPC decoder) can be limited by described second limiter 307 (limiter 1).The limiting value of described second limiter 307 (limiter 1) can be L1=p/m=n/ (ms
2), wherein m<1.
Described limiter, as described in the first limiter 305 and/or as described in the second limiter 307, can be defined by its absolute extremes value.An available P defines the minimum row weighting of LDPC parity array.When P is greater than 1, described parameter m can be set to 1.Otherwise this parameter may be less than 1.
In one example, m=0.91 is set, and uses the coding of P=4.Described standard deviation is close to 0.5.Select the value of n=2.5, therefore, L1=11 and L2=10 is non-quantized value, wherein quantizes directly to carry out.For the QPSK after the 6th iterative step, do not observe mistake.It is clearly that decoded LLR constellation diagram is produced near described decision boundaries.Maximum absolute LLR value equals 4L1+L2=54.
In one implementation, the present invention relates to a kind of coherent optical heterodyne communicatio comprising soft error correction coding and the differential encoder that use enhancing Electric signal processing.
In one implementation, the present invention relates to a kind of differential coding system of error correction coding that uses to correct a mistake flat bed and put forward high performance scheme.
In one implementation, the present invention relates to a kind of differential coding system in use turbo demodulation and put forward high performance scheme.
In one implementation, the method for demodulator APP value when the present invention relates to any prior information of a kind of restriction not from other decoder.Described restriction can realize comparatively low-complexity alleviate or avoid error floor, especially in the face of can by when strengthening frequency shift (FS) and/or phase noise that carrier phase recovery scheme compensates.
In one implementation, according to the limiter used in differential decoding step, restriction error correction decoding external information.
In one implementation, define limiter parameter between relation to provide estimated performance.
In one implementation, the present invention relates to a kind ofly provides the method for optimal parameter for actual turbo demodulating system, comprises the weighting of limiter value and external information.
In one implementation, the present invention relates in a kind of system using turbo demodulation suppress because constantly increasing, uncontrolled APP and the method for error floor that causes.
In one implementation, the present invention relates to and a kind ofly in differential coding system, improve performance and reduce the method for complexity.
In one implementation, suppress the impact of the weak log-likelihood information of MAP, the decoding after LDPC decoder can be improved.
Claims (15)
1. the turbo decoder (300) of a decode input signals, is characterized in that, comprising:
First decoder (301);
Second decoder (303);
First limiter (305), is arranged between described first decoder (301) and described second decoder (303);
Second limiter (307), is arranged between described second decoder (303) and described first decoder (301).
2. turbo decoder (300) according to claim 1, is characterized in that, described first decoder (301) is MAP decoder.
3. turbo decoder (300) according to claim 1 and 2, is characterized in that, described second decoder (303) is LDPC decoder.
4. the turbo decoder (300) according to aforementioned any one of claim, it is characterized in that, also comprise the summing unit (309) be arranged between described second limiter (307) and described first decoder (301), described summing unit (309) is for adding up to the output information of described second limiter (307).
5. turbo decoder (300) according to claim 4, it is characterized in that, also comprise adder (311), for the output signal of described first limiter (305) and described summing unit (309) being added.
6. turbo decoder (300) according to claim 5, is characterized in that, also comprises decision device (313), for carrying out hard decision based on described sum signal.
7. the turbo decoder (300) according to aforementioned any one of claim, it is characterized in that, also comprise the substracting unit (315) be arranged between described first decoder (301) and described first limiter (305), described substracting unit (315) is for deducting the restricted information of described second decoder (303) in the output from described first decoder (301).
8. the turbo decoder (300) according to aforementioned any one of claim, is characterized in that, described second limiter (307) is for exporting (317) to described second decoder (303) transmission.
9. the turbo decoder (300) according to aforementioned any one of claim, it is characterized in that, also comprise offset estimator (319), described standard deviation for determining the standard deviation of described input signal, and is supplied to described first decoder (301) to carry out MAP decoding by described offset estimator (319).
10. turbo decoder (300) according to claim 9, it is characterized in that, also comprise multiplier (321), be arranged between described second decoder (303) and described second limiter (307), described multiplier (321) is for by the output of described second decoder (303) and the output multiplication of described offset estimator (319).
11. turbo decoders (300) according to claim 9 or 10, it is characterized in that, also comprise determiner (323), for based on the output of described offset estimator (319) and the first predefined parameter, for described first limiter (305) determines the first limiting parameter, and according to described first limiting parameter and the second predefined parameter, for described second limiter (307) determines the second limiting parameter.
12. turbo decoders (300) according to claim 11, it is characterized in that, described determiner (323) is arranged between described offset estimator (319) and described first limiter (305), and described determiner (323) is for transmitting described first limiting parameter to described first limiter (305).
13. turbo decoders (300) according to claim 11 or 12, it is characterized in that, described determiner (323) is arranged between described offset estimator (319) and described second limiter (307), and described determiner (323) is for transmitting described second limiting parameter to described second limiter (307).
The turbo coding/decoding method of 14. 1 kinds of input signals, is characterized in that, described method comprises:
Use input signal described in the first decoders decode, generate the first decoded signal;
From described first decoded signal, deduct restriction external information signal, subtract rear signal to obtain;
Use described in the second decoders decode and subtract rear signal, generate the second decoded signal;
With the second decoded signal described in the standard deviation weighting of described input signal, to obtain weighted signal;
Limit described weighted signal or its process version, to obtain restriction external information signal.
15. 1 kinds of computer programs, is characterized in that, when it performs on computers, for performing method according to claim 14.
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| PCT/EP2013/068684 WO2015036008A1 (en) | 2013-09-10 | 2013-09-10 | A turbo decoder for decoding an input signal |
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| CN113364471A (en) * | 2020-03-05 | 2021-09-07 | 华为技术有限公司 | Decoding system, decoding controller and decoding control method |
| CN113839709A (en) * | 2020-06-24 | 2021-12-24 | 华为技术有限公司 | Method and device for calibrating error floor |
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| KR101442837B1 (en) * | 2008-02-23 | 2014-09-23 | 삼성전자주식회사 | Apparatus and method for turbo decoding |
| CN101610087A (en) * | 2009-06-19 | 2009-12-23 | 华为技术有限公司 | A kind of quantization method of input signal and decoder |
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| CN1291381A (en) * | 1998-12-31 | 2001-04-11 | 三星电子株式会社 | Decoder having a gain controller in a mobile communication system |
| CN1335731A (en) * | 2000-07-20 | 2002-02-13 | 华为技术有限公司 | Outer assigned information treating method of decoding cascade convolution code |
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| CN113839709A (en) * | 2020-06-24 | 2021-12-24 | 华为技术有限公司 | Method and device for calibrating error floor |
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