CN105530009A - Digital-controlled oscillator capable of realizing 100Hz frequency precision - Google Patents
Digital-controlled oscillator capable of realizing 100Hz frequency precision Download PDFInfo
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- CN105530009A CN105530009A CN201510404288.3A CN201510404288A CN105530009A CN 105530009 A CN105530009 A CN 105530009A CN 201510404288 A CN201510404288 A CN 201510404288A CN 105530009 A CN105530009 A CN 105530009A
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- transistor
- controlled oscillator
- digital
- circuit
- resistance
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- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Abstract
The invention relates to a digital-controlled oscillator circuit structure capable of realizing 100Hz frequency quantization precision without being affected by magnitude of unit capacitance; particularly, the digital-controlled oscillator is applied to a full-digital phase-locked loop of a broadband wireless communication transceiver, and belongs to the design field of a radio frequency integrated circuit. The digital-controlled oscillator circuit adopts a capacitor degeneration structure; a capacitor array used for adjusting the oscillator frequency in the conventional LC oscillator is modified into a negative resistance MOS transistor source placed in the oscillator so as to form the capacitor degeneration structure. Tiny unit capacitance required in the digital-controlled oscillator having quite high frequency quantization precision can be avoided; if the tiny unit capacitance cannot be avoided, mismatch and sensitive parasitic comparison of the capacitor are caused, and the precision and the phase noise of the oscillator are influenced easily; the digital-controlled oscillator circuit structure well solves the above problems; and in addition, the frequency quantization precision is improved, and meanwhile, the digital-controlled oscillator is not influenced by the magnitude of the unit capacitance, the mismatch and parasitic.
Description
Technical field
The present invention relates to and realize 100Hz frequency quantization precision and not by the digital controlled oscillator circuit structure of the impact of specific capacitance size, be especially applied in the all-digital phase-locked loop of broadband wireless communications transceiver, belong to field of radio frequency circuit design.
Background technology
Along with the development of digital circuit technique, the various aspects such as all-digital phase-locked loop is synchronous at modulation /demodulation, frequency synthesis, FM stereo decoding, colour subcarrier, image processing are widely used.Digital phase-locked loop not only absorbs the advantages such as digital circuit reliability is high, volume is little, price is low, also solve the direct current null offset of analog phase-locked look, device is saturated and be subject to the shortcoming such as power supply and variation of ambient temperature, there is processing capability in real time to discrete sample value in addition, become the direction of Phase Lock Technique development.As shown in the figure, its structure comprises phase discriminator to the structured flowchart of numerical control phase-locked loop, time m-digital quantizer, digital filter, digital controlled oscillator (DCO) and frequency divider.High-precision digital controlled oscillator is then the main modular in all-digital phase-locked loop circuit, and its frequency accuracy directly affects the outer phase noise performance of band of phase-locked loop and the locking precision of phase-locked loop.
Summary of the invention
Circuit structure disclosed by the invention mainly can realize the circuit structure of the digital controlled oscillator (DCO) of 100Hz frequency quantization precision, is different from the technology that traditional LC pierce circuit adopts a kind of electric capacity degeneration.This technology can avoid capacitance mismatch and parasitic capacitance on the impact of performance while realizing high frequency accuracy.
In order to solve above technical requirement, circuit structure Fig. 1 that the present invention proposes comprises: dotted line frame negative resistance circuit 1. adds electric capacity degeneration circuit, for realizing the high accuracy frequency step adjustment of digital controlled oscillator; Dotted line frame negative resistance circuit 2., dotted line frame LCtank 3..
Wherein 1. negative resistance circuit adds electric capacity degeneration circuit and comprises: transistor M
1grid be connected to transistor M
2drain electrode, transistor M
1drain electrode be connected to transistor M
2grid composition negative resistance circuit.Transistor M
1source electrode be connected to resistance R
1, resistance R
1be connected to ground.Transistor M
2source electrode be connected to resistance R
2, resistance R
2be connected to ground.The accurate adjustment capacitor array of 12bit is connected to transistor M
1and M
2source electrode be used for realizing the minimum frequency quantified precision of 100Hz.2. transistor M
3grid be connected to transistor M
4drain electrode, transistor M
3drain electrode be connected to transistor M
4grid, transistor M
3and M
4source electrode be all connected to current source I
2composition negative resistance circuit.3. LCtank is by the coarse adjustment capacitor array of 8bit and differential inductance L
tankcomposition, current source I
1be connected to differential inductance L
tankcentre tap for setting the total current of whole digital controlled oscillator.Transistor M
1and M
3drain electrode be jointly connected to one end of LCtank, transistor M
2and M
4drain electrode be jointly connected to the other end of LCtank, jointly realize the negative resistance of LC oscillator and the high accuracy adjustment of frequency.
Based on the structure that this circuit realizes, its advantage is:
(1) 100Hz frequency quantization precision can be realized and not by the impact of specific capacitance size;
(2) mismatch of electric capacity and parasitic capacitance can be eliminated on the impact of performance;
Accompanying drawing explanation
Fig. 1 be the present invention propose can realize 100Hz frequency quantization precision and not by the digital controlled oscillator circuit structure of impact of specific capacitance size.
Embodiment
The embodiment of Fig. 1 graphic extension circuit is as follows: transistor M
1grid be connected to transistor M
2drain electrode, transistor M
1drain electrode be connected to transistor M
2grid composition negative resistance circuit.Transistor M
1source electrode be connected to resistance R
1, resistance R
1be connected to ground.Transistor M
2source electrode be connected to resistance R
2, resistance R
2be connected to ground.The accurate adjustment capacitor array of 12bit is connected to transistor M
1and M
2source electrode be used for realizing the minimum frequency quantified precision of 100Hz.Transistor M
3grid be connected to transistor M
4drain electrode, transistor M
3drain electrode be connected to transistor M
4grid, transistor M
3and M
4source electrode be all connected to current source I
2composition negative resistance circuit.LCtank is by the coarse adjustment capacitor array of 8bit and differential inductance L
tankcomposition, current source I
1be connected to differential inductance L
tankcentre tap for setting the total current of whole digital controlled oscillator.Transistor M
1and M
3drain electrode be jointly connected to one end of LCtank, transistor M
2and M
4drain electrode be jointly connected to the other end of LCtank, jointly realize the negative resistance of LC oscillator and the high accuracy adjustment of frequency.
The above optimized circuit of the present invention implements structure, and all equalizations done according to the application's the scope of the claims change and modify, and all should belong to covering scope of the present invention.
Claims (5)
1. can realize 100Hz frequency quantization precision and not by a digital controlled oscillator circuit for the impact of specific capacitance size, adopt CMOS technology to realize.
2. the circuit structure feature of this digital controlled oscillator comprises: transistor M
1grid be connected to transistor M
2drain electrode, transistor M
1drain electrode be connected to transistor M
2grid composition negative resistance circuit.Transistor M
1source electrode be connected to resistance R
1, resistance R
1be connected to ground.Transistor M
2source electrode be connected to resistance R
2, resistance R
2be connected to ground.The accurate adjustment capacitor array of 12bit is connected to transistor M
1and M
2source electrode be used for realizing the minimum frequency quantified precision of 100Hz.Herein for this patent focuses on the novel part of proposition.
3. transistor M
3grid be connected to transistor M
4drain electrode, transistor M
3drain electrode be connected to the grid of transistor M4, transistor M
3and M
4source electrode be all connected to current source I
2composition negative resistance circuit.
4.LCtank is by the coarse adjustment capacitor array of 8bit and differential inductance L
tankcomposition, current source I
1be connected to differential inductance L
tankcentre tap for setting the total current of whole digital controlled oscillator.
5. as claim 1, be that the circuit of this patent implements structure described in 2,3 and 4, all equalizations according to doing in the application's the scope of the claims change and modify, and all should belong to the claim covering scope of this patent.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510404288.3A CN105530009A (en) | 2015-07-10 | 2015-07-10 | Digital-controlled oscillator capable of realizing 100Hz frequency precision |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510404288.3A CN105530009A (en) | 2015-07-10 | 2015-07-10 | Digital-controlled oscillator capable of realizing 100Hz frequency precision |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105530009A true CN105530009A (en) | 2016-04-27 |
Family
ID=55772042
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510404288.3A Pending CN105530009A (en) | 2015-07-10 | 2015-07-10 | Digital-controlled oscillator capable of realizing 100Hz frequency precision |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105530009A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090212876A1 (en) * | 2008-02-25 | 2009-08-27 | Kabushiki Kaisha Toshiba | Oscillator controlling apparatus |
| US8299862B1 (en) * | 2009-12-02 | 2012-10-30 | Marvell International Ltd. | Tuning circuit for inductor capacitor (LC) tank digitally controlled oscillator |
| KR20130124064A (en) * | 2012-05-04 | 2013-11-13 | 한국과학기술원 | High resolution digitally-controlled oscillator for reducing quantization noise |
| CN104143977A (en) * | 2014-08-25 | 2014-11-12 | 清华大学 | Voltage-controlled oscillator |
-
2015
- 2015-07-10 CN CN201510404288.3A patent/CN105530009A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090212876A1 (en) * | 2008-02-25 | 2009-08-27 | Kabushiki Kaisha Toshiba | Oscillator controlling apparatus |
| US8299862B1 (en) * | 2009-12-02 | 2012-10-30 | Marvell International Ltd. | Tuning circuit for inductor capacitor (LC) tank digitally controlled oscillator |
| KR20130124064A (en) * | 2012-05-04 | 2013-11-13 | 한국과학기술원 | High resolution digitally-controlled oscillator for reducing quantization noise |
| CN104143977A (en) * | 2014-08-25 | 2014-11-12 | 清华大学 | Voltage-controlled oscillator |
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| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20160427 |
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| WD01 | Invention patent application deemed withdrawn after publication |