CN105515483A - Torque ripple inhibition circuit of brushless direct current motor and device - Google Patents

Torque ripple inhibition circuit of brushless direct current motor and device Download PDF

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Publication number
CN105515483A
CN105515483A CN201410542828.XA CN201410542828A CN105515483A CN 105515483 A CN105515483 A CN 105515483A CN 201410542828 A CN201410542828 A CN 201410542828A CN 105515483 A CN105515483 A CN 105515483A
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resistance
output
signal
circuit
input
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刘琳
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Beijing Aeonmed Co Ltd
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Beijing Aeonmed Co Ltd
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Abstract

The invention discloses a torque ripple inhibition circuit of a brushless direct current motor. The inhibition circuit comprises a main control CPU, a digital-to-analog converter, a first operation amplifier signal conditioning circuit, a second operation amplifier signal conditioning circuit and a control module. The first operation amplifier signal conditioning circuit is used for generating sawtooth waves according to a first analog voltage signal. The second operation amplifier signal conditioning circuit comprises an integration loop circuit and a comparator. The integration loop circuit is used for generating continuous variable voltage according to a second analog voltage signal. The comparator is used for comparing the sawtooth waves and the continuous variable voltage and generating PWM waves whose duty ratios are adjustable from 1-100%. In this way, by achieving continuous change of the duty ratios of the PWM waves, torque ripples of the brushless direct current motor are reduced and output air flows are allowed to be stable.

Description

A kind of brshless DC motor torque ripple minimization circuit and a kind of instrument
Technical field
The present invention relates to field of electromechanical integration, particularly relate to a kind of brshless DC motor torque ripple minimization circuit and a kind of instrument.
Background technology
Brshless DC motor is a kind of typical electromechanical integrated product, and it is by motor body, position detector, the self-synchronous motor system of inverter and controller composition or autocontrol transducer-fed synchronous motor.Along with developing rapidly of power electronic technology and high performance permanent magnetic materials, its application develops rapidly from initial war industry to fields such as Aero-Space, information, household electrical appliances, medical treatment.Be the turbine feed gas of body with brshless DC motor in medical industry use, not only significantly can reduce the volume of source of the gas, save the energy, reduce costs, can also control accurately and reliably turbine, thus obtain stable air-flow and pressure.
Brshless DC motor realizes rotating speed, current double closed-loop control based on pwm control signal.Fig. 1 is the schematic diagram of brshless DC motor rotating speed, current double-closed loop controller, and as shown in Figure 1, system realizes the digital double-closed-loop control of electric current loop and speed ring by the cooperation of soft and hardware.Speed feedback ring is outer shroud, and its effect is the steady speed precision of guarantee system.Current Negative Three-Point Capacitance ring is inner ring, and its effect is that the torque realizing motor controls, and can realize again current limliting simultaneously and improve the dynamic property of system.Electric current loop adoption rate control algolithm carries out the closed-loop adjustment of phase current, to improve the responding ability of system; Speed ring adopts conventional PI algorithm to carry out closed-loop control to motor speed.Given rotating speed and velocity feedback quantity form deviation, and generation current reference quantity after speed regulates, the deviation of current reference amount and current feedback amount forms the controlled quentity controlled variable of PWM duty ratio after Current adjustment, realizes the speeds control of motor.The feedback of electric current is realized by the pressure drop detected on resistance R; Velocity feedback is then the position quantity exported by position detecting circuit, through what calculate.The outgoing position amount of position detecting circuit is also for ensureing the correct commutation of motor.
In the prior art, the stator winding current waveform of brshless DC motor is trapezoidal wave, and what can be similar to thinks square wave, and rotor often turns over certain electrical degree, and electric current with regard to commutation once.In this process, along with the change of rotor-position, must there is torque ripple in the interaction of stator current and rotor field, and this torque ripple is very complicated.In commutation process, duty ratio due to the PWM ripple in three phase full bridge drive circuit is the modulation of step evolution, make operationally the formed rotating magnetic field of electric current be great-jump-forward, consequent motor torque fluctuation is comparatively large, can cause certain vibration noise like this.Torque ripple directly causes the flow velocity of motor output gas flow not steady, causes gas circuit regulating time long.Therefore the winding current exchanging the phase moment controls, and the amplitude making it to change reduces, and just can reach the object reducing torque ripple, the change in flow of the output gas flow of brushless electric machine is reduced, and air feed is steady.
Summary of the invention
In view of this, the invention provides a kind of brshless DC motor torque ripple minimization circuit and a kind of instrument, for reducing torque ripple during current commutation, make the output gas flow of brshless DC motor steady.
On the one hand, the invention provides a kind of brshless DC motor torque ripple minimization circuit, comprise master cpu, digital to analog converter, the first amplifier signal conditioning circuit, the second amplifier signal conditioning circuit and control module:
First output of described master cpu is connected with the input of described digital to analog converter, and described master cpu is used for generating digital control number to described digital to analog converter input speed electric digital controlled signal and sawtooth waveforms;
Described digital to analog converter is used for that described sawtooth waveforms is generated digital controlled signal and is converted to the first analog voltage signal, and described speed electric digital controlled signal is converted to the second analog voltage signal;
The input of described first amplifier signal conditioning circuit is connected with the first analog voltage output of described digital to analog converter, for generating sawtooth waveforms according to described first analog voltage signal;
Described secondary signal modulate circuit comprises integral element circuit and comparator, the input of described integral element circuit is connected with the second analog voltage output of described digital to analog converter, and described integral element circuit is used for the voltage generating continuous variable according to described second analog voltage signal;
The reverse input end of described comparator is connected with the output of described integral element circuit, the positive input of described comparator is connected with the output of described first amplifier signal conditioning circuit, and the voltage that described comparator is used for more described sawtooth waveforms and described continuous variable generates the adjustable PWM ripple of duty ratio;
The output of described comparator is connected with the input of described control module, and described control module is used for the drive circuit works that the PWM ripple adjustable according to described duty ratio controls described DC brushless motor.
Further, also comprise position transducer, and described control module is FPGA;
Second output of described master cpu is connected with the first input end of FPGA, and the second output of described master cpu is used for output logic control signal;
Described position transducer output is connected with second input of FPGA, and described transducer is for exporting hall signal;
The output of described comparator is connected with the 3rd input of FPGA, the PWM ripple signal that the duty ratio for exporting the generation of described comparator is adjustable;
The output of FPGA is connected with the input of drive circuit, and described FPGA is used for the PWM ripple signal adjustable according to described duty ratio and generates control signal, and controls described drive circuit works according to described control signal.
Further, the sawtooth waveforms that described first signal conditioning circuit generates is the sawtooth waveforms of band direct current biasing.
Further, described first signal conditioning circuit comprises the second operational amplifier, the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 3rd capacitor:
First termination signal ground of described first resistance, second end is connected with the first end of the 6th resistance with the reverse input end of the second operational amplifier respectively, and the second end of described 6th resistance is connected with the first end of the 5th resistance, the output of the second operational amplifier respectively; The first end of described second resistance is connected with the first analog voltage output of digital to analog converter, second end of described second resistance is connected with the first end of described 3rd resistance, the positive input of the second operational amplifier, the first end of the 4th resistance respectively, second end of described 3rd resistance is connected with reference voltage source, the second termination signal ground of described 4th resistance; Described 5th resistance second end exports with the sawtooth signal of direct current biasing and the second end of described 5th resistance is also connected with the first end of the 3rd capacitor, the second end connection signal ground of described 3rd capacitor.
Further, described integral element circuit comprises the first operational amplifier, the 7th resistance, the 8th resistance and the 4th electric capacity:
Second analog voltage output of described digital to analog converter is connected with the first end of the 4th electric capacity with the input in the same way of the first operational amplifier respectively by the 7th resistance, and the second end of described 4th electric capacity is connected with the output of the first operational amplifier; The reverse input end of described first operational amplifier is connected with the first end of the 8th resistance, the second termination signal ground of described 8th resistance.
Further, the reverse input end of the output voltage input comparator of described integral element circuit, the positive input of the sawtooth waveforms input comparator of described band direct current biasing, the output outputs level signals of described amplifier:
The sawtooth waveforms of described direct current biasing is higher than the output voltage of described integral element circuit, and the output of described comparator exports high level signal;
The sawtooth waveforms of described direct current biasing lower than the output voltage of described integral element circuit, the output output low level signal of described comparator.
Further, the positive supply of described comparator and the first operational amplifier connects positive 5V voltage, and negative supply connects signal ground.
Further, the PWM ripple that described duty ratio is adjustable is that 0-100% is adjustable.
On the other hand, a kind of instrument, comprises the torque ripple minimization circuit of the brshless DC motor described in above-mentioned any one, and described instrument is Anesthesia machine, lung ventilator, air-conditioning, washing machine, hard disk or optical disc apparatus.
Brshless DC motor torque ripple minimization circuit provided by the invention and a kind of instrument, the sawtooth waveforms of the voltage of the output continuous variable of integral element circuit and band direct current biasing is compared by comparator, produce the PWM ripple that duty ratio is adjustable, the PWM ripple that duty ratio is adjustable can regulate the current waveform amplitude of stator, and the current waveform of stator can regulate torque ripple.In the present invention, the duty ratio of PWM ripple can regulate within the scope of 0-100%, makes the amplitude of variation of the current waveform of stator steady.Due to the current induced magnetic field of change, so the electric current of stator is when commutation, and the rotating magnetic field formed is steady, makes two kinds, the magnetic field magnetic field interaction of rotating magnetic field and the rotor produced during the current commutation of stator and the torque ripple that produces reduces.The change in flow of brshless DC motor output gas flow reduces, and when using brshless DC motor as turbine feed gas, air feed is steady.
Accompanying drawing explanation
By reading the detailed description done non-limiting example done with reference to the following drawings, other features, objects and advantages of the present invention will become more obvious:
Fig. 1 is the schematic diagram of brshless DC motor rotating speed, current double-closed loop controller;
Fig. 2 is the structured flowchart that the embodiment of the present invention one provides a kind of torque ripple minimization circuit of brshless DC motor;
Fig. 3 is the circuit structure diagram that the embodiment of the present invention one provides a kind of digital to analog converter;
Fig. 4 is that the embodiment of the present invention one provides a kind of reference voltage source circuit structure chart;
Fig. 5 is the first signal conditioning circuit figure that the embodiment of the present invention one provides;
Fig. 6 is the secondary signal modulate circuit figure that the embodiment of the present invention one provides.
The technical characteristic that Reference numeral refers to is:
1, master cpu; 2, digital to analog converter (D/A); 3, the second amplifier signal conditioning circuit;
4, the first amplifier signal conditioning circuit; 5, field programmable gate array (FPGA);
6, drive circuit; 7, brshless DC motor (BLCMD) 8, integral element circuit;
9, position transducer.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.Be understandable that, specific embodiment described herein is only for explaining the present invention, but not limitation of the invention.It also should be noted that, for convenience of description, illustrate only part related to the present invention in accompanying drawing but not full content.
Specific embodiment one
Fig. 2 provides a kind of structured flowchart of torque ripple minimization circuit of brshless DC motor for the embodiment of the present invention one.As shown in Figure 2, the torque ripple minimization circuit of brshless DC motor comprises master cpu 1, digital to analog converter 2, first amplifier signal conditioning circuit 4, second amplifier signal conditioning circuit 3, control module: the first output of master cpu 1 is connected with the input of digital to analog converter 2, master cpu 1 is for generating digital control number to digital to analog converter input speed electric digital controlled signal and sawtooth waveforms; Digital to analog converter 2 is converted to the first analog voltage signal for sawtooth waveforms being generated digital controlled signal, and speed electric digital controlled signal is converted to the second analog voltage signal; The input of the first amplifier signal conditioning circuit 4 is connected with the first analog voltage output of digital to analog converter 2, for generating sawtooth waveforms according to the first analog voltage signal; Secondary signal modulate circuit 3 comprises integral element circuit 8 and comparator U4A (with reference to figure 6), the input of integral element circuit 8 is connected with the second analog voltage output of digital to analog converter 2, and integral element circuit 8 is for generating the voltage of continuous variable according to the second analog voltage signal; The reverse input end of comparator U4A is connected with the output of integral element circuit 8, the positive input of comparator U4A is connected with the output of the first amplifier signal conditioning circuit 4, and comparator U4A generates the adjustable PWM ripple of duty ratio for the voltage comparing sawtooth waveforms and continuous variable; The output of comparator U4A is connected with the input of control module, and control module is used for the drive circuit works that the PWM ripple adjustable according to duty ratio controls DC brushless motor 7, and control module is preferred, is FPGA5.
The suppression circuit of brshless DC motor torque ripple also comprises position transducer 9, drive circuit 6: the second output of master cpu 1 is connected with the first input end of FPGA5, and the second output of master cpu 1 is used for output logic control signal; The output of position transducer 9 is connected with second input of FPGA5, and position transducer 9 is for exporting hall signal; The output of comparator U4A is connected with the 3rd input of FPGA5, the PWM ripple signal that the duty ratio for output comparator U4A generation is adjustable; The output of FPGA5 is connected with the input of drive circuit 6, and FPGA5 is used for the PWM ripple signal adjustable according to duty ratio and generates control signal, and works according to control signal control drive circuit 6; The output of drive circuit 6 is connected with the input of brshless DC motor 7, and drive circuit 6 is for controlling brshless DC motor 7.
Concrete, the logic control three of the PWM ripple that duty ratio is adjustable, the hall signal of position transducer 9 and master cpu 1 inputs field programmable gate array 5 (FieldProgrammableGateArray jointly, be abbreviated as FPGA) programming, produce control signal required for drive circuit 6, realize the control of drive circuit 6 pairs of brshless DC motors 7 (BLCMD).Drive circuit 6 in the present embodiment is three phase full bridge driving, the logic control three of the PWM ripple that duty ratio is adjustable, the hall signal of position transducer 9 and master cpu 1 inputs FPGA5 jointly, produce 6 MOSFET pipe control signals required for three phase full bridge driving, realize the control to BLDCM7.Those skilled in that art are appreciated that three-phase half-bridge driven also can realize the control to BLCMD7.
Fig. 3 provides a kind of circuit structure diagram of digital to analog converter for the embodiment of the present invention one.As shown in Figure 3, digital to analog converter 2 has Multiple Type, and the present invention is preferred, adopts DA5623, and digital to analog converter 2 is that SPI, SPI comprise the 4th, 6,7 and 8 ports with the interface of master cpu 1, and wherein, MOSI – main device data export, and input from device data; MISO – main device data input, and export from device data; SCLK – clock signal, is produced by main device, is fPCLK/2 to the maximum, be fCPU/2 to the maximum from mode frequency; NSS –, from device enable signal, is controlled by main device, and some IC can be labeled as CS (Chipselect); Adopt SPI interface, make signaling rate very fast.
Fig. 4 provides a kind of reference voltage source circuit structure chart for the embodiment of the present invention one.As shown in Figure 4, reference voltage source has Multiple Type, and the present invention is preferred, and adopt REF3225, the pin Vref of reference voltage source is connected, by reference voltage source for digital to analog converter 2 provides voltage with digital to analog converter 2 pin Vref.
The first signal conditioning circuit figure that Fig. 5 provides for the embodiment of the present invention one, as shown in Figure 5, the first signal conditioning circuit 4 comprises the second operational amplifier U3B, the first resistance R1, second resistance R2, the 3rd resistance R3, the 4th resistance R4,5th resistance R5, the 6th resistance R6, the 3rd capacitor C3:
The first termination signal ground of the first resistance R1, second end is connected with the first end of the 6th resistance R6 with the reverse input end of the second operational amplifier U3B respectively, and second end of the 6th resistance R6 is connected with the first end of the 5th resistance R5, the output of the second operational amplifier U3B respectively; The first end of the second resistance R2 is connected with the first analog voltage output end of digital to analog converter 2, second end of the second resistance R2 is connected with the first end of the 3rd resistance R3, the positive input of the second operational amplifier U3B, the first end of the 4th resistance R4 respectively, second end of the 3rd resistance R3 is connected with reference voltage source, the second termination signal ground of the 4th resistance R4; Second end of the 5th resistance R5 exports with the sawtooth signal of direct current biasing and second end of the 5th resistance R4 is also connected with the first end of the 3rd capacitor C3, the second end connection signal ground of the 3rd capacitor C3.
It should be noted that, in the present invention, second end of the 3rd resistance R3 is connected with reference voltage source, and the direct current biasing ripple that reference voltage source exports is stable and without clutter.In the prior art, adopt the mode of power supply dividing potential drop to provide direct current biasing, make the unstable easily fluctuation of direct current biasing ripple.
The secondary signal modulate circuit figure that Fig. 6 provides for the embodiment of the present invention one, as shown in Figure 6, secondary signal modulate circuit 3 comprises integral element circuit 8 and comparator U4A:
Integral element circuit 8 comprises the first operational amplifier U3A, the 7th resistance R7, the 8th resistance R8 and the 4th electric capacity C4.
Second analog voltage output of digital to analog converter 2 is connected with the first end of the 4th electric capacity C4 with the input in the same way of the first operational amplifier U3A respectively by the 7th resistance R7, and second end of the 4th electric capacity C4 is connected with the output of the first operational amplifier U3A; The reverse input end of the first operational amplifier U3A is connected with the first end of the 8th resistance R8, the second termination signal ground of the 8th resistance R8.
The reverse input end of the output voltage input comparator U4A of integral element circuit 8, the positive input of the sawtooth waveforms input comparator U4A with direct current biasing, the output outputs level signals of comparator U4A: the sawtooth waveforms of direct current biasing is higher than the output voltage of integral element circuit 8, and the output of comparator U4A exports high level signal; The sawtooth waveforms of direct current biasing lower than the output voltage of integral element circuit 8, the output output low level signal of comparator U4A.
It should be noted that, the positive supply of the first operational amplifier U3A connects positive 5V voltage, and negative supply connects signal ground.The positive supply of comparator U4A connects positive 5V voltage, and negative supply connects signal ground.
Concrete, the voltage that integral element circuit 8 exports is continuous variable, and concrete principle is explained as follows:
The electric current that setting flows through the 7th resistance R7 is I 1, the electric current flowing through the 4th electric capacity C4 is I 2, then meet relational expression:
I 1=-I 2(1)
Because the voltage Vp=0 of the input in the same way of the first operational amplifier, so
I 1=(VoutB-Vp)/R 7=VoutB/R 7(2)
I 2=dQ/dt=C 4·d(Vout–Vp)/dt=C 4·dVout/dt(3)
By (2), (3) formula substitutes into (1) formula, can obtain:
VoutB=C 4·dVout/dt(4)
At time interval (t 1, t 2) upper integral obtains:
V out = - 1 R 7 C 4 ∫ t 1 t 2 V outB dt - - - ( 5 )
Integral constant τ c = 1 2 πR 7 C 4
Can find out that from formula (5) voltage that integral element circuit 8 exports is continuous variable, it produces by comparator U4A the PWM ripple that duty ratio can change within the scope of 1-100% with direct current biasing sawtooth waveforms more afterwards.This just makes the duty ratio of the PWM ripple in three phase full bridge drive circuit not be the modulation of step evolution, but carries out speed stabilizing adjustment according to PWM ripple rate of change given in master cpu.In general, an amplifier device has two passages usually, and in the present invention, a passage of amplifier device U4 constitutes comparator U4A.Another passage U4B is connected into null mode.Second operational amplifier U3B of the first signal conditioning circuit and the first operational amplifier U3A of integral element circuit 8 shares same amplifier device U3.
The present invention is by PWM wave producer in the prior art increases integral element circuit 8, make the duty ratio of PWM ripple can consecutive variations, realize the continuously adjustabe to current waveform change, current waveform amplitude of variation is reduced, the changes of magnetic field that curent change is produced is steady, the torque ripple that this magnetic field and epitrochanterian magnetic field are formed reduces, and the air-flow that brshless DC motor exports is steady.In the first signal conditioning circuit 4, adopt reference voltage source to provide direct current biasing, can ensure that the direct current biasing ripple exported is stablized.
Specific embodiment two
A kind of instrument, comprises the torque ripple minimization circuit of above-mentioned brshless DC motor.This instrument can be the rotating machinery such as drive unit, washing machine of Anesthesia machine, lung ventilator or air-conditioning, hard disk or CD.Utilize the instrument of brshless DC motor, generally all can occur torque ripple, reduce torque ripple, controlled device can be made to operate steadily.The mode adopting circuit provided by the invention to reduce torque ripple all drops in protection scope of the present invention.
Note, above are only preferred embodiment of the present invention and institute's application technology principle.Skilled person in the art will appreciate that and the invention is not restricted to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute and can not protection scope of the present invention be departed from.Therefore, although be described in further detail invention has been by above embodiment, the present invention is not limited only to above embodiment, when not departing from the present invention's design, can also comprise other Equivalent embodiments more, and scope of the present invention is determined by appended right.

Claims (9)

1. a brshless DC motor torque ripple minimization circuit, is characterized in that, comprises master cpu, digital to analog converter, the first amplifier signal conditioning circuit, the second amplifier signal conditioning circuit and control module:
First output of described master cpu is connected with the input of described digital to analog converter, and described master cpu is used for generating digital control number to described digital to analog converter input speed electric digital controlled signal and sawtooth waveforms;
Described digital to analog converter is used for that described sawtooth waveforms is generated digital controlled signal and is converted to the first analog voltage signal, and described speed electric digital controlled signal is converted to the second analog voltage signal;
The input of described first amplifier signal conditioning circuit is connected with the first analog voltage output of described digital to analog converter, for generating sawtooth waveforms according to described first analog voltage signal;
Described secondary signal modulate circuit comprises integral element circuit and comparator, the input of described integral element circuit is connected with the second analog voltage output of described digital to analog converter, and described integral element circuit is used for the voltage generating continuous variable according to described second analog voltage signal;
The reverse input end of described comparator is connected with the output of described integral element circuit, the positive input of described comparator is connected with the output of described first amplifier signal conditioning circuit, and the voltage that described comparator is used for more described sawtooth waveforms and described continuous variable generates the adjustable PWM ripple of duty ratio;
The output of described comparator is connected with the input of described control module, and described control module is used for the drive circuit works that the PWM ripple adjustable according to described duty ratio controls described DC brushless motor.
2. torque ripple minimization circuit according to claim 1, is characterized in that, also comprises position transducer, drive circuit, and described control module is FPGA;
Second output of described master cpu is connected with the first input end of FPGA, and the second output of described master cpu is used for output logic control signal;
Described position transducer output is connected with second input of FPGA, and described transducer is for exporting hall signal;
The output of described comparator is connected with the 3rd input of FPGA, the PWM ripple signal that the duty ratio for exporting the generation of described comparator is adjustable;
The output of FPGA is connected with the input of drive circuit, and described FPGA is used for the PWM ripple signal adjustable according to described duty ratio and generates control signal, and controls described drive circuit works according to described control signal.
3. torque ripple minimization circuit according to claim 1, is characterized in that, the sawtooth waveforms that described first signal conditioning circuit generates is the sawtooth waveforms of band direct current biasing.
4. torque ripple minimization circuit according to claim 3, is characterized in that, described first signal conditioning circuit comprises the second operational amplifier, the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 3rd capacitor:
First termination signal ground of described first resistance, second end is connected with the first end of the 6th resistance with the reverse input end of the second operational amplifier respectively, and the second end of described 6th resistance is connected with the first end of the 5th resistance, the output of the second operational amplifier respectively; The first end of described second resistance is connected with the first analog voltage output of digital to analog converter, second end of described second resistance is connected with the first end of described 3rd resistance, the positive input of the second operational amplifier, the first end of the 4th resistance respectively, second end of described 3rd resistance is connected with reference voltage source, the second termination signal ground of described 4th resistance; Described 5th resistance second end exports with the sawtooth signal of direct current biasing and the second end of described 5th resistance is also connected with the first end of the 3rd capacitor, the second end connection signal ground of described 3rd capacitor.
5. torque ripple minimization circuit according to claim 1, is characterized in that, described integral element circuit comprises the first operational amplifier, the 7th resistance, the 8th resistance and the 4th electric capacity:
Second analog voltage output of described digital to analog converter is connected with the first end of the 4th electric capacity with the input in the same way of the first operational amplifier respectively by the 7th resistance, and the second end of described 4th electric capacity is connected with the output of the first operational amplifier; The reverse input end of described first operational amplifier is connected with the first end of the 8th resistance, the second termination signal ground of described 8th resistance.
6. the torque ripple minimization circuit according to claim 3-5, it is characterized in that, the reverse input end of the output voltage input comparator of described integral element circuit, the positive input of the sawtooth waveforms input comparator of described band direct current biasing, the output outputs level signals of described amplifier:
The sawtooth waveforms of described direct current biasing is higher than the output voltage of described integral element circuit, and the output of described comparator exports high level signal;
The sawtooth waveforms of described direct current biasing lower than the output voltage of described integral element circuit, the output output low level signal of described comparator.
7. torque ripple minimization circuit according to claim 5, is characterized in that, the positive supply of described comparator and the first operational amplifier connects positive 5V voltage, and negative supply connects signal ground.
8. the torque ripple minimization circuit according to claim 1-5, is characterized in that, the PWM ripple that described duty ratio is adjustable is that 0-100% is adjustable.
9. an instrument, is characterized in that, comprises the torque ripple minimization circuit of the brshless DC motor according to any one of claim 1-8, and described instrument is Anesthesia machine, lung ventilator, air-conditioning, washing machine, hard disk or optical disc apparatus.
CN201410542828.XA 2014-10-14 2014-10-14 Torque ripple inhibition circuit of brushless direct current motor and device Pending CN105515483A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107681931A (en) * 2017-10-17 2018-02-09 中国电子科技集团公司第四十三研究所 A kind of brshless DC motor current loop control system and control method
CN112260594A (en) * 2020-10-30 2021-01-22 珠海格力电器股份有限公司 Brush direct current motor, drive control circuit thereof and air conditioner
CN112583384A (en) * 2020-11-27 2021-03-30 凯迈(洛阳)测控有限公司 High-frequency sawtooth wave generator and working method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107681931A (en) * 2017-10-17 2018-02-09 中国电子科技集团公司第四十三研究所 A kind of brshless DC motor current loop control system and control method
CN112260594A (en) * 2020-10-30 2021-01-22 珠海格力电器股份有限公司 Brush direct current motor, drive control circuit thereof and air conditioner
CN112583384A (en) * 2020-11-27 2021-03-30 凯迈(洛阳)测控有限公司 High-frequency sawtooth wave generator and working method thereof
CN112583384B (en) * 2020-11-27 2023-11-14 凯迈(洛阳)测控有限公司 High-frequency sawtooth wave generator and working method thereof

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Application publication date: 20160420