CN105514028A - Process for enlarging a Ti/TiN stress window - Google Patents
Process for enlarging a Ti/TiN stress window Download PDFInfo
- Publication number
- CN105514028A CN105514028A CN201511026574.7A CN201511026574A CN105514028A CN 105514028 A CN105514028 A CN 105514028A CN 201511026574 A CN201511026574 A CN 201511026574A CN 105514028 A CN105514028 A CN 105514028A
- Authority
- CN
- China
- Prior art keywords
- tin
- thickness
- thermal treatment
- rapid thermal
- rete
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
Abstract
The invention discloses a process for enlarging a Ti/TiN stress window. The process comprises a step 1 of etching a contact hole groove after a device is formed; a step 2 of performing first-time rapid thermal treatment; a step 3 of depositing a Ti/TiN film layer; and a step 4 of performing second-time rapid thermal treatment. The process, before a Ti/TiN film is formed, introduces special heat treatment so as to enlarge a process window preventing the film layer from stripping and decrease a probability that the Ti/TiN film layer is stripped from a silicon substrate.
Description
Technical field
The present invention relates to field of manufacturing semiconductor devices, particularly a kind of process expanding Ti/TiN stress window.
Background technology
Ti/TiN film, it has the features such as high-melting-point, excellent non-oxidizability, good electric heating conductibility, the adhesion excellent with substrate.In BCD technique, Ti/TiN is usually used in as barrier metal, or generally fills tungsten due to contact hole, but adhesion between tungsten and silicon substrate is not strong, in the middle of needing, adhesion layer strengthens adhesion property between metal object and silicon substrate, and Ti/TiN is also preferably adhesion layer metal.Ti/TiN also has the electromigratory function of minimizing, uses a large amount of in semiconductor fabrication process.
Ti/TiN rete is more formed by magnetron sputtering technique.Magnetron sputtering, utilize high energy particle sputtered with Ti target, microcosmic particle on Ti target is excited and target material surface of escaping out, the neutral particle of escaping out near target the Ionized by Electrons that fetters by magnetic field form Ti ion, Ti ion under the effect of cathode bias directed to matrix location deflection simultaneously be deposited on silicon substrate together with the Nitrogen ion of ionization in vacuum chamber.The advantage of magnetron sputtering technique is: high energy particle is deposited on the growth in graininess on matrix, ensure that good film-substrate cohesion, the control of rete density, uniformity, effectively improves the performances such as its hardness.But also there is shortcoming in this technology: 1, comparatively large, the more inefficacy easily causing rete of defect of stress in coating growth process, this deficiency of the preparation for thick film more easily highlights.2, high energy particle easily causes the distortion of matrix to the sputtering of basis material and growth.After Ti/TiN has sputtered, when heat treated, if temperature controls to occur a little extremely, very likely there is Ti/TiN and peel off or bulge, tungsten will be caused to peel off when CMP (ChemicalMechanicalPolishing) processes again, and then cause wafer loss.Its technological process formed roughly comprises: etching, the deposit Ti/TiN rete of contact hole groove, carry out rapid thermal treatment.The general temperature by heating head during raising sputtering, can suitably improve because follow-up stress changes the stripping caused, but heating head is limited in one's ability, and temperature all can occur fluctuating (spec:300 ~ 400 DEG C) after each maintenance, management and control difficulty, and after tightening up specification, also there is the phenomenon of metal-stripping.As shown in Figure 1, in figure, the right is for pattern is normal, attach good rete, and the left side is defective, and figure centre circle note place and the right contrast obviously can find out that warpage peeling has appearred in the tungsten of surface attachment, it is abnormal that this can cause device electric to connect, and causes component failure.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of Ti/TiN film forming process, solves the problem that silicon warp causes peeling off between Ti/TiN rete and silicon.
For solving the problem, Ti/TiN film forming process of the present invention, comprises:
1st step, after forming device, deposition dielectric film layer, carries out the etching of contact hole groove;
2nd step, carries out first time rapid thermal treatment;
3rd step, deposit Ti/TiN rete;
4th step, carries out second time rapid thermal treatment.
Further, shown 1st step, media coating comprises silicon oxide layer and boron-phosphorosilicate glass; Silicon oxide thickness 1000 ~
boron-phosphorosilicate glass thickness
remaining media rete gross thickness after CMP completes
Further, shown 2nd step, the temperature of rapid thermal treatment is 650 ~ 690 DEG C for the first time, and process gas is nitrogen, and the processing time is 20 ~ 50S.
Further, shown 3rd step, the thickness of deposit Ti/TiN rete is Ti thickness
tiN thickness
Further, shown 4th step, the temperature of second time rapid thermal treatment is 650 ~ 690 DEG C, and process gas is nitrogen, and the processing time is 20 ~ 50S.
Ti/TiN film forming process of the present invention, before Ti/TiN film is formed, adds special heat treatment, improves crystal column surface environment, expand the process window avoiding rete to peel off.
Accompanying drawing explanation
Fig. 1 is the schematic diagram occurring in traditional handicraft that tungsten is peeled off.
Fig. 2 is present invention process and documents technological effect comparison diagram.
Fig. 3 is present invention process schematic flow sheet.
Embodiment
Ti/TiN film forming process of the present invention, comprises following processing step:
1st step, after the agent structure of device completes, deposition dielectric film layer.Described media coating comprises silicon oxide layer and boron-phosphorosilicate glass; Silicon oxide thickness
boron-phosphorosilicate glass thickness
then the etching of contact hole groove is carried out, remaining media rete gross thickness after CMP completes
2nd step, carries out first time rapid thermal treatment, and the temperature of process is 650 ~ 690 DEG C, and process gas is nitrogen, and the processing time is 20 ~ 50S.
3rd step, carries out the sputtering technology of Ti/TiN, deposit Ti/TiN rete.The thickness of deposit Ti/TiN rete is Ti thickness
tiN thickness
4th step, carries out second time rapid thermal treatment.The temperature of process is 650 ~ 690 DEG C, and process gas is nitrogen, and the processing time is 20 ~ 50S.
Ti/TiN film forming process of the present invention, before Ti/TiN film is formed, add once special heat treatment, improve the surface environment of the wafer before film forming, by increasing RTP technique, as shown in Figure 2, lowest temperature can be reduced to 280 DEG C and also not occur rete peeling phenomenon, expand the process window avoiding rete to peel off.The present invention optimized silicon chip surface environment before formation buried regions metal, and more single control sputter temperature is more effectively succinct.
These are only the preferred embodiments of the present invention, be not intended to limit the present invention.For a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (5)
1. expand a process for Ti/TiN stress window, it is characterized in that: comprise following processing step:
1st step, after forming device, deposition dielectric film layer, carries out the etching of contact hole groove;
2nd step, carries out first time rapid thermal treatment;
3rd step, deposit Ti/TiN rete;
4th step, carries out second time rapid thermal treatment.
2. the process expanding Ti/TiN stress window as claimed in claim 1, it is characterized in that: shown 1st step, media coating comprises silicon oxide layer and boron-phosphorosilicate glass; Silicon oxide thickness
boron-phosphorosilicate glass thickness
remaining media rete gross thickness after CMP completes
3. the process expanding Ti/TiN stress window as claimed in claim 1, is characterized in that: shown 2nd step, and the temperature of rapid thermal treatment is 650 ~ 690 DEG C for the first time, and process gas is nitrogen, and the processing time is 20 ~ 50S.
4. the process expanding Ti/TiN stress window as claimed in claim 1, it is characterized in that: shown 3rd step, the thickness of deposit Ti/TiN rete is Ti thickness
tiN thickness
5. the process expanding Ti/TiN stress window as claimed in claim 1, is characterized in that: shown 4th step, and the temperature of second time rapid thermal treatment is 650 ~ 690 DEG C, and process gas is nitrogen, and the processing time is 20 ~ 50S.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511026574.7A CN105514028A (en) | 2015-12-31 | 2015-12-31 | Process for enlarging a Ti/TiN stress window |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511026574.7A CN105514028A (en) | 2015-12-31 | 2015-12-31 | Process for enlarging a Ti/TiN stress window |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105514028A true CN105514028A (en) | 2016-04-20 |
Family
ID=55721909
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201511026574.7A Pending CN105514028A (en) | 2015-12-31 | 2015-12-31 | Process for enlarging a Ti/TiN stress window |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105514028A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107611018A (en) * | 2017-09-26 | 2018-01-19 | 上海华虹宏力半导体制造有限公司 | A kind of method and crystal circle structure for improving wafer stress |
| CN109132995A (en) * | 2018-08-20 | 2019-01-04 | 上海华虹宏力半导体制造有限公司 | TiAlN thin film lithographic method applied to MEMS device |
| CN109166795A (en) * | 2018-08-20 | 2019-01-08 | 上海华虹宏力半导体制造有限公司 | TiN electrode film forming method |
| CN109216321A (en) * | 2017-07-04 | 2019-01-15 | 中芯国际集成电路制造（天津）有限公司 | Semiconductor devices and forming method thereof with plug |
| CN109911843A (en) * | 2019-02-27 | 2019-06-21 | 上海华虹宏力半导体制造有限公司 | The manufacturing method of metal thin-film pattern |
| CN110144556A (en) * | 2019-04-12 | 2019-08-20 | 北京北方华创微电子装备有限公司 | Sputtered film layer fill method and device in a kind of groove |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101075575A (en) * | 2006-05-15 | 2007-11-21 | 中芯国际集成电路制造(上海)有限公司 | Method for forming connecting hole with high depth and width ratio |
| CN101217112A (en) * | 2007-01-04 | 2008-07-09 | 中国科学院微电子研究所 | A preparation method of nanometer scale W/TiN compound refractory metal bar |
| US20090096103A1 (en) * | 2007-10-16 | 2009-04-16 | Kyung-Min Park | Semiconductor device and method for forming barrier metal layer thereof |
-
2015
- 2015-12-31 CN CN201511026574.7A patent/CN105514028A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101075575A (en) * | 2006-05-15 | 2007-11-21 | 中芯国际集成电路制造(上海)有限公司 | Method for forming connecting hole with high depth and width ratio |
| CN101217112A (en) * | 2007-01-04 | 2008-07-09 | 中国科学院微电子研究所 | A preparation method of nanometer scale W/TiN compound refractory metal bar |
| US20090096103A1 (en) * | 2007-10-16 | 2009-04-16 | Kyung-Min Park | Semiconductor device and method for forming barrier metal layer thereof |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109216321A (en) * | 2017-07-04 | 2019-01-15 | 中芯国际集成电路制造（天津）有限公司 | Semiconductor devices and forming method thereof with plug |
| CN107611018A (en) * | 2017-09-26 | 2018-01-19 | 上海华虹宏力半导体制造有限公司 | A kind of method and crystal circle structure for improving wafer stress |
| CN109132995A (en) * | 2018-08-20 | 2019-01-04 | 上海华虹宏力半导体制造有限公司 | TiAlN thin film lithographic method applied to MEMS device |
| CN109166795A (en) * | 2018-08-20 | 2019-01-08 | 上海华虹宏力半导体制造有限公司 | TiN electrode film forming method |
| CN109911843A (en) * | 2019-02-27 | 2019-06-21 | 上海华虹宏力半导体制造有限公司 | The manufacturing method of metal thin-film pattern |
| CN109911843B (en) * | 2019-02-27 | 2021-08-24 | 上海华虹宏力半导体制造有限公司 | Method for manufacturing metal film pattern |
| CN110144556A (en) * | 2019-04-12 | 2019-08-20 | 北京北方华创微电子装备有限公司 | Sputtered film layer fill method and device in a kind of groove |
| CN110144556B (en) * | 2019-04-12 | 2020-08-21 | 北京北方华创微电子装备有限公司 | Method and device for filling sputtered thin film layer in groove |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105514028A (en) | Process for enlarging a Ti/TiN stress window | |
| US7510634B1 (en) | Apparatus and methods for deposition and/or etch selectivity | |
| KR101364764B1 (en) | Apparatus and method for depositing electrically conductive pasting material | |
| US8936702B2 (en) | System and method for sputtering a tensile silicon nitride film | |
| US20140199561A1 (en) | Coated article and method for manufacturing same | |
| US20170004995A1 (en) | Film Forming Apparatus and Film Forming Method | |
| CN101017793B (en) | A making method for diffusing blocking layer | |
| CN105632863A (en) | Plasma etching apparatus | |
| TW201842218A (en) | Barrier film deposition and treatment | |
| US8906806B2 (en) | Method of manufacturing semiconductor device | |
| US20150243399A1 (en) | Conductive film, method for producing the same and array substrate comprising the same | |
| US20150235855A1 (en) | Metal Deposition with Reduced Stress | |
| CN103996618A (en) | Manufacturing method for TFT electrode lead | |
| KR101299755B1 (en) | Sputtering apparatus, thin film forming method and method for manufacturing field effect transistor | |
| CN103474390B (en) | A kind of manufacture method of aluminum metal lines | |
| CN109887879A (en) | A kind of method and semiconductor processing equipment covering film in hole | |
| CN103633012A (en) | Method for improving silicon chip warping degree | |
| TW201807233A (en) | Magnetron element and magnetron sputtering device enabling a sputtering deposition thin film to satisfy a set uniformity requirement under the full process pressure range | |
| JPS5987834A (en) | Forming method of thin-film | |
| JP5978072B2 (en) | Insulating film formation method | |
| JPH10265953A (en) | Sputter film, liquid crystal element and their production | |
| KR100345672B1 (en) | Method of forming interlayer dielectric layer using high density plasma oxide in semiconductor device | |
| CN104779137B (en) | A kind of array base palte and preparation method thereof | |
| JP5137332B2 (en) | Operation method of film forming equipment | |
| CN102569035A (en) | Method for reworking wafer after interruption of back metallization process |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20160420 |