CN105511002A - Grating and manufacturing method thereof, and electronic device - Google Patents
Grating and manufacturing method thereof, and electronic device Download PDFInfo
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- CN105511002A CN105511002A CN201410490639.2A CN201410490639A CN105511002A CN 105511002 A CN105511002 A CN 105511002A CN 201410490639 A CN201410490639 A CN 201410490639A CN 105511002 A CN105511002 A CN 105511002A
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- silicon nitride
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Abstract
The invention provides a grating and a manufacturing method thereof, and an electronic device. The manufacturing method of a grating comprises providing a substrate, and successively depositing a lower layer of oxide, a first silicon nitride layer and an upper layer of oxide on the substrate; etching the upper layer of oxide, and forming a plurality of grating linear array patterns which are arranged at equal interval; depositing a second silicon nitride layer, and covering the grating linear array patterns; performing chemical mechanical lapping unit exposing the top of the grating linear array patterns; etching the second silicon nitride layer and the first silicon nitride layer so as to form an opening for exposing the lower layer of oxide in the second silicon nitride layer and the first silicon nitride layer; depositing the other layer of oxide, and fully filling the opening; and performing the other chemical mechanical lapping until flattening the surface of the other layer of oxide. The manufacturing method of a grating can determine the height of the grating linear array patterns by controlling the deposition thickness of the upper layer of oxide covered on the first silicon nitride layer, and can effectively improve the uniformity of the height of the grating linear array patterns so as to improve the performance of the grating.
Description
Technical field
The present invention relates to semiconductor fabrication process, in particular to a kind of grating and manufacture method, electronic installation.
Background technology
Grating is that a kind of utilization stitches the optical element that diffraction principle makes light generation dispersion (being decomposed into spectrum) more.Existing semiconductor fabrication process deposits silicon nitride layer on a semiconductor substrate to form the linear array as grating by dry etching, do not penetrate silicon nitride layer due to described dry etching and between silicon nitride layer and Semiconductor substrate, do not form etching stopping layer to determine etching terminal, therefore, there is the problem of uneven thickness one in the linear array formed, and then directly affects the performance of grating.
Therefore, need to propose a kind of method, to solve the problem.
Summary of the invention
For the deficiencies in the prior art, the invention provides a kind of manufacture method of grating, comprising: substrate is provided, deposit lower oxide layer, the first silicon nitride layer and top oxide layer on the substrate successively; Etch described top oxide layer, form the grid stroke array pattern of multiple equidistant arrangement; Deposit the second silicon nitride layer, cover described grid stroke array pattern; Perform cmp, until expose the top of described grid stroke array pattern; Etch described second silicon nitride layer and described first silicon nitride layer, to form the opening exposing described lower oxide layer wherein; Deposit another oxide skin(coating), fill described opening completely; Perform another cmp, until the surface of another oxide skin(coating) described is smooth.
In one example, described oxide skin(coating) is silicon dioxide layer.
In one example, the thickness of described first silicon nitride layer is 233nm-243nm, and the thickness of described top oxide layer is 103nm-107nm.
In one example, reactive ion etching is etched to described in.
In one example, the depth-to-width ratio of described grid stroke array pattern is more than or equal to 1.
In one embodiment, the present invention also provides a kind of grating adopting said method to manufacture.
In one embodiment, the present invention also provides a kind of electronic installation, and described electronic installation comprises described grating.
According to the present invention, the height of described grid stroke array pattern is determined by the deposit thickness controlling the top oxide layer covering described first silicon nitride layer, effectively can improve the homogeneity of the height of described grid stroke array pattern, thus promote the performance of described grating.
Accompanying drawing explanation
Following accompanying drawing of the present invention in this as a part of the present invention for understanding the present invention.Shown in the drawings of embodiments of the invention and description thereof, be used for explaining principle of the present invention.
In accompanying drawing:
Figure 1A-Fig. 1 E for according to an exemplary embodiment of the present one the schematic cross sectional view of device that obtains respectively of the step implemented successively of method;
Fig. 2 is the process flow diagram of step implemented successively of method of according to an exemplary embodiment of the present.
Embodiment
In the following description, a large amount of concrete details is given to provide more thorough understanding of the invention.But, it is obvious to the skilled person that the present invention can be implemented without the need to these details one or more.In other example, in order to avoid obscuring with the present invention, technical characteristics more well known in the art are not described.
In order to thoroughly understand the present invention, by following description, detailed step is proposed, to explain grating and manufacture method, the electronic installation of the present invention's proposition.Obviously, the specific details that the technician that execution of the present invention is not limited to semiconductor applications has the knack of.Preferred embodiment of the present invention is described in detail as follows, but except these are described in detail, the present invention can also have other embodiments.
Should be understood that, " comprise " when using term in this manual and/or " comprising " time, it indicates exists described feature, entirety, step, operation, element and/or assembly, but does not get rid of existence or additional other features one or more, entirety, step, operation, element, assembly and/or their combination.
[exemplary embodiment one]
With reference to Figure 1A-Fig. 1 E, the schematic cross sectional view of the device that the step that the method that illustrated therein is according to an exemplary embodiment of the present is implemented successively obtains respectively.
First, as shown in Figure 1A, provide substrate 100, exemplarily, substrate 100 is a flat board, and its shape size is not limit, and can be circular flat plate, square plate etc., also can prepare according to actual needs.Substrate 100 can be semiconductor base or silicon-based substrate, and particularly, the material of substrate 100 can be gallium nitride, gallium arsenide, sapphire, aluminium oxide, magnesium oxide, silicon, quartz or glass etc.Further, the material of substrate 100 can for the semiconductor material of doping be as P type gallium nitride or n type gallium nitride etc.
Next, substrate 100 deposits lower oxide layer 101, first silicon nitride layer 102 and top oxide layer 103 successively.The described one be deposited as in low-pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD), ultra-high vacuum CVD (UHVCVD), rapid thermal CVD (RTCVD), physical vapour deposition (PVD) (PVD), ald (ALD) and molecular beam epitaxy (MBE).Exemplarily, the material of lower oxide layer 101 and top oxide layer 103 can be silicon dioxide.The thickness of silicon nitride layer 102 can be 233nm-243nm, and the thickness of top oxide layer 103 can be 103nm-107nm.
Then, as shown in Figure 1B, etching top oxide layer 103, forms the grid stroke array pattern 104 of multiple equidistant arrangement.The depth-to-width ratio of grid stroke array pattern 104 is more than or equal to 1.Exemplarily, described etching can be reactive ion etching (RIE), and etching gas comprises carbon tetrafluoride (CF
4), sulfur hexafluoride (SF
6) and argon gas (Ar) etc.Before implementing described etching, form patterned mask layer on the surface of top oxide layer 103, exemplarily, described patterned mask layer can be the photoresist layer formed by techniques such as coating, exposure, developments.After implementing described etching, dry ashing technique is adopted to remove described patterned mask layer.
Then, as shown in Figure 1 C, deposit the second silicon nitride layer, cover grid stroke array pattern 104.The described one be deposited as in low-pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, ultra-high vacuum CVD, rapid thermal CVD, physical vapour deposition (PVD), atomic layer deposition sum molecular beam epitaxy.Then, cmp is performed, until expose the top of grid stroke array pattern 104.
Then, as shown in figure ip, described second silicon nitride layer and the first silicon nitride layer 102 is etched, to form the opening 105 exposing lower oxide layer 101 wherein.Exemplarily, described etching can be reactive ion etching (RIE), and etching gas comprises carbon tetrafluoride (CF
4), sulfur hexafluoride (SF
6) and argon gas (Ar) etc.Before implementing described etching, form another patterned mask layer on the surface of described second silicon nitride layer, exemplarily, another patterned mask layer described can be the photoresist layer formed by techniques such as coating, exposure, developments.After implementing described etching, dry ashing technique is adopted to remove another patterned mask layer described.The size and number of opening 105 is determined according to actual needs.
Then, as referring to figure 1e, deposit another oxide skin(coating), fill opening 105 completely.The described one be deposited as in low-pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, ultra-high vacuum CVD, rapid thermal CVD, physical vapour deposition (PVD), atomic layer deposition sum molecular beam epitaxy.Then, perform another cmp, until the surface of another oxide skin(coating) described is smooth.
So far, the processing step that the method completing according to an exemplary embodiment of the present is implemented.According to the present invention, determined the height of grid stroke array pattern 104 by the deposit thickness of the top oxide layer 103 controlling covering first silicon nitride layer 102, effectively can improve the homogeneity of the height of grid stroke array pattern 104, thus promote the performance of grating.
With reference to Fig. 2, the process flow diagram of the step that the method that illustrated therein is according to an exemplary embodiment of the present is implemented successively, for schematically illustrating the flow process of manufacturing process.
In step 201, provide substrate, substrate deposits lower oxide layer, the first silicon nitride layer and top oxide layer successively;
In step 202., etching top oxide layer, forms the grid stroke array pattern of multiple equidistant arrangement;
In step 203, deposit the second silicon nitride layer, cover grid stroke array pattern;
In step 204, cmp is performed, until expose the top of grid stroke array pattern;
In step 205, etch the second silicon nitride layer and the first silicon nitride layer, to form the opening exposing lower oxide layer wherein;
In step 206, deposit another oxide skin(coating), fill described opening completely;
In step 207, perform another cmp, until the surface of another oxide skin(coating) is smooth.
[exemplary embodiment two]
The present invention also provides a kind of grating, and described grating selects the method described in exemplary embodiment one to prepare.The linear array characteristic dimension of the grating prepared by described method has the homogeneity of height, and performance is greatly improved.
[exemplary embodiment three]
The present invention also provides a kind of electronic installation, and it comprises the grating described in exemplary embodiment two.Described electronic installation can be mobile phone, panel computer, notebook computer, net book, game machine, televisor, VCD, DVD, navigating instrument, camera, video camera, recording pen, any electronic product such as MP3, MP4, PSP or equipment, also can be any intermediate product comprising described grating.Described electronic installation, owing to employing described grating, thus has better performance.
The present invention is illustrated by above-described embodiment, but should be understood that, above-described embodiment just for the object of illustrating and illustrate, and is not intended to the present invention to be limited in described scope of embodiments.In addition it will be appreciated by persons skilled in the art that the present invention is not limited to above-described embodiment, more kinds of variants and modifications can also be made according to instruction of the present invention, within these variants and modifications all drop on the present invention's scope required for protection.Protection scope of the present invention defined by the appended claims and equivalent scope thereof.
Claims (7)
1. a manufacture method for grating, comprising:
Substrate is provided, deposits lower oxide layer, the first silicon nitride layer and top oxide layer on the substrate successively;
Etch described top oxide layer, form the grid stroke array pattern of multiple equidistant arrangement;
Deposit the second silicon nitride layer, cover described grid stroke array pattern;
Perform cmp, until expose the top of described grid stroke array pattern;
Etch described second silicon nitride layer and described first silicon nitride layer, to form the opening exposing described lower oxide layer wherein;
Deposit another oxide skin(coating), fill described opening completely;
Perform another cmp, until the surface of another oxide skin(coating) described is smooth.
2. method according to claim 1, is characterized in that, described oxide skin(coating) is silicon dioxide layer.
3. method according to claim 1, is characterized in that, the thickness of described first silicon nitride layer is 233nm-243nm, and the thickness of described top oxide layer is 103nm-107nm.
4. method according to claim 1, is characterized in that, described in be etched to reactive ion etching.
5. method according to claim 1, is characterized in that, the depth-to-width ratio of described grid stroke array pattern is more than or equal to 1.
6. the grating of the method manufacture adopting one of claim 1-5 described.
7. an electronic installation, described electronic installation comprises grating according to claim 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410490639.2A CN105511002B (en) | 2014-09-23 | 2014-09-23 | A kind of grating and its manufacture method, electronic installation |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410490639.2A CN105511002B (en) | 2014-09-23 | 2014-09-23 | A kind of grating and its manufacture method, electronic installation |
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| Publication Number | Publication Date |
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| CN105511002A true CN105511002A (en) | 2016-04-20 |
| CN105511002B CN105511002B (en) | 2018-03-20 |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002048907A (en) * | 2000-08-01 | 2002-02-15 | Canon Inc | Method for manufacturing diffractive optical device |
| JP2002255566A (en) * | 2001-02-26 | 2002-09-11 | Toshiba Mach Co Ltd | Die for forming glass and method for manufacturing product of formed glass |
| US20090027773A1 (en) * | 2007-07-25 | 2009-01-29 | Seiko Epson Corporation | Wire grid type polarization element, manufacturing method thereof, liquid crystal device, and projection type display apparatus |
| JP2012122840A (en) * | 2010-12-08 | 2012-06-28 | Fujifilm Corp | Grid for photographing radiation image, method for manufacturing the same, and radiation image photographing system |
| CN103376487A (en) * | 2012-04-23 | 2013-10-30 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing optical gratings |
-
2014
- 2014-09-23 CN CN201410490639.2A patent/CN105511002B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002048907A (en) * | 2000-08-01 | 2002-02-15 | Canon Inc | Method for manufacturing diffractive optical device |
| JP2002255566A (en) * | 2001-02-26 | 2002-09-11 | Toshiba Mach Co Ltd | Die for forming glass and method for manufacturing product of formed glass |
| US20090027773A1 (en) * | 2007-07-25 | 2009-01-29 | Seiko Epson Corporation | Wire grid type polarization element, manufacturing method thereof, liquid crystal device, and projection type display apparatus |
| JP2012122840A (en) * | 2010-12-08 | 2012-06-28 | Fujifilm Corp | Grid for photographing radiation image, method for manufacturing the same, and radiation image photographing system |
| CN103376487A (en) * | 2012-04-23 | 2013-10-30 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing optical gratings |
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| CN105511002B (en) | 2018-03-20 |
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