CN105491387A - H264 hardware coding system based on three platforms of Intel, AMD and Nvidia - Google Patents
H264 hardware coding system based on three platforms of Intel, AMD and Nvidia Download PDFInfo
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Abstract
The invention discloses a H264 hardware coding system based on three platforms of Intel, AMD and Nvidia, comprising a universal coding module, an Intel hardware coder, an AMD hardware coder and a Nvidia hardware coder. The universal coding module is used for creating a universal coding interface, judging hardware coder types supportable to a computer system, and choosing to call any one of the Intel hardware coder, the AMD hardware coder and the Nvidia hardware coder according to the hardware coder type supportable to the computer system to perform H264 video coding; the Intel hardware coder is used for performing H264 video coding for the computer system supporting Intel hardware coding; the AMD hardware coder is used for performing H264 video coding for the computer system supporting AMD hardware coding; and the Nvidia hardware coder is used for performing H264 video coding for the computer system supporting Nvidia hardware coding. The H264 hardware coding system provided by the invention can judge the hardware coder types supportable to the computer system, and can obliviously provide H264 hardware coding for various different computer systems.
Description
Technical field
The invention belongs to graphics technology field, more specifically, relate to a kind of based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform.
Background technology
H.264 be the new-generation digital video compression format after MPEG4 that International Organization for standardization (ISO) and International Telecommunication Union (ITU) propose jointly.H.264 be ITU-T with H.26x series be one of video coding and decoding technology standard of name nominating.H.264 be the digital video coding standard that the joint video team (JVT:jointvideoteam) of the VCEG (Video Coding Experts group) of ITU-T and the MPEG (Motion Picture Expert Group) of ISO/IEC is developed.This standard comes from the exploitation being referred to as project H.26L of ITU-T the earliest.Although H.26L this title is not too common, used always.H.264 be ITU-T with H.26x series be one of standard of name nominating, AVC is the address of ISO/IECMPEG mono-side.
Current most H264 coding uses the Software Coding of libx264, like this when the cpu performance of computer is poor, can seriously consume central processing unit (CentralProcessingUnit, CPU) resource, cause computer system hydraulic performance decline; Even if some computer employs hardware encoding, but be only integrated graphics card or the Nvidia platform of supporting Intel platform, unified support can not be carried out to this few large platform of Intel, AMD, Nvidia.
Summary of the invention
For above defect or the Improvement requirement of prior art, the invention provides a kind of based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, its object is to provide corresponding hardware encoding scheme for the computer platform unaware of different hardware platforms, solve the technical problem that prior art lower part computer system cannot carry out H264 hardware encoding thus.
For achieving the above object, the invention provides and a kind ofly comprise universal coding module, Intel hardware coder, AMD hardware coder and Nvidia hardware coder based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, wherein:
Described universal coding module, for creating universal coding interface, judge the hardware coder type that computer system is supported, carry out H264 Video coding according to any one calling in Intel hardware coder, AMD hardware coder or Nvidia hardware coder of hardware coder type selecting that computer system is supported;
Described Intel hardware coder, for carrying out H264 Video coding to the computer system of support Intel hardware encoding;
Described AMD hardware coder, for carrying out H264 Video coding to the computer system of support AMD hardware encoding;
Described Nvidia hardware coder, for carrying out H264 Video coding to the computer system of support Nvidia hardware encoding.
In one embodiment of the present of invention, described universal coding module comprises universaling coder interface sub-module and encoder implementation sub-module, wherein:
Described universaling coder interface sub-module is for realizing the definition to encoder interfaces, and described encoder interfaces comprises File Open interface, encoder type obtains interface, encoder creates interface, the throttling interface that writes, closing of a file interface, wherein:
Described File Open interface is for opening the file for write coding result, or set up real-time messages host-host protocol (TimeMessagingProtocol, RTMP) connection or real time streaming transport protocol (RealTimeStreamingProtocol, RTSP) connect, the input parameter of described File Open interface comprises file path and reading and writing of files parameter;
Described encoder type obtains the encoder type that interface is supported for obtaining computer system, with the hardware coder making described encoder create the encoder type establishment respective type that interface is supported according to described computer system;
Described encoder creates the encoder that interface is used for obtaining according to described encoder type the encoder type establishment respective type that interface returns, its input parameter is encoder type, export as respective type encoder, described encoder type is Intel hardware coder, or AMD hardware coder, or Nvidia hardware coder;
Described write throttling interface for by coding after byte stream write above-mentioned for write coding result file in, or by RTMP agreement connect be sent to RTMP server, or by RTSP agreement connect be sent to RTSP server;
Described closing of a file interface is used for after end-of-encode, close the file write, or closes the connection of RTMP agreement or the connection of RTSP agreement of having set up;
Described encoder implementation sub-module is used for creating encoder interfaces according to above-mentioned universaling coder interface sub-module to the definition of encoder interfaces, utilize the encoder interfaces created to judge the hardware coder that computer system is supported, any one in Selection and call Intel hardware coder, AMD hardware coder or Nvidia hardware coder carries out H264 coding to video.
In one embodiment of the present of invention, described encoder interfaces also comprises written document head interface, described written document head interface is used for written document head, include H264 sequence sets parameter and the PPSH264 image set parameter of video encoder in described file header, described H264 sequence sets parameter and PPSH264 image set parameter are used for using when decoders decode.
In one embodiment of the present of invention, described encoder interfaces also comprises metadata information and arranges interface, and described metadata information arranges interface for arranging the metadata information in file.
In one embodiment of the present of invention, described encoder establishment interface comprises encoder and opens interface, encoder down interface and Image Coding interface, wherein:
Described encoder opens interface for opening encoder, and input parameter comprises the height of video wide, to be encoded and the code check of coding of video to be encoded;
Described Image Coding interface is used for after above-mentioned encoder is opened, and utilizes encoder encodes image, and input parameter is the image and scramble time stamp that will encode;
Described encoder down interface is used for after end-of-encode, closes the above-mentioned encoder opened.
In one embodiment of the present of invention, the encoder type that described encoder type acquisition interface acquisition computer system is supported is specially:
If return CT_QSV264, represent that computer system supports Intel hardware encoding;
If return CT_AMD264, represent that computer system supports AMD hardware encoding;
If return CT_NV264, represent that computer system supports Nvidia hardware encoding;
If return CT_X264, represent that computer system does not support any hardware encoding.
In one embodiment of the present of invention, described Image Coding interface specifically comprises that submodule is set up in byte stream buffering area, byte stream buffer size arranges submodule, frame of video Presentation Time Stamp arranges submodule, screen frame decoding time stamp arranges submodule, key frame judges submodule and Image Coding interface discharges submodule, wherein:
Submodule is set up in described byte stream buffering area, for setting up the H264 byte stream buffering area for decoders decode,
Described byte stream buffer size arranges submodule, for arranging the H264 byte stream buffer size for decoders decode;
Described frame of video Presentation Time Stamp arranges submodule, for arranging the frame of video Presentation Time Stamp for decoders decode;
Described screen frame decoding time stamp arranges submodule, for arranging screen frame decoding time stamp;
Described key frame judges submodule, for judging whether present frame is key frame;
Described Image Coding interface release submodule, for discharging present image addressable port.
In one embodiment of the present of invention, described Intel hardware coder comprises Intel hardware coder initialization submodule, Intel hardware coder encoding submodule and Intel hardware coder and closes closed submodule, wherein:
Described Intel hardware coder initialization submodule is used for initialization Intel hardware coder, specifically comprises SDK initialization submodule, coding initialization submodule, video memory distribution sub module and Intel parameter acquiring submodule, wherein:
Described SDK initialization submodule is for calling the MediaSDK of MFXInit initialization Intel official;
Described coding initialization submodule is used for calling MFXVideoENCODE_Init and carrys out initialization codes device;
Described video memory distribution sub module, for distributing the surface of the video memory for receiving image to be encoded, specifically comprises;
Call MFXVideoENCODE_QueryIOSurf to obtain the video memory number of surfaces needing to create;
Create IDirect3DDeviceManager9 interface, be used to provide video and accelerate function;
Call the OpenDeviceHandle method of IDirect3DDeviceManager9 interface, obtain equipment handle;
By the equipment handle of upper step, call the GetVideoService method of IDirect3DDeviceManager9 interface, create the IDirectXVideoDecoderService interface of IID_IDirectXVideoDecoderService (interface IID);
Call the CreateSurface method of the IDirectXVideoDecoderService interface that step creates to complete the establishment that video accelerates surface;
Described Intel parameter acquiring submodule is used for, after the success of initialization codes device, obtaining H264 sequence sets parameter and H264 image set parameter;
Described Intel hardware coder encoding submodule is used for carrying out H264 coding to video, specifically comprises Image Coding submodule and synchronous submodule, wherein:
Described Image Coding submodule, encodes for calling the image of MFXVideoENCODE_EncodeFrameAsync to NV12 form;
Described synchronous submodule is synchronous to what carry out between CPU and GPU for calling MFXVideoCORE_SyncOperation, obtains the data flow that hardware encoding returns;
Described Intel hardware coder closes closed submodule and is used for calling MFXVideoENCODE_Close to close encoder when stopping coding, carries out the release of resource, and calls MFXClose to close IntelMediaSDK.
In one embodiment of the present of invention, described AMD hardware coder comprises AMD hardware coder initialization submodule, AMD hardware coder encoding submodule and AMD hardware coder and closes closed submodule, wherein:
Described AMD hardware coder initialization submodule is used for initialization AMD hardware coder, specifically comprises DLL and loads submodule, interface establishment submodule, optimum configurations submodule and AMD parameter acquiring submodule, wherein:
Described DLL loads submodule for loading amf-core-windesktop32.dll and amf-component-vce-windesktop32.dll;
Described interface creates submodule and is used for calling AMFCreateContext establishment AMFContext interface, and calls AMFCreateComponent establishment AMFComponent interface,
Described optimum configurations submodule arranges relevant coding parameter for the SetProperty calling AMFComponent interface, and described coding parameter comprises resolution, code check and frame per second; And the Init method calling AMFComponent interface completes the initialization of encoder;
Described AMD parameter acquiring submodule, for calling the GetProperty method of AMFComponent interface, obtains H264 sequence sets parameter and the PPSH264 image set parameter of AMF_VIDEO_ENCODER_EXTRADATA enumeration type;
Described AMD hardware coder encoding submodule is used for carrying out H264 coding to video, specifically comprises video surface distribution sub module, submodule is submitted on video surface to and AMD byte stream acquisition submodule, wherein:
Described video surface distribution sub module distributes the video being used for receiving image to be encoded surface for the AllocSurface method calling AMFContext interface;
Described video surface submits to submodule for calling the SubmitInput method of AMFComponent interface, is submitted in encoder by the video surface generated in upper step;
Described AMD byte stream obtains submodule for calling the QueryOutput method of AMFComponent interface, obtains the byte stream after encoder encodes;
Described AMD hardware coder closes closed submodule, closing encoder, carrying out the release of resource for the Terminate method calling AMFComponent interface when stopping coding.
In one embodiment of the present of invention, described Nvidia hardware coder comprises Nvidia hardware coder initialization submodule, Nvidia hardware coder encoding submodule and Nvidia hardware coder and closes closed submodule, wherein:
Described Nvidia hardware coder initialization submodule is used for initialization Nvidia hardware coder, specifically comprise coding environment initialization submodule, Nvidia optimum configurations submodule, Nvidia parameter acquiring submodule and video memory surface creation submodule, wherein:
Described coding environment initialization submodule for loading nvcuda.dll and nvEncodeAPI.dll, the environment of initialization necessity; And the NvEncodeAPICreateInstance method calling nvEncodeAPI module creates NV_ENCODE_API_FUNCTION_LIST structure; And call cuCtxCreate_v2 interface establishment context environmental;
Described Nvidia optimum configurations submodule is used for calling nvEncOpenEncodeSessionEx method and creates encoder session, and call nvEncGetEncodePresetConfig coder parameters is arranged, and call the initialization that nvEncInitializeEncoder completes encoder;
Described Nvidia parameter acquiring submodule obtains for calling nvEncGetSequenceParams H264 sequence sets parameter and the PPSH264 image set parameter that type is NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
Described video memory surface creation submodule creates for calling nvEncCreateInputBuffer the video memory surface being used for receiving view data to be encoded, and calls nvEncCreateBitstreamBuffer and create coding and export and store data;
Described Nvidia hardware coder encoding submodule is used for carrying out H264 coding to video, specifically comprises and fills coded image submodule, encoding submodule and Nvidia byte stream acquisition submodule, wherein:
Described filling coded image submodule locks the video memory surface of above-mentioned video memory surface creation submodule establishment for calling nvEncLockInputBuffer, and fills coded image; And call nvEncUnlockInputBuffer this video memory surface is unlocked;
Described encoding submodule is used for calling nvEncEncodePicture and encodes;
Described Nvidia byte stream obtains submodule for calling the byte stream returned after nvEncLockBitstream obtains coding, after doing corresponding process, calls nvEncUnlockBitstream and discharges byte stream;
Described Nvidia hardware coder closes closed submodule, closes encoder for calling nvEncDestroyEncoder when stopping coding, and calls cuCtxDestroy_v2 release current environment context.
Provided by the invention based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, the hardware coder type that computer system is supported can be judged, and carry out H264 coding according to any one calling in Intel hardware coder, AMD hardware coder or Nvidia hardware coder of described hardware coder type selecting to needing the video play in this computer system, thus H264 hardware encoding can be provided to various different computer system platform unaware.。
Accompanying drawing explanation
Fig. 1 is based on Intel, AMD and Nvidia tri-structural representation of H264 hardware encoding system of platform in the embodiment of the present invention;
Fig. 2 is the structural representation of universaling coder interface sub-module in the embodiment of the present invention;
Fig. 3 is the structural representation of Intel hardware coder in the embodiment of the present invention;
Fig. 4 is the structural representation of AMD hardware coder in the embodiment of the present invention;
Fig. 5 is the structural representation of Nvidia hardware coder in the embodiment of the present invention;
Fig. 6 is the uml class figure schematic diagram of hardware encoding system in the embodiment of the present invention.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.In addition, if below in described each execution mode of the present invention involved technical characteristic do not form conflict each other and just can mutually combine.
As shown in Figure 1, the invention provides and a kind ofly comprise universal coding module, Intel hardware coder, AMD hardware coder and Nvidia hardware coder based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, wherein:
Described universal coding module, for creating universal coding interface, judge the hardware coder type that computer system is supported, carry out H264 Video coding according to any one calling in Intel hardware coder, AMD hardware coder or Nvidia hardware coder of hardware coder type selecting that computer system is supported;
Particularly, as shown in Figure 2, described universal coding module comprises universaling coder interface sub-module and encoder implementation sub-module, wherein:
Described universaling coder interface sub-module is for realizing the definition to encoder interfaces, and described encoder interfaces comprises File Open interface, encoder type obtains interface, encoder creates interface, the throttling interface that writes, closing of a file interface, wherein:
Described File Open interface for opening the file for write coding result, or sets up the connection of RTMP agreement or the connection of RTSP agreement, and the input parameter of described File Open interface comprises file path and reading and writing of files parameter; Described file path is the file path of local disk, or with RTMP: the RTMP agreement URL that //XXX starts, or with RTSP: the RTSP agreement URL that //XXX starts, described reading and writing of files parameter is write;
Described encoder type obtains the encoder type that interface is supported for obtaining computer system, with the hardware coder making described encoder create the encoder type establishment respective type that interface is supported according to described computer system;
Described encoder creates the encoder that interface is used for obtaining according to described encoder type the encoder type establishment respective type that interface returns, its input parameter is encoder type, export as respective type encoder, described encoder type is Intel hardware coder, or AMD hardware coder, or Nvidia hardware coder; Wherein said encoder establishment interface comprises encoder and opens interface, encoder down interface and Image Coding interface, wherein:
Described encoder opens interface for opening encoder, and input parameter comprises the height of video wide, to be encoded and the code check of coding of video to be encoded;
Described Image Coding interface is used for after above-mentioned encoder is opened, and utilizes encoder encodes image, and input parameter is the image and scramble time stamp that will encode;
Wherein said Image Coding interface specifically comprises that submodule is set up in byte stream buffering area, byte stream buffer size arranges submodule, frame of video Presentation Time Stamp arranges submodule, screen frame decoding time stamp arranges submodule, key frame judges submodule and Image Coding interface discharges submodule, wherein:
Submodule is set up in described byte stream buffering area, for setting up the H264 byte stream buffering area for decoders decode,
Described byte stream buffer size arranges submodule, for arranging the H264 byte stream buffer size for decoders decode;
Described frame of video Presentation Time Stamp arranges submodule, for arranging the frame of video Presentation Time Stamp for decoders decode;
Described screen frame decoding time stamp arranges submodule, for arranging screen frame decoding time stamp;
Described key frame judges submodule, for judging whether present frame is key frame;
Described Image Coding interface release submodule, for discharging present image addressable port.
Described encoder down interface is used for after end-of-encode, closes the above-mentioned encoder opened.
Described write throttling interface for by coding after byte stream write above-mentioned for write coding result file in, or by RTMP agreement connect be sent to RTMP server, or by RTSP agreement connect be sent to RTSP server;
Described closing of a file interface is used for after end-of-encode, close the file write, or closes the connection of RTMP agreement or the connection of RTSP agreement of having set up;
Particularly, the encoder type that described encoder type acquisition interface acquisition computer system is supported is specially:
If return CT_QSV264, represent that computer system supports Intel hardware encoding;
If return CT_AMD264, represent that computer system supports AMD hardware encoding;
If return CT_NV264, represent that computer system supports Nvidia hardware encoding;
If return CT_X264, represent that computer system does not support any hardware encoding.
Further, described encoder interfaces also comprises written document head interface, described written document head interface is used for written document head, include H264 sequence sets parameter and the PPSH264 image set parameter of video encoder in described file header, described H264 sequence sets parameter and PPSH264 image set parameter are used for using when decoders decode.
Further, described encoder interfaces also comprises metadata information and arranges interface, and described metadata information arranges interface for arranging the metadata information in file.
Described encoder implementation sub-module is used for creating encoder interfaces according to above-mentioned universaling coder interface sub-module to the definition of encoder interfaces, the encoder interfaces created is utilized to judge the hardware coder that computer system is supported, any one in Selection and call Intel hardware coder, AMD hardware coder or Nvidia hardware coder carries out H264 coding to video, wherein:
Described Intel hardware coder, for carrying out H264 Video coding to the computer system of support Intel hardware encoding;
Particularly, as shown in Figure 3, described Intel hardware coder comprises Intel hardware coder initialization submodule, Intel hardware coder encoding submodule and Intel hardware coder and closes closed submodule, wherein:
Described Intel hardware coder initialization submodule is used for initialization Intel hardware coder, specifically comprises SDK initialization submodule, coding initialization submodule, video memory distribution sub module and Intel parameter acquiring submodule, wherein:
Described SDK initialization submodule is for calling the MediaSDK of MFXInit initialization Intel official;
Described coding initialization submodule is used for calling MFXVideoENCODE_Init and carrys out initialization codes device;
Described video memory distribution sub module, for distributing the surface of the video memory for receiving image to be encoded, specifically comprises;
Call MFXVideoENCODE_QueryIOSurf to obtain the video memory number of surfaces needing to create;
Create IDirect3DDeviceManager9 interface, be used to provide video and accelerate function;
Call the OpenDeviceHandle method of IDirect3DDeviceManager9 interface, obtain equipment handle;
By the equipment handle of upper step, call the GetVideoService method of IDirect3DDeviceManager9 interface, create the IDirectXVideoDecoderService interface of IID_IDirectXVideoDecoderService (interface IID);
Call the CreateSurface method of the IDirectXVideoDecoderService interface that step creates to complete the establishment that video accelerates surface;
Described Intel parameter acquiring submodule is used for, after the success of initialization codes device, obtaining H264 sequence sets parameter and H264 image set parameter;
Described Intel hardware coder encoding submodule is used for carrying out H264 coding to video, specifically comprises Image Coding submodule and synchronous submodule, wherein:
Described Image Coding submodule, encodes for calling the image of MFXVideoENCODE_EncodeFrameAsync to NV12 form;
Described synchronous submodule is synchronous to what carry out between CPU and GPU for calling MFXVideoCORE_SyncOperation, obtains the data flow that hardware encoding returns;
Described Intel hardware coder closes closed submodule and is used for calling MFXVideoENCODE_Close to close encoder when stopping coding, carries out the release of resource, and calls MFXClose to close IntelMediaSDK.
Described AMD hardware coder, for carrying out H264 Video coding to the computer system of support AMD hardware encoding;
Particularly, as shown in Figure 4, described AMD hardware coder comprises AMD hardware coder initialization submodule, AMD hardware coder encoding submodule and AMD hardware coder and closes closed submodule, wherein:
Described AMD hardware coder initialization submodule is used for initialization AMD hardware coder, specifically comprises DLL and loads submodule, interface establishment submodule, optimum configurations submodule and AMD parameter acquiring submodule, wherein:
Described DLL loads submodule for loading amf-core-windesktop32.dll and amf-component-vce-windesktop32.dll;
Described interface creates submodule and is used for calling AMFCreateContext establishment AMFContext interface, and calls AMFCreateComponent establishment AMFComponent interface,
Described optimum configurations submodule arranges relevant coding parameter for the SetProperty calling AMFComponent interface, and described coding parameter comprises resolution, code check and frame per second; And the Init method calling AMFComponent interface completes the initialization of encoder;
Described AMD parameter acquiring submodule, for calling the GetProperty method of AMFComponent interface, obtains H264 sequence sets parameter and the PPSH264 image set parameter of AMF_VIDEO_ENCODER_EXTRADATA enumeration type;
Described AMD hardware coder encoding submodule is used for carrying out H264 coding to video, specifically comprises video surface distribution sub module, submodule is submitted on video surface to and AMD byte stream acquisition submodule, wherein:
Described video surface distribution sub module distributes the video being used for receiving image to be encoded surface for the AllocSurface method calling AMFContext interface;
Described video surface submits to submodule for calling the SubmitInput method of AMFComponent interface, is submitted in encoder by the video surface generated in upper step;
Described AMD byte stream obtains submodule for calling the QueryOutput method of AMFComponent interface, obtains the byte stream after encoder encodes;
Described AMD hardware coder closes closed submodule, closing encoder, carrying out the release of resource for the Terminate method calling AMFComponent interface when stopping coding.
Described Nvidia hardware coder, for carrying out H264 Video coding to the computer system of support Nvidia hardware encoding.
Particularly, as shown in Figure 5, described Nvidia hardware coder comprises Nvidia hardware coder initialization submodule, Nvidia hardware coder encoding submodule and Nvidia hardware coder and closes closed submodule, wherein:
Described Nvidia hardware coder initialization submodule is used for initialization Nvidia hardware coder, specifically comprise coding environment initialization submodule, Nvidia optimum configurations submodule, Nvidia parameter acquiring submodule and video memory surface creation submodule, wherein:
Described coding environment initialization submodule for loading nvcuda.dll and nvEncodeAPI.dll, the environment of initialization necessity; And the NvEncodeAPICreateInstance method calling nvEncodeAPI module creates NV_ENCODE_API_FUNCTION_LIST structure; And call cuCtxCreate_v2 interface establishment context environmental;
Described Nvidia optimum configurations submodule is used for calling nvEncOpenEncodeSessionEx method and creates encoder session, and call nvEncGetEncodePresetConfig coder parameters is arranged, and call the initialization that nvEncInitializeEncoder completes encoder;
Described Nvidia parameter acquiring submodule obtains for calling nvEncGetSequenceParams H264 sequence sets parameter and the PPSH264 image set parameter that type is NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
Described video memory surface creation submodule creates for calling nvEncCreateInputBuffer the video memory surface being used for receiving view data to be encoded, and calls nvEncCreateBitstreamBuffer and create coding and export and store data;
Described Nvidia hardware coder encoding submodule is used for carrying out H264 coding to video, specifically comprises and fills coded image submodule, encoding submodule and Nvidia byte stream acquisition submodule, wherein:
Described filling coded image submodule locks the video memory surface of above-mentioned video memory surface creation submodule establishment for calling nvEncLockInputBuffer, and fills coded image; And call nvEncUnlockInputBuffer this video memory surface is unlocked;
Described encoding submodule is used for calling nvEncEncodePicture and encodes;
Described Nvidia byte stream obtains submodule for calling the byte stream returned after nvEncLockBitstream obtains coding, after doing corresponding process, calls nvEncUnlockBitstream and discharges byte stream;
Described Nvidia hardware coder closes closed submodule, closes encoder for calling nvEncDestroyEncoder when stopping coding, and calls cuCtxDestroy_v2 release current environment context.
Particularly, hardware differences can be shielded by providing unified interface in embodiments of the present invention, describing the technical program to the hardware encoding encapsulation of three large platforms and the encapsulation to libx264 software encoder by UML (UML) class figure as shown in Figure 6.
To having AmdEncoder, NvidiaEncoder, QsvEncoder and X264Encoder, they represent AMD hardware coder respectively, Nvidia hardware coder, Intel hardware coder, and x264 software encoder, they inherit from BaseEncoder interface, BaseEncoder interface inheritance is from IMediaEncoder interface, and IMediaEncoder is exactly final unitized abstract interface, the method that this interface provides has been write exactly in the drawings and has been comprised (Open, open encoder, Close, close encoder, Encode, coding etc.) concrete interface definition is as follows:
1, IMediaFile interface
(1.1)boolOpen(char*filepath,boolwrite)
Open file, filepath parameter representation file path, namely can be the file path of local disk, also can be the RTMP agreement URL of RTMP: //XXX beginning, also can be RTSP: the RTSP agreement URL that //XXX starts, file or written document are read in the representative of write parameter, should for should be true in coding.
(1.2)IMediaEncoder*CreateEncoder(CodecTypetype)
Create encoder, parametric t ype is the type of encoder, and return value is IMediaEncoder interface
(1.3)boolWriteFileHeader()
Written document head, includes SPS, PPS information of video encoder, for decoders decode in multimedia file file head
(1.4)boolWritePacket(IRawPacket*pkt)
For writing the byte stream after coding, byte stream both can be saved in local disk file by the method, also can be sent to RTMP server with crossing RTMP agreement, containing the byte stream and relevant information that will write in parameter p kt
(1.5)int64_tSizeWritten()
For returning the byte number write
(1.6)voidSetMetaDataInformation(conststd::string&key,conststd::string&value)
For arranging MetaData (metadata) information in file
(1.7)boolClose()
Close file, can close the file write or the RTMP agreement sent, and close H264 encoder, releasing resource
2, CodecType enumeration type
(2.1)CT_VIDEOBEST
The hardware coder supported is selected in representative automatically, can be used for judging that current system supports the hardware coder of which kind of type
(2.2)CT_X264
Represent libx264 software encoder
(2.3)CT_QSV264
Represent Intel hardware coder
(2.4)CT_AMD264
Code AMD platform hardware encoder
3IMediaEncoder interface
This interface is obtained by the CreateEncoder interface of IMediaFile
(3.1)boolOpen(intwidth,intheight,intbitrate)
Open encoder, parameter width is the wide of video to be encoded, and height is the height of video to be encoded, and bitrate is the code check of coding
(3.2)boolClose()
Close encoder
(3.3)IRawPacket*Encode(uint8_t*pixels[3],int64_tstamp)
Coded image, parameter p ixles is the image that will encode, and stamp is scramble time stamp, returns IRawPacket interface
(3.4)CodecTypeGetCodecType()
Obtain the type of encoder
4, IRawPacket interface
This interface is the H264 byte stream interface that IMediaEncoder carries out returning when encoding
(4.1)uint8_t*Buffer()
H264 byte stream buffering area, for decoders decode
(4.2)intSize()
H264 byte stream buffer size, for decoders decode
(4.3)int64_tPts()
Frame of video Presentation Time Stamp, for decoders decode
(4.4)int64_tDts()
Screen frame decoding time stabs
(4.5)boolKeyframe()
Determine whether key frame
(4.6)Release()
Discharge this interface
5 module derivative functions
IMediaFile*CreateMediaFile(ContainerFormatcf)
This function is the DLL derivative function in the ylmediaengine module of this technical scheme, is used for establishment IMediaFile interface, by the IMediaFile interface of this establishment, just can create hardware H264 encoder.
Illustrate in actual computer system, how to utilize said system to carry out H264 hardware encoding below in conjunction with an instantiation, such as by this IMediaFile interface, in one plays live platform (such as struggle against the live companion of fish TV), use this interface to carry out hardware encoding and the picture after coding is pushed to bucket fish TV server, carry out live, particularly, performing step is as follows:
(6.1) CreateMediaFile function creation IMediaFile interface is called;
(6.2) the CreateEncoder method calling IMediaFile interface creates IMediaEncoder interface, and the parameter imported into is CT_VIDEOBEST;
(6.3) call the GetCodecType method of the IMediaEncoder interface in step, obtain the type of current encoder.When returning CT_QSV264, system supports Intel hardware encoding, and when returning CT_AMD264, system supports AMD hardware encoding, and when returning CT_NV264, system supports Nvidia hardware encoding, and when returning CT_X264, system does not support any hardware encoding; Such as:
When system video card type is: during NvidiaGeForce740 type, support Nvidia hardware encoding; When system video card type is: during Intel (R) HDGraphics, support Intel hardware encoding; When system video card type is: during AMDRadeonHD7700Series, support AMD hardware encoding
(6.4) initialization codes device
Selection resolution is 1920*1080, and frame number selects 25FPS, code rate selection 1600, and AMD hardware encoding selected by encoder.
By the IMediaDecoder interface created in step (6.2), call the Open method of this interface, and these parameters are imported in Open method, carry out the initialization of encoder;
(6.5) RTMP server is connected
After the success of initialization codes device, call the Open method of IMediaFile, connect RTMP server;
(6.6) H264 header is sent to RTMP server
After connecting the success of RTMP server, call the WriteFileHeader method of IMediaFile, the RTMP server sent by the header of video, decodes for player;
(6.7) encode
After above process is all successful, just can calls the Encode method of IMediaEncoder, the picture in live companion's the preview window be encoded, and returns IRawPacket interface;
(6.8) pushing video stream
By the IRawPacket interface returned in upper step, call the WritePacket method of IMediaFile, by the RTMP server of the pushing video streaming after coding.
By above step, just achieve in the embodiment of the present invention and utilize hardware encoding, image is pushed to RTMP server and carries out live process.
Those skilled in the art will readily understand; the foregoing is only preferred embodiment of the present invention; not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1., based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, it is characterized in that, comprise universal coding module, Intel hardware coder, AMD hardware coder and Nvidia hardware coder, wherein:
Described universal coding module, for creating universal coding interface, judge the hardware coder type that computer system is supported, carry out H264 Video coding according to any one calling in Intel hardware coder, AMD hardware coder or Nvidia hardware coder of hardware coder type selecting that computer system is supported;
Described Intel hardware coder, for carrying out H264 Video coding to the computer system of support Intel hardware encoding;
Described AMD hardware coder, for carrying out H264 Video coding to the computer system of support AMD hardware encoding;
Described Nvidia hardware coder, for carrying out H264 Video coding to the computer system of support Nvidia hardware encoding.
2., as claimed in claim 1 based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, it is characterized in that, described universal coding module comprises universaling coder interface sub-module and encoder implementation sub-module, wherein:
Described universaling coder interface sub-module is for realizing the definition to encoder interfaces, and described encoder interfaces comprises File Open interface, encoder type obtains interface, encoder creates interface, the throttling interface that writes, closing of a file interface, wherein:
Described File Open interface for opening the file for write coding result, or sets up the connection of RTMP agreement or the connection of RTSP agreement, and the input parameter of described File Open interface comprises file path and reading and writing of files parameter;
Described encoder type obtains the encoder type that interface is supported for obtaining computer system, with the hardware coder making described encoder create the encoder type establishment respective type that interface is supported according to described computer system;
Described encoder creates the encoder that interface is used for obtaining according to described encoder type the encoder type establishment respective type that interface returns, its input parameter is encoder type, export as respective type encoder, described encoder type is Intel hardware coder, or AMD hardware coder, or Nvidia hardware coder;
Described write throttling interface for by coding after byte stream write above-mentioned for write coding result file in, or by RTMP agreement connect be sent to RTMP server, or by RTSP agreement connect be sent to RTSP server;
Described closing of a file interface is used for after end-of-encode, close the file write, or closes the connection of RTMP agreement or the connection of RTSP agreement of having set up;
Described encoder implementation sub-module is used for creating encoder interfaces according to above-mentioned universaling coder interface sub-module to the definition of encoder interfaces, utilize the encoder interfaces created to judge the hardware coder that computer system is supported, any one in Selection and call Intel hardware coder, AMD hardware coder or Nvidia hardware coder carries out H264 coding to video.
3. as claimed in claim 2 based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, it is characterized in that, described encoder interfaces also comprises written document head interface, described written document head interface is used for written document head, include H264 sequence sets parameter and the PPSH264 image set parameter of video encoder in described file header, described H264 sequence sets parameter and PPSH264 image set parameter are used for using when decoders decode.
4. as claimed in claim 2 based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, it is characterized in that, described encoder interfaces also comprises metadata information and arranges interface, and described metadata information arranges interface for arranging the metadata information in file.
5. as described in any one of claim 2 to 4 based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, it is characterized in that, described encoder establishment interface comprises encoder and opens interface, encoder down interface and Image Coding interface, wherein:
Described encoder opens interface for opening encoder, and input parameter comprises the height of video wide, to be encoded and the code check of coding of video to be encoded;
Described Image Coding interface is used for after above-mentioned encoder is opened, and utilizes encoder encodes image, and input parameter is the image and scramble time stamp that will encode;
Described encoder down interface is used for after end-of-encode, closes the above-mentioned encoder opened.
6. as described in any one of claim 2 to 4 based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, it is characterized in that, described encoder type obtains interface and obtains the encoder type that computer system supports and be specially:
If return CT_QSV264, represent that computer system supports Intel hardware encoding;
If return CT_AMD264, represent that computer system supports AMD hardware encoding;
If return CT_NV264, represent that computer system supports Nvidia hardware encoding;
If return CT_X264, represent that computer system does not support any hardware encoding.
7. as claimed in claim 5 based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, it is characterized in that, described Image Coding interface specifically comprises that submodule is set up in byte stream buffering area, byte stream buffer size arranges submodule, frame of video Presentation Time Stamp arranges submodule, screen frame decoding time stamp arranges submodule, key frame judges submodule and Image Coding interface discharges submodule, wherein:
Submodule is set up in described byte stream buffering area, for setting up the H264 byte stream buffering area for decoders decode,
Described byte stream buffer size arranges submodule, for arranging the H264 byte stream buffer size for decoders decode;
Described frame of video Presentation Time Stamp arranges submodule, for arranging the frame of video Presentation Time Stamp for decoders decode;
Described screen frame decoding time stamp arranges submodule, for arranging screen frame decoding time stamp;
Described key frame judges submodule, for judging whether present frame is key frame;
Described Image Coding interface release submodule, for discharging present image addressable port.
8. as described in any one of claim 1 to 7 based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, it is characterized in that, described Intel hardware coder comprises Intel hardware coder initialization submodule, Intel hardware coder encoding submodule and Intel hardware coder and closes closed submodule, wherein:
Described Intel hardware coder initialization submodule is used for initialization Intel hardware coder, specifically comprises SDK initialization submodule, coding initialization submodule, video memory distribution sub module and Intel parameter acquiring submodule, wherein:
Described SDK initialization submodule is for calling the MediaSDK of MFXInit initialization Intel official;
Described coding initialization submodule is used for calling MFXVideoENCODE_Init and carrys out initialization codes device;
Described video memory distribution sub module, for distributing the surface of the video memory for receiving image to be encoded, specifically comprises;
Call MFXVideoENCODE_QueryIOSurf to obtain the video memory number of surfaces needing to create;
Create IDirect3DDeviceManager9 interface, be used to provide video and accelerate function;
Call the OpenDeviceHandle method of IDirect3DDeviceManager9 interface, obtain equipment handle;
By the equipment handle of upper step, call the GetVideoService method of IDirect3DDeviceManager9 interface, create the IDirectXVideoDecoderService interface of IID_IDirectXVideoDecoderService (interface IID);
Call the CreateSurface method of the IDirectXVideoDecoderService interface that step creates to complete the establishment that video accelerates surface;
Described Intel parameter acquiring submodule is used for, after the success of initialization codes device, obtaining H264 sequence sets parameter and H264 image set parameter;
Described Intel hardware coder encoding submodule is used for carrying out H264 coding to video, specifically comprises Image Coding submodule and synchronous submodule, wherein:
Described Image Coding submodule, encodes for calling the image of MFXVideoENCODE_EncodeFrameAsync to NV12 form;
Described synchronous submodule is synchronous to what carry out between CPU and GPU for calling MFXVideoCORE_SyncOperation, obtains the data flow that hardware encoding returns;
Described Intel hardware coder closes closed submodule and is used for calling MFXVideoENCODE_Close to close encoder when stopping coding, carries out the release of resource, and calls MFXClose to close IntelMediaSDK.
9. as described in any one of claim 1 to 7 based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, it is characterized in that, described AMD hardware coder comprises AMD hardware coder initialization submodule, AMD hardware coder encoding submodule and AMD hardware coder and closes closed submodule, wherein:
Described AMD hardware coder initialization submodule is used for initialization AMD hardware coder, specifically comprises DLL and loads submodule, interface establishment submodule, optimum configurations submodule and AMD parameter acquiring submodule, wherein:
Described DLL loads submodule for loading amf-core-windesktop32.dll and amf-component-vce-windesktop32.dll;
Described interface creates submodule and is used for calling AMFCreateContext establishment AMFContext interface, and calls AMFCreateComponent establishment AMFComponent interface,
Described optimum configurations submodule arranges relevant coding parameter for the SetProperty calling AMFComponent interface, and described coding parameter comprises resolution, code check and frame per second; And the Init method calling AMFComponent interface completes the initialization of encoder;
Described AMD parameter acquiring submodule, for calling the GetProperty method of AMFComponent interface, obtains H264 sequence sets parameter and the PPSH264 image set parameter of AMF_VIDEO_ENCODER_EXTRADATA enumeration type;
Described AMD hardware coder encoding submodule is used for carrying out H264 coding to video, specifically comprises video surface distribution sub module, submodule is submitted on video surface to and AMD byte stream acquisition submodule, wherein:
Described video surface distribution sub module distributes the video being used for receiving image to be encoded surface for the AllocSurface method calling AMFContext interface;
Described video surface submits to submodule for calling the SubmitInput method of AMFComponent interface, is submitted in encoder by the video surface of generation;
Described AMD byte stream obtains submodule for calling the QueryOutput method of AMFComponent interface, obtains the byte stream after encoder encodes;
Described AMD hardware coder closes closed submodule, closing encoder, carrying out the release of resource for the Terminate method calling AMFComponent interface when stopping coding.
10. as described in any one of claim 1 to 7 based on Intel, AMD and Nvidia tri-H264 hardware encoding system of platform, it is characterized in that, described Nvidia hardware coder comprises Nvidia hardware coder initialization submodule, Nvidia hardware coder encoding submodule and Nvidia hardware coder and closes closed submodule, wherein:
Described Nvidia hardware coder initialization submodule is used for initialization Nvidia hardware coder, specifically comprise coding environment initialization submodule, Nvidia optimum configurations submodule, Nvidia parameter acquiring submodule and video memory surface creation submodule, wherein:
Described coding environment initialization submodule for loading nvcuda.dll and nvEncodeAPI.dll, the environment of initialization necessity; And the NvEncodeAPICreateInstance method calling nvEncodeAPI module creates NV_ENCODE_API_FUNCTION_LIST structure; And call cuCtxCreate_v2 interface establishment context environmental;
Described Nvidia optimum configurations submodule is used for calling nvEncOpenEncodeSessionEx method and creates encoder session, and call nvEncGetEncodePresetConfig coder parameters is arranged, and call the initialization that nvEncInitializeEncoder completes encoder;
Described Nvidia parameter acquiring submodule obtains for calling nvEncGetSequenceParams H264 sequence sets parameter and the PPSH264 image set parameter that type is NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
Described video memory surface creation submodule creates for calling nvEncCreateInputBuffer the video memory surface being used for receiving view data to be encoded, and calls nvEncCreateBitstreamBuffer and create coding and export and store data;
Described Nvidia hardware coder encoding submodule is used for carrying out H264 coding to video, specifically comprises and fills coded image submodule, encoding submodule and Nvidia byte stream acquisition submodule, wherein:
Described filling coded image submodule locks the video memory surface of above-mentioned video memory surface creation submodule establishment for calling nvEncLockInputBuffer, and fills coded image; And call nvEncUnlockInputBuffer this video memory surface is unlocked;
Described encoding submodule is used for calling nvEncEncodePicture and encodes;
Described Nvidia byte stream obtains submodule for calling the byte stream returned after nvEncLockBitstream obtains coding, after doing corresponding process, calls nvEncUnlockBitstream and discharges byte stream;
Described Nvidia hardware coder closes closed submodule, closes encoder for calling nvEncDestroyEncoder when stopping coding, and calls cuCtxDestroy_v2 release current environment context.
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Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106231319A (en) * | 2016-07-14 | 2016-12-14 | 观止云(北京)信息技术有限公司 | A kind of method alignd frame by frame based on software and hardware combining |
CN110008102A (en) * | 2019-04-10 | 2019-07-12 | 苏州浪潮智能科技有限公司 | A kind of server performance test method and system based on intelligent video application |
CN110022480A (en) * | 2018-01-09 | 2019-07-16 | 武汉斗鱼网络科技有限公司 | A kind of H265 hardware encoding method and live streaming platform based on AMD video card |
CN110022478A (en) * | 2018-01-09 | 2019-07-16 | 武汉斗鱼网络科技有限公司 | A kind of H265 hardware encoding method and live streaming platform based on Intel SkyLake integrated graphics card |
CN110022479A (en) * | 2018-01-09 | 2019-07-16 | 武汉斗鱼网络科技有限公司 | A kind of H265 hardware encoding method and live streaming platform based on Nvidia Maxwell2 video card |
CN110147248A (en) * | 2019-04-19 | 2019-08-20 | 中国科学院计算技术研究所 | The single precision Matrix Multiplication optimization method and system accelerated using AMD GPU assembly instruction |
CN116074544A (en) * | 2022-11-15 | 2023-05-05 | 深圳壹秘科技有限公司 | Multi-platform live broadcast method, system, equipment and medium |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101490992A (en) * | 2006-07-14 | 2009-07-22 | 高通股份有限公司 | Encoder initialization and communications |
US20100083229A1 (en) * | 2008-09-30 | 2010-04-01 | Ics Triplex Isagraf Inc. | Application builder for industrial automation |
CN102724049A (en) * | 2012-07-02 | 2012-10-10 | 上海市共进通信技术有限公司 | Method for realizing cross-hardware-platform compatible passive optical network device multicast function |
CN103617191A (en) * | 2013-11-07 | 2014-03-05 | 北京奇虎科技有限公司 | Browser and method for rendering same by means of hardware acceleration |
CN103686164A (en) * | 2012-09-06 | 2014-03-26 | 腾讯科技(深圳)有限公司 | Method, system and module for self-adaptive hardware coding and decoding |
CN104049970A (en) * | 2014-05-29 | 2014-09-17 | 汉柏科技有限公司 | Automatic identifying method and system for framework and platform at user mode |
CN104581015A (en) * | 2013-10-21 | 2015-04-29 | 北京航天长峰科技工业集团有限公司 | Video monitoring method for enabling encoders of multiple brands to be compatible |
CN104980752A (en) * | 2015-06-11 | 2015-10-14 | 武汉大千信息技术有限公司 | Method for realizing multipath self-adaptive parallel transcoding through CPU and GPU and system thereof |
-
2015
- 2015-12-04 CN CN201510887873.3A patent/CN105491387B/en active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101490992A (en) * | 2006-07-14 | 2009-07-22 | 高通股份有限公司 | Encoder initialization and communications |
US20100083229A1 (en) * | 2008-09-30 | 2010-04-01 | Ics Triplex Isagraf Inc. | Application builder for industrial automation |
CN102724049A (en) * | 2012-07-02 | 2012-10-10 | 上海市共进通信技术有限公司 | Method for realizing cross-hardware-platform compatible passive optical network device multicast function |
CN103686164A (en) * | 2012-09-06 | 2014-03-26 | 腾讯科技(深圳)有限公司 | Method, system and module for self-adaptive hardware coding and decoding |
CN104581015A (en) * | 2013-10-21 | 2015-04-29 | 北京航天长峰科技工业集团有限公司 | Video monitoring method for enabling encoders of multiple brands to be compatible |
CN103617191A (en) * | 2013-11-07 | 2014-03-05 | 北京奇虎科技有限公司 | Browser and method for rendering same by means of hardware acceleration |
CN104049970A (en) * | 2014-05-29 | 2014-09-17 | 汉柏科技有限公司 | Automatic identifying method and system for framework and platform at user mode |
CN104980752A (en) * | 2015-06-11 | 2015-10-14 | 武汉大千信息技术有限公司 | Method for realizing multipath self-adaptive parallel transcoding through CPU and GPU and system thereof |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106231319A (en) * | 2016-07-14 | 2016-12-14 | 观止云(北京)信息技术有限公司 | A kind of method alignd frame by frame based on software and hardware combining |
CN110022480A (en) * | 2018-01-09 | 2019-07-16 | 武汉斗鱼网络科技有限公司 | A kind of H265 hardware encoding method and live streaming platform based on AMD video card |
CN110022478A (en) * | 2018-01-09 | 2019-07-16 | 武汉斗鱼网络科技有限公司 | A kind of H265 hardware encoding method and live streaming platform based on Intel SkyLake integrated graphics card |
CN110022479A (en) * | 2018-01-09 | 2019-07-16 | 武汉斗鱼网络科技有限公司 | A kind of H265 hardware encoding method and live streaming platform based on Nvidia Maxwell2 video card |
CN110022480B (en) * | 2018-01-09 | 2022-03-25 | 武汉斗鱼网络科技有限公司 | H265 hardware coding method based on AMD display card and live broadcast platform |
CN110008102A (en) * | 2019-04-10 | 2019-07-12 | 苏州浪潮智能科技有限公司 | A kind of server performance test method and system based on intelligent video application |
CN110147248A (en) * | 2019-04-19 | 2019-08-20 | 中国科学院计算技术研究所 | The single precision Matrix Multiplication optimization method and system accelerated using AMD GPU assembly instruction |
CN116074544A (en) * | 2022-11-15 | 2023-05-05 | 深圳壹秘科技有限公司 | Multi-platform live broadcast method, system, equipment and medium |
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