CN105490678A - Method and circuit for intelligent anti-interference and fast capture of phase-locked loop - Google Patents
Method and circuit for intelligent anti-interference and fast capture of phase-locked loop Download PDFInfo
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- CN105490678A CN105490678A CN201510809625.7A CN201510809625A CN105490678A CN 105490678 A CN105490678 A CN 105490678A CN 201510809625 A CN201510809625 A CN 201510809625A CN 105490678 A CN105490678 A CN 105490678A
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Abstract
The invention discloses a circuit for intelligent anti-interference and fast capture of a phase-locked loop. The circuit comprises a phase-frequency detector, a loop filter and a voltage controlled oscillator which are connected in sequence, and further comprises a sudden recognizer and an sudden compensator, wherein reference signals are input to the first input end of the phase-frequency detector; clock signals generated by the voltage controlled oscillator are input to the second input end of the phase-frequency detector; frequency and phase difference signals, between the reference signals and the clock signals, generated by the phase-frequency detector are input to the voltage controlled oscillator after being filtered by the loop filter; the reference signals and the output signals of the phase-frequency detector are connected to the sudden recognizer; the output end of the sudden recognizer is connected to the input end of the sudden compensator; and the output end of the sudden compensator is connected to the loop filter. The circuit has the advantages that impact of sudden interference can be controlled effectively; the phase-locked loop can be captured and restore stable fast after being interfered; and data loss caused by sudden interference in data transmission is avoided.
Description
Technical field
The invention belongs to phase-locked loop circuit technical field, be specifically related to method and the circuit of the anti-interference and fast Acquisition of a kind of phase-locked loop intelligence.
Background technology
Data transmission procedure is that data-signal is transferred to the moving process of another place through channel by a place, and channel can be wired, such as PCIe, USB, Ethernet; Also can be wireless, such as WiFi, bluetooth, 3G/4G/...nG (n=1,2., 3 ...) etc.Wire message way and wireless channel are all inevitably subject to the interference of other signals: such as, the thermal noise in line, the noise that shoves of electric switch, and the particle noise that solar windstorm comprises and other equipment are to interference noise of this equipment etc.The interference main manifestations of noise to channel is random noise disturbance and burst noise interference.Random noise is at all times, and general supposition not random noise statistical iteration in the same time, such as thermal noise, Space Particle noise etc.Burst noise accidentally occurs, such as thunder and lightning noise, switch flashy flow noise etc.
The transmission of data and receiving is undertaken by certain beat or clock, and each beat or each clock cycle transmit the data of a location number.Clock signal can be included in the signal of transfer channel and also can lie in the data of transmission by explicitly.The former is used for carrier transmission, and the latter is more common in baseband transmission.The clock signal overwhelming majority in carrier transmission or baseband transmission is produced by phase-locked loop (PLL:PhaseLockLoop) technology.The principle of typical phase locked loop technology as shown in Figure 1, come from outside standard clock signal, such as crystal oscillator, or in pilot tone in channel or base band implicit clock signal as the phase frequency detector being input to phase-locked loop with reference to signal, phase frequency detector Reference Signal is compared with phase place with the frequency of the clock signal that voltage controlled oscillator produces, produce frequency and phase error signal, this error signal controls the output of voltage controlled oscillator after loop filter filtering, produces the clock signal consistent with reference signal.
Reference signal from foreign channels can be subject to various Stochastic sum bursty interference, loop filter can reduce the impact of random signal interference on voltage controlled oscillator effectively, but the intensity of burst is large, frequency is positioned at the passband of loop filter, loop filter or can not can not reduce its impact on voltage controlled oscillator effectively, thus cause phase-locked loop losing lock, need at bursty interference rear recapture in the past.The data transmitted in losing lock and acquisition procedure can all or part of loss.
Summary of the invention
For the problems referred to above, the present invention proposes method and the circuit of the anti-interference and fast Acquisition of a kind of phase-locked loop intelligence, for bursty interference, accurately can identify, compensates fast and control interference, the locking of guarantee phase-locked loop.
For solving the problem, technical scheme of the present invention: the circuit of the anti-interference and fast Acquisition of a kind of phase-locked loop intelligence, comprise the phase frequency detector, loop filter and the voltage controlled oscillator that connect successively, reference signal is input to the first input end of phase frequency detector, the clock signal that voltage controlled oscillator produces is input to the second input of phase frequency detector, and frequency, the phase signal of the reference signal that phase frequency detector produces and clock signal input to voltage controlled oscillator after loop filter filtering; Also comprise burst recognition device and burst compensator; The output signal access burst identifier of reference signal and phase frequency detector, the output of burst recognition device is connected to the input of burst compensator; Burst compensator device output is connected to loop filter.
Burst recognition device is mainly used in the generation and the duration that identify bursty interference.Burst compensator is used for calculation compensation amount, and after burst in the past, compensation rate is joined loop filter.
Described burst recognition device comprises envelope computing module, comparator, sampler and memory, the input termination reference signal of envelope computing module, and its output exports envelope signal; Envelope signal and the common input comparator of comparator threshold, comparator output terminal exports burst; The common input sample device of output signal of envelope signal and phase frequency detector, sampler by the burst sampling signal that obtains stored in memory.
Burst sampling signal comprises phase frequency detector sampled value, envelope signal sampling value.
Described burst compensator comprises accumulator and multiplier, and the burst sampling signal input burst compensator in memory also will calculate compensation rate input loop filter in conjunction with compensation rate computing formula.
A method for the anti-interference and fast Acquisition of phase-locked loop intelligence, comprises the steps:
Step one, Reference Signal are input to envelope computing module and obtain envelope signal, and envelope signal obtains burst with the common input comparator of comparator threshold through comparing;
Step 2, utilize the output signal of sampler samples phase frequency detector at the rising edge time of burst, and by the rising edge of burst sampled envelope signal, the phase frequency detector sampled value and envelope signal sampling value that obtain sampling are stored in memory;
Step 3, the phase frequency detector sampled value in memory, envelope signal sampling value are input to burst compensator calculate compensation rate;
Step 4, trailing edge moment at burst, compensation rate is inputted loop filter by burst compensator.
Described compensation rate computing formula is: C=B
p* (a
1* B
1+ a
2* B
2+ ...+a
n* B
n) wherein, C is compensation rate; a
nfor setting constant coefficient (0≤a
n≤ 1, a
nfor real number, n=1,2 ... for natural number), B
nfor envelope signal sampling value (n=1,2 ..., be natural number), B
pfor phase frequency detector sampled value.
Beneficial effect: the Method and circuits of the anti-interference and fast Acquisition of phase-locked loop disclosed by the invention intelligence, accurately can identify, compensate fast and control to disturb; The present invention effectively can control the impact of bursty interference, ensures that phase-locked loop is stablized at disturbed rear fast Acquisition and recovery, because bursty interference causes loss of data during deduction and exemption data transmit.
Accompanying drawing explanation
Fig. 1 is typical phase locked loop schematic diagram;
Fig. 2 is principle of the invention figure;
Fig. 3 is that the additivity of channel signal very becomes and very becomes with multiplication;
Fig. 4 is burst recognition device schematic diagram;
Fig. 5 is burst compensator schematic diagram.
Embodiment
The circuit of the anti-interference and fast Acquisition of a kind of phase-locked loop intelligence, as shown in Figure 2, comprise the phase frequency detector, loop filter and the voltage controlled oscillator that connect successively, reference signal is input to the first input end of phase frequency detector, the clock signal that voltage controlled oscillator produces is input to the second input of phase frequency detector, and frequency, the phase signal of the reference signal that phase frequency detector produces and clock signal input to voltage controlled oscillator after loop filter filtering; Also comprise burst recognition device and burst compensator; The output signal P access burst identifier of reference signal and phase frequency detector, the output of burst recognition device is connected to the input of burst compensator; Burst compensator output is connected to loop filter.
As shown in Figure 4, described burst recognition device comprises envelope computing module, comparator, sampler and memory, the input termination reference signal of envelope computing module, and its output exports envelope signal W; Envelope signal W and the common input comparator of comparator threshold, comparator output terminal exports burst S
b; The common input sample device of output signal P of envelope signal W and phase frequency detector, sampler by the burst sampling signal that obtains stored in memory.By burst recognition device identification burst S
bgeneration and the duration.Burst sampling signal comprises phase frequency detector sampled value B
p, envelope signal sampling value B
n(n=1,2 ..., be natural number).
As shown in Figure 5, described burst compensator comprises accumulator and multiplier, and the burst sampling signal input burst compensator in memory also will calculate compensation rate input loop filter in conjunction with compensation rate computing formula.
Described compensation rate computing formula is: C=B
p* (a
1* B
1+ a
2* B
2+ ...+a
n* B
n) wherein, C is compensation rate; a
nfor setting constant coefficient (0≤a
n≤ 1, a
nfor real number, n=1,2 ... for natural number), B
nfor envelope signal sampling value (n=1,2 ..., be natural number), B
pfor phase frequency detector sampled value.
A method for the anti-interference and fast Acquisition of phase-locked loop intelligence, comprises the steps:
Step one, Reference Signal are input to envelope computing module and obtain envelope signal, and envelope signal obtains burst S with the common input comparator of comparator threshold through comparing
b;
As shown in Figure 3, addition can be there is after the signal transmitted in channel is subject to bursty interference and very become and very become with multiplication, this signal is input to the envelope signal W that envelope computing module calculates channel signal.
Step 2, at burst S
brising edge time utilize the output signal P of sampler samples phase frequency detector, and by burst S
brising edge start sampled envelope signal W, by the phase frequency detector sampled value B that obtains of sampling
pand envelope signal sampling value B
n(n=1,2 ..., be natural number) and stored in memory;
Step 3, by the phase frequency detector sampled value B in memory
p, envelope signal sampling value B
nbe input to burst compensator and calculate compensation rate C;
Step 4, at burst S
bthe trailing edge moment, burst compensator by compensation rate C input loop filter.
Claims (5)
1. the circuit of the anti-interference and fast Acquisition of phase-locked loop intelligence, comprise the phase frequency detector, loop filter and the voltage controlled oscillator that connect successively, reference signal is input to the first input end of phase frequency detector, the clock signal that voltage controlled oscillator produces is input to the second input of phase frequency detector, and frequency, the phase signal of the reference signal that phase frequency detector produces and clock signal input to voltage controlled oscillator after loop filter filtering; It is characterized in that: also comprise burst recognition device and burst compensator; The output signal access burst identifier of reference signal and phase frequency detector, the output of burst recognition device is connected to the input of burst compensator; Burst compensator output is connected to loop filter.
2. the circuit of and fast Acquisition anti-interference according to a kind of phase-locked loop intelligence in claim 1, it is characterized in that: described burst recognition device comprises envelope computing module, comparator, sampler and memory, the input termination reference signal of envelope computing module, its output exports envelope signal; Envelope signal and the common input comparator of comparator threshold, comparator output terminal exports burst; The common input sample device of output signal of envelope signal and phase frequency detector, sampler by the burst sampling signal that obtains stored in memory.
3. the circuit of and fast Acquisition anti-interference according to a kind of phase-locked loop intelligence in claim 2, it is characterized in that: described burst compensator comprises accumulator and multiplier, the burst sampling signal input burst compensator in memory also will calculate compensation rate input loop filter in conjunction with compensation rate computing formula.
4. a method for the anti-interference and fast Acquisition of phase-locked loop intelligence, is characterized in that comprising the steps:
Step one, Reference Signal are input to envelope computing module and obtain envelope signal, and envelope signal obtains burst with the common input comparator of comparator threshold through comparing;
Step 2, utilize the output signal of sampler samples phase frequency detector at the rising edge time of burst, and by the rising edge of burst sampled envelope signal, the phase frequency detector sampled value and envelope signal sampling value that obtain sampling are stored in memory;
Step 3, the phase frequency detector sampled value in memory, envelope signal sampling value are input to burst compensator calculate compensation rate;
Step 4, trailing edge moment at burst, compensation rate is inputted loop filter by burst compensator.
5. the method for the anti-interference and fast Acquisition of phase-locked loop according to claim 4 intelligence, is characterized in that: described compensation rate computing formula is: C=B
p* (a
1* B
1+ a
2* B
2+ ...+a
n* B
n) wherein, C is compensation rate; a
nfor setting constant coefficient (0≤a
n≤ 1, a
nfor real number, n=1,2 ... for natural number), B
nfor envelope signal sampling value (n=1,2 ..., be natural number), B
pfor phase frequency detector sampled value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510809625.7A CN105490678A (en) | 2015-11-20 | 2015-11-20 | Method and circuit for intelligent anti-interference and fast capture of phase-locked loop |
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|---|---|---|---|
| CN201510809625.7A CN105490678A (en) | 2015-11-20 | 2015-11-20 | Method and circuit for intelligent anti-interference and fast capture of phase-locked loop |
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| CN105490678A true CN105490678A (en) | 2016-04-13 |
Family
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109831401A (en) * | 2019-03-19 | 2019-05-31 | 西安电子科技大学 | Modulator and method based on total reference in a kind of MIMO system |
| CN113029207A (en) * | 2021-03-17 | 2021-06-25 | 上海睿奈电子科技有限公司 | High-sensitivity and configurable sensor driving and signal processing integrated circuit |
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| US20070194811A1 (en) * | 2003-12-19 | 2007-08-23 | Koninklijke Philips Electronic, N.V. | Method and arrangement for interference compensation in a voltage-controlled frequency generator |
| CN101741379A (en) * | 2009-12-09 | 2010-06-16 | 中国科学院半导体研究所 | Frequency complex for fast locking phaselocked loop |
| CN103986464A (en) * | 2014-05-22 | 2014-08-13 | 无锡中科微电子工业技术研究院有限责任公司 | Self-calibration device and method for loop parameters of phase-locked loop |
| US20150311908A1 (en) * | 2014-04-29 | 2015-10-29 | Telefonaktiebolaget L M Ericsson (Publ) | Local oscillator interference cancellation |
-
2015
- 2015-11-20 CN CN201510809625.7A patent/CN105490678A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070194811A1 (en) * | 2003-12-19 | 2007-08-23 | Koninklijke Philips Electronic, N.V. | Method and arrangement for interference compensation in a voltage-controlled frequency generator |
| CN101741379A (en) * | 2009-12-09 | 2010-06-16 | 中国科学院半导体研究所 | Frequency complex for fast locking phaselocked loop |
| US20150311908A1 (en) * | 2014-04-29 | 2015-10-29 | Telefonaktiebolaget L M Ericsson (Publ) | Local oscillator interference cancellation |
| CN103986464A (en) * | 2014-05-22 | 2014-08-13 | 无锡中科微电子工业技术研究院有限责任公司 | Self-calibration device and method for loop parameters of phase-locked loop |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109831401A (en) * | 2019-03-19 | 2019-05-31 | 西安电子科技大学 | Modulator and method based on total reference in a kind of MIMO system |
| CN109831401B (en) * | 2019-03-19 | 2021-04-13 | 西安电子科技大学 | Modulator and method based on common reference in MIMO system |
| CN113029207A (en) * | 2021-03-17 | 2021-06-25 | 上海睿奈电子科技有限公司 | High-sensitivity and configurable sensor driving and signal processing integrated circuit |
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Effective date of abandoning: 20190104 |