CN105487311A - Pixel structure and making method thereof, array substrate and display device - Google Patents
Pixel structure and making method thereof, array substrate and display device Download PDFInfo
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- CN105487311A CN105487311A CN201610064421.XA CN201610064421A CN105487311A CN 105487311 A CN105487311 A CN 105487311A CN 201610064421 A CN201610064421 A CN 201610064421A CN 105487311 A CN105487311 A CN 105487311A
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- electrode layer
- transparent electrode
- slit
- shaped electric
- electric poles
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
Abstract
The invention relates to the technical field of display, and discloses a pixel structure and a making method thereof, an array substrate and a display device. The pixel structure comprises a substrate and a first transparent electrode layer and a second transparent electrode layer which are arranged on the substrate, the second transparent electrode layer comprises multiple strip-shaped electrodes, the first transparent electrode layer comprises at least one slit, and each slit is at least partially located in a projection of the corresponding the strip-shaped electrode in the substrate. According to the pixel structure, by means of the slits formed in the first transparent electrode layer, the overlapping regions of the first transparent electrode layer and the second transparent electrode layer is effectively decreased, storage capacitance formed between the overlapping regions is decreased, and the charging efficiency of pixels and the display quality of the display device are improved.
Description
Technical field
The present invention relates to display technique field, be specifically related to a kind of dot structure and preparation method thereof, array base palte and display device.
Background technology
Liquid crystal indicator is current most popular a kind of panel display apparatus, can be various electronic equipment and has high-resolution color screen as mobile phone, personal digital assistant (PDA), digital camera and computing machine etc. provide.Wherein with its viewing visual angle, wide and aperture opening ratio high is subject to liking of users to FFS (FringeFieldSwitching, fringe field switching technology) liquid crystal indicator.The FFS liquid crystal indicator generally adopted at present, the liquid crystal layer generally including color membrane substrates, array base palte and be arranged between color membrane substrates and array base palte.On array base palte, be wherein provided with a plurality of data lines, grid line and intersect by a plurality of data lines grid line the multiple dot structures limited.
As shown in Figure 1, the dot structure of traditional F FS display technique comprises underlay substrate 3 ＇, and underlay substrate 3 ＇ is provided with thin film transistor (TFT) 4 ＇, the first transparent electrode layer 1 ＇, the second transparent electrode layer 2 ＇.Wherein, the first transparent electrode layer 1 ＇ is planar structure electrode, and the second transparent electrode layer 2 ＇ comprises several strip shaped electric poles, there is overlapping region between the first transparent electrode layer 1 ＇ and the second transparent electrode layer 2 ＇.Concrete arrangement as shown in Figure 2.Can find out that the overlapping region of traditional dot structure first transparent electrode layer 1 ＇ and the second transparent electrode layer 2 ＇ is comparatively large by Fig. 1 and Fig. 2, the memory capacitance (Cst) therefore formed between the first transparent electrode layer 1 ＇ and the second transparent electrode layer 2 ＇ is larger.Larger memory capacitance extends the duration of charging of pixel, makes pixel cell easily occur the phenomenon of undercharge, causes display panel brightness to decline, has had a strong impact on display quality.
Summary of the invention
The technical problem to be solved in the present invention is: the problem solving the memory capacitance how reduced between the first transparent electrode layer in existing dot structure and the second transparent electrode layer.
For realizing above-mentioned goal of the invention, the invention provides a kind of dot structure and preparation method thereof, array base palte and display device.
According to a first aspect of the present invention, provide a kind of dot structure: comprise underlay substrate and the first transparent electrode layer of being arranged on described underlay substrate and the second transparent electrode layer, described second transparent electrode layer comprises multiple strip shaped electric poles, it is characterized in that, described first transparent electrode layer comprises at least one slit, and slit described in each is positioned at the projection of described strip shaped electric poles at described underlay substrate at least partly.
Preferably, slit described in each is all positioned at the projection of described strip shaped electric poles at described underlay substrate.
Preferably, for slit described in each, the ratio of the width of its width strip shaped electric poles is corresponding thereto 10% ~ 100%.
Preferably, the quantity of slit described in described first transparent electrode layer is 1:50 ~ 1:2 with the ratio of the quantity of strip shaped electric poles described in described second transparent electrode layer.
According to a second aspect of the present invention, provide a kind of array base palte, comprise dot structure described above.
According to a third aspect of the present invention, provide a kind of display device, comprise array base palte described above.
According to a fourth aspect of the present invention, provide a kind of method for making of dot structure, comprising:
Underlay substrate is formed the first transparent electrode layer and the second transparent electrode layer, wherein, described second transparent electrode layer comprises multiple strip shaped electric poles, described first transparent electrode layer comprises at least one slit, and slit described in each is positioned at the projection of described strip shaped electric poles at described underlay substrate at least partly.
Preferably, slit described in each is all positioned at the projection of described strip shaped electric poles at described underlay substrate.
Preferably, for slit described in each, the ratio of the width of its width strip shaped electric poles is corresponding thereto 10% ~ 100%.
Preferably, the quantity of slit described in described first transparent electrode layer is 1:50 ~ 1:2 with the ratio of the quantity of strip shaped electric poles described in described second transparent electrode layer.
This dot structure provided by the invention, by forming slit on the first transparent electrode layer, and make slit be positioned at the projection of strip electrode on underlay substrate at least partly, effectively reduce the overlapping region of the first transparent electrode layer and the second transparent electrode layer, thus reduce the memory capacitance formed therebetween, improve the charge efficiency of pixel and the display quality of display device.
Accompanying drawing explanation
By reading hereafter detailed description of the preferred embodiment, various other advantage and benefit will become cheer and bright for those of ordinary skill in the art.Accompanying drawing only for illustrating the object of preferred implementation, and does not think limitation of the present invention.And in whole accompanying drawing, represent identical parts by identical reference symbol.In the accompanying drawings:
Fig. 1 is the dot structure schematic cross-section of prior art;
Fig. 2 is the dot structure vertical view of prior art;
Fig. 3 is dot structure schematic cross-section provided by the invention;
Fig. 4 is a kind of dot structure vertical view provided by the invention;
Fig. 5 is another kind of dot structure vertical view provided by the invention;
Fig. 6 is that different slit provided by the invention arranges ratio corresponding voltage-transmittance curve schematic diagram;
Fig. 7 is that different slit provided by the invention arranges memory capacitance ratio schematic diagram corresponding to ratio.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples for illustration of the present invention, but are not used for limiting the scope of the invention.
The invention provides a kind of dot structure, the first transparent electrode layer comprising underlay substrate and be arranged on underlay substrate and the second transparent electrode layer, second transparent electrode layer comprises multiple strip shaped electric poles, first transparent electrode layer comprises at least one slit, and each slit is positioned at the projection of strip shaped electric poles at underlay substrate at least partly.
Dot structure provided by the invention by forming slit on the first transparent electrode layer, and make slit be positioned at the projection of strip electrode on underlay substrate at least partly, effectively reduce the overlapping region of the first transparent electrode layer and the second transparent electrode layer, thus reduce the memory capacitance formed therebetween, improve the charge efficiency of pixel and the display quality of display device.
See Fig. 3, the dot structure that Fig. 3 provides for embodiment of the present invention, comprise underlay substrate 3, underlay substrate 3 is provided with thin film transistor (TFT) 4, first transparent electrode layer 1, second transparent electrode layer 2, and the passivation layer 5 between the first transparent electrode layer 1 and the second transparent electrode layer 2.Wherein, thin film transistor (TFT) 4 comprises grid 41, gate insulator 42, active layer 43, source electrode 44 and drain electrode 45, first transparent electrode layer 1 is plane-shape electrode, second transparent electrode layer 2 comprises multiple strip shaped electric poles 6, between the first transparent electrode layer 1 and the second transparent electrode layer 2, have overlapping region.In order to reduce overlapping region thus reduce the memory capacitance formed therebetween, the first transparent electrode layer 1 is also provided with at least one slit 7, and slit 7 is positioned at the projection of strip shaped electric poles 6 at underlay substrate 3 at least partly.The setting of slit 7 reduces the overlapping region between the first transparent electrode layer 1 and the second transparent electrode layer 2, thus reduces the memory capacitance formed between the first transparent electrode layer 1 and the second transparent electrode layer 2.
Wherein, as shown in Figure 3, the slit 7 the first transparent electrode layer 1 formed all can be positioned at the projection of strip shaped electric poles 6 at underlay substrate 3.For each slit 7, its width with its on the ratio of width of upright right strip shaped electric poles 6 can within 10% ~ 100%, such as, can be as shown in Figure 4, the width of the little strip shaped electric poles 6 corresponding thereon of width of slit 7, can also as shown in Figure 5, the width of slit 7 is identical with the width of strip shaped electric poles 6 corresponding on it, and the ratio of the width between slit 7 to strip shaped electric poles 6 can do corresponding adjustment according to actual conditions.
In order to reduce the size of memory capacitance further, preferably, the first transparent electrode layer 1 can arrange multiple slit 7, such as, the quantity of slit in the first transparent electrode layer can be made to be 1:50 ~ 1:2 with the ratio of the quantity of strip shaped electric poles in the second transparent electrode layer, such as, can be 1:25 etc.
For dot structure, memory capacitance just affects a factor of display effect, and the factor also having an outbalance is exactly light transmission rate.Dot structure provided by the invention effectively can reduce memory capacitance under guarantee does not affect the prerequisite of light transmission rate.Such as, when in the second transparent electrode layer, the width of strip shaped electric poles 6 is 2.5 μm, when spacing between two adjacent strip shaped electric poles 6 is 5.5 μm, in first transparent electrode layer, the quantity of slit is 1:3 (namely the position of every corresponding 3 strip shaped electric poles arranges a slit on the first transparent electrode layer) with the ratio of the quantity of strip shaped electric poles in the second transparent electrode layer, to the width of slit and strip electrode than be 67% structure and slit test respectively than the structure being 100% with the width of strip electrode, specifically see Fig. 6, when in slit in the first transparent electrode layer with the second transparent electrode layer, the width ratio of strip shaped electric poles is 67% or 100%, its light transmittance under different voltage and existing dot structure are consistent substantially, and dot structure provided by the invention can effectively reduce memory capacitance by arranging slit on the first transparent electrode layer, as shown in Figure 7, when slit is 67% with strip electrode width ratio, memory capacitance have dropped 2.7% compared to existing dot structure, when slit is 100% with strip electrode width ratio, memory capacitance have dropped 11.6%.The reduction of memory capacitance effectively can improve the charge efficiency of pixel, improves display quality.
It should be noted that, in the dot structure that embodiment of the present invention provides, first transparent electrode layer can be public electrode, also can be pixel electrode (being namely connected with the drain electrode of thin film transistor (TFT)), when the first transparent electrode layer is public electrode, second transparent electrode layer is that pixel electrode is when the first transparent electrode layer is pixel electrode, second transparent electrode layer is public electrode, in addition, the material of the first transparent electrode layer and the material of the second transparent electrode layer can be ITO (tin indium oxide), also can be other transparent conductive materials, the present invention is not specifically limited this.
In sum, embodiment of the present invention provides a kind of dot structure, this dot structure by forming slit on the first transparent electrode layer, and make slit be positioned at strip electrode at least partly to project on underlay substrate, effectively reduce the overlapping region of the first transparent electrode layer and the second transparent electrode layer, thus reduce the memory capacitance formed therebetween, improve the charge efficiency of pixel and the display quality of display device.
Embodiment of the present invention additionally provides a kind of array base palte, comprises above-mentioned dot structure.
In addition, embodiment of the present invention additionally provides a kind of display device, and this display device comprises above-mentioned array base palte.Wherein, this display device can be the display device of FFS mode, wherein, the display device that embodiment of the present invention provides can be any product or parts with Presentation Function such as note-book computer display screen, liquid crystal display, LCD TV, digital album (digital photo frame), mobile phone, panel computer.
Further, embodiment of the present invention provides a kind of method for making of dot structure, and the method comprises:
Underlay substrate is formed the first transparent electrode layer and the second transparent electrode layer, wherein, described second transparent electrode layer comprises multiple strip shaped electric poles, described first transparent electrode layer comprises at least one slit, and slit described in each is positioned at the projection of described strip shaped electric poles at described underlay substrate at least partly.
Preferably, when the first transparent electrode layer forms slit, each slit can be made all to be positioned at the projection of strip shaped electric poles at underlay substrate.Meanwhile, for slit described in each, the ratio of the width of its width strip shaped electric poles corresponding thereto can be 10% ~ 100%., such as, can be 67% or 100%.In order to reduce the memory capacitance that the first transparent electrode layer and the second transparent electrode layer are formed further, first transparent electrode layer can form multiple slit, and make the quantity of slit described in described first transparent electrode layer be 1:50 ~ 1:2 with the ratio of the quantity of strip shaped electric poles described in described second transparent electrode layer.
The method for making of pixel electrode provided by the invention, by forming slit and make this slit be positioned at the projection of strip electrode at underlay substrate on the first transparent electrode layer, efficiently reduce the area of the first transparent electrode layer and the second transparent electrode layer overlapping region, reduce the memory capacitance formed therebetween, improve display effect.
Above embodiment is only for illustration of the present invention; and be not limitation of the present invention; the those of ordinary skill of relevant technical field; without departing from the spirit and scope of the present invention; can also make a variety of changes and modification; therefore all equivalent technical schemes also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.
Claims (10)
1. a dot structure, the first transparent electrode layer comprising underlay substrate and be arranged on described underlay substrate and the second transparent electrode layer, described second transparent electrode layer comprises multiple strip shaped electric poles, it is characterized in that, described first transparent electrode layer comprises at least one slit, and slit described in each is positioned at the projection of described strip shaped electric poles at described underlay substrate at least partly.
2. dot structure as claimed in claim 1, it is characterized in that, slit described in each is all positioned at the projection of described strip shaped electric poles at described underlay substrate.
3. dot structure as claimed in claim 2, it is characterized in that, for slit described in each, the ratio of the width of its width strip shaped electric poles is corresponding thereto 10% ~ 100%.
4. the dot structure as described in as arbitrary in claim 1-3, it is characterized in that, the quantity of slit described in described first transparent electrode layer is 1:50 ~ 1:2 with the ratio of the quantity of strip shaped electric poles described in described second transparent electrode layer.
5. an array base palte, is characterized in that, comprise as arbitrary in claim 1-4 as described in dot structure.
6. a display device, is characterized in that, comprises array base palte as claimed in claim 5.
7. a method for making for dot structure, is characterized in that, comprising:
Underlay substrate is formed the first transparent electrode layer and the second transparent electrode layer, wherein, described second transparent electrode layer comprises multiple strip shaped electric poles, described first transparent electrode layer comprises at least one slit, and slit described in each is positioned at the projection of described strip shaped electric poles at described underlay substrate at least partly.
8. method for making as claimed in claim 7, it is characterized in that, slit described in each is all positioned at the projection of described strip shaped electric poles at described underlay substrate.
9. method for making as claimed in claim 8, it is characterized in that, for slit described in each, the ratio of the width of its width strip shaped electric poles is corresponding thereto 10% ~ 100%.
10. the method for making as described in as arbitrary in claim 7-9, it is characterized in that, the quantity of slit described in described first transparent electrode layer is 1:50 ~ 1:2 with the ratio of the quantity of strip shaped electric poles described in described second transparent electrode layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610064421.XA CN105487311A (en) | 2016-01-29 | 2016-01-29 | Pixel structure and making method thereof, array substrate and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610064421.XA CN105487311A (en) | 2016-01-29 | 2016-01-29 | Pixel structure and making method thereof, array substrate and display device |
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| CN105487311A true CN105487311A (en) | 2016-04-13 |
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| CN201610064421.XA Pending CN105487311A (en) | 2016-01-29 | 2016-01-29 | Pixel structure and making method thereof, array substrate and display device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108508661A (en) * | 2017-02-24 | 2018-09-07 | 三菱电机株式会社 | Liquid crystal display panel and liquid crystal display device |
| CN110441965A (en) * | 2019-08-23 | 2019-11-12 | 京东方科技集团股份有限公司 | A kind of array substrate, display panel and display device |
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| CN103676353A (en) * | 2013-12-04 | 2014-03-26 | 京东方科技集团股份有限公司 | Pixel structure, array substrate and display device |
| US20150014694A1 (en) * | 2013-07-02 | 2015-01-15 | Boe Technology Group Co., Ltd. | Pixel Structure, Array Substrate and Display Device |
| CN105137681A (en) * | 2015-10-22 | 2015-12-09 | 重庆京东方光电科技有限公司 | Array substrate as well as manufacturing method and display device thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2009181091A (en) * | 2008-02-01 | 2009-08-13 | Epson Imaging Devices Corp | Liquid crystal display device |
| CN102830557A (en) * | 2012-09-05 | 2012-12-19 | 京东方科技集团股份有限公司 | Array substrate and display device |
| US20150014694A1 (en) * | 2013-07-02 | 2015-01-15 | Boe Technology Group Co., Ltd. | Pixel Structure, Array Substrate and Display Device |
| CN203405655U (en) * | 2013-08-30 | 2014-01-22 | 京东方科技集团股份有限公司 | Array substrate and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108508661A (en) * | 2017-02-24 | 2018-09-07 | 三菱电机株式会社 | Liquid crystal display panel and liquid crystal display device |
| CN108508661B (en) * | 2017-02-24 | 2021-11-16 | 三菱电机株式会社 | Liquid crystal display panel and liquid crystal display device |
| CN110441965A (en) * | 2019-08-23 | 2019-11-12 | 京东方科技集团股份有限公司 | A kind of array substrate, display panel and display device |
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Application publication date: 20160413 |
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