CN105471261A - Buck single-phase voltage feedback transformation circuit compensation balance method and device - Google Patents

Abstract

The invention provides a buck single-phase voltage feedback transformation circuit compensation balance method and device. The method comprises the steps that a preset first code is performed, and the type of the compensator in a BUCK circuit is determined, wherein the first code is a code realized based on MATLAB; a preset second code is judged and performed according to the type of the compensator, and the capacitance resistance value of the compensator is determined, wherein the second code is a code realized based on MATLAB; and a preset third code is performed, the Bert diagram and the phase diagram of the BUCK circuit are drawn according to the capacitance resistance value of the compensator, and the capacitance resistance value of the compensator is adjusted according to the Bert diagram and the phase diagram so that the BUCK circuit is enabled to meet the preset balance conditions, wherein the third code is a code realized based on MATLAB. According to the method, stable output of the BUCK circuit is realized through control of the codes realized based on MATLAB so that compatibility is great, generality is high and actual hardware development time and difficulty can be saved.

Description

Compensation balance method and device for buck single-phase voltage feedback conversion circuit

Technical Field

The invention relates to a computer technology, in particular to a compensation balance method and device of a buck single-phase voltage feedback conversion circuit.

Background

The current circuit design carries out circuit simulation and debugging to a great extent through a series of simulation programs, and replaces the experiment which can be completed only by building a specific entity circuit in a corresponding hardware laboratory before, so that the actual hardware development time and difficulty are saved. In actual design and debugging, a type II (TypeII) compensation model (or compensator) and a type III (TypeIII) compensation model in a BUCK voltage feedback conversion (BUCK) circuit are combined with and use a corresponding simulation program to realize the design of the whole BUCK circuit so as to enable the BUCK circuit to meet the requirements of balance and stability. Specific BUCK circuits can be seen in fig. 1, type ii compensators can be seen in fig. 2, and type iii compensators can be seen in fig. 3. The BUCK circuit in fig. 1 includes the TypeII compensator in fig. 2, a driving modulation circuit and an LC filter output circuit, Vout of the output circuit is fed back to the driving modulation circuit, and the switching states of two MOS transistors below Vin are controlled by the driving modulation circuit to control the output of Vout, so that the BUCK circuit meets the requirements of balance and stability. In this process, the values of R1, R2, C1 and C2 in the TypeII compensator have a indivisible relationship with whether the BUCK circuit is stable. Of course, the type ii compensator in fig. 1 can also be replaced by the type iii compensator in fig. 3, and accordingly, the values of R1, R2, R3, C1, C2 and C3 in the type iii compensator also have a indivisible relationship with whether the BUCK circuit is stable.

In the prior art, a power supply chip manufacturer of the BUCK circuit usually provides a corresponding website online simulation program to calculate a capacitance resistance value in the type ii or type iii compensator, and the BUCK circuit achieves the purpose of stable output by controlling the capacitance resistance value in the type ii or type iii compensator.

However, in the prior art, websites of various home appliance source chip manufacturers provide respective online simulation programs, which can only simulate their own products, but cannot simulate non-home products well, and the universality is poor.

Disclosure of Invention

The invention provides a compensation balance method and device of a BUCK single-phase voltage feedback conversion circuit, which are used for solving the technical problem that the output stability of a BUCK circuit adopting BUCK power chips provided by other power chip factories cannot be controlled due to poor universality of the BUCK power chips in the prior art.

In a first aspect, the present invention provides a compensation balancing method for a buck single-phase voltage feedback conversion circuit, including:

executing a preset first code, and determining the type of a compensator in the BUCK single-phase voltage feedback conversion BUCK circuit; the first code is realized based on MATLAB of a matrix laboratory, and comprises circuit parameters of the BUCK circuit;

judging and executing a preset second code according to the type of the compensator, and determining the capacitance resistance value of the compensator; wherein the second code is a code based on a MATLAB implementation;

executing a preset third code, drawing a burt diagram and a phase diagram of the BUCK circuit according to the capacitance resistance value of the compensator, and adjusting the capacitance resistance value of the compensator according to the burt diagram and the phase diagram so that the BUCK circuit meets a preset balance condition; wherein the third code is code implemented based on the MATLAB.

With reference to the first aspect, in a first possible implementation manner of the first aspect, the executing a preset first code to determine a compensator type in the BUCK circuit specifically includes:

executing the first code to obtain a zero point and a pole of an output LC circuit in the BUCK circuit; and determining the type of the compensator according to the output LC zero point, the output LC pole and the current crossing frequency of the BUCK circuit.

With reference to the first possible implementation manner of the first aspect, in a second possible implementation manner of the first aspect, the determining to execute a preset second code according to the type of the compensator specifically includes:

if the compensator is a type TypeII compensator, judging to execute a first sub-code in the second code; wherein the first sub-code is used to calculate a capacitance resistance value in the TypeII compensator;

if the compensator is a TypeIII compensator, judging to execute a second sub-code in the second code; wherein the second sub-code is for calculating a capacitance resistance value in the TypeIII compensator.

With reference to the second possible implementation manner of the first aspect, in a third possible implementation manner of the first aspect, the executing a preset third code, and drawing a bert graph and a phase graph of the BUCK circuit according to a capacitance resistance value of the compensator specifically includes:

if the compensator is a TypeII compensator, executing a third sub-code in the third code to draw a Boolean diagram and a phase diagram of the BUCK circuit of the TypeII compensator type; wherein the Booth diagram and phase diagram of the BUCK circuit of the TypeII compensator type comprises: a bert graph and a phase graph of a total gain of the BUCK circuit of the type ii compensator, a bert graph and a phase graph of a compensation gain of the type ii compensator, a bert graph and a phase graph of an open-loop filter gain of the BUCK circuit of the type ii compensator, a bert graph and a phase graph of a gain of an internal amplifier of a BUCK power chip of the BUCK circuit of the type ii compensator, and the third sub-code includes a capacitance resistance value of the type ii compensator;

if the compensator is a TypeIII compensator, executing a fourth sub-code in the third code to draw a Boolean diagram and a phase diagram of the BUCK circuit of the TypeIII compensator type; wherein the Booth diagram and phase diagram of the BUCK circuit of the TypeIII compensator type comprises: the Boolean diagram and the phase diagram of the total gain of the BUCK circuit of the TypeIII compensator type, the Boolean diagram and the phase diagram of the compensation gain of the TypeIII compensator type, the Boolean diagram and the phase diagram of the open-loop filter gain of the BUCK circuit of the TypeIII compensator type, the Boolean diagram and the phase diagram of the internal amplifier gain of the BUCK power supply chip of the BUCK circuit of the TypeIII compensator type, and the fourth subcode comprises a capacitance resistance value of the TypeIII compensator.

In a second aspect, the present invention provides a compensation balancing device for a buck single-phase voltage feedback conversion circuit, including:

the first determining module is used for executing a preset first code and determining the type of a compensator in the BUCK single-phase voltage feedback conversion BUCK circuit; the first code is realized based on MATLAB of a matrix laboratory, and comprises circuit parameters of the BUCK circuit;

the second determining module is used for judging and executing a preset second code according to the type of the compensator determined by the first determining module and determining the capacitance resistance value of the compensator; wherein the second code is a code based on a MATLAB implementation;

the drawing and adjusting module is used for executing a preset third code, drawing a burt diagram and a phase diagram of the BUCK circuit according to the capacitance resistance value of the compensator determined by the second determining module, and adjusting the capacitance resistance value of the compensator according to the burt diagram and the phase diagram so that the BUCK circuit meets a preset balance condition; wherein the third code is code implemented based on the MATLAB.

With reference to the second aspect, in a first possible implementation manner of the second aspect, the first determining module specifically includes:

the execution acquisition unit is used for executing the first code and acquiring a zero point and a pole of an output LC circuit in the BUCK circuit;

and the determining unit is used for determining the type of the compensator according to the zero, the pole and the current crossing frequency of the BUCK circuit acquired by the execution acquiring unit.

With reference to the first possible implementation manner of the second aspect, in a second possible implementation manner of the second aspect, the second determining module includes a first determining unit and a second determining unit; wherein,

the first determining unit is configured to determine to execute a first sub-code in the second code if the first determining module determines that the compensator is a type TypeII compensator; wherein the first sub-code is used to calculate a capacitance resistance value in the TypeII compensator;

the second determining unit is configured to determine to execute a second sub-code in the second code if the first determining module determines that the compensator is a TypeIII compensator; wherein the second sub-code is for calculating a capacitance resistance value in the TypeIII compensator.

With reference to the second possible implementation manner of the second aspect, in a third possible implementation manner of the second aspect, the rendering adjustment module includes a first rendering adjustment unit and a second rendering adjustment unit; wherein,

the first drawing and adjusting unit is configured to execute a third sub-code in the third code to draw a bert graph and a phase graph of a BUCK circuit of the type of the TypeII compensator if the first determining module determines that the compensator is the TypeII compensator; wherein the Booth diagram and phase diagram of the BUCK circuit of the TypeII compensator type comprises: a bert graph and a phase graph of a total gain of the BUCK circuit of the type of the TypeII compensator, a bert graph and a phase graph of a compensation gain of the TypeII compensator, a bert graph and a phase graph of an open-loop filter gain of the BUCK circuit of the type of the TypeII compensator, and a bert graph and a phase graph of a gain of an internal amplifier of a BUCK power chip of the BUCK circuit of the type of the TypeII compensator, wherein the third sub-code includes the capacitance resistance value of the TypeII compensator determined by the first determining unit;

the second drawing and adjusting unit is configured to execute a fourth sub-code in the third code to draw a bert graph and a phase graph of a BUCK circuit of the type of the TypeIII compensator if the first determining module determines that the compensator is the TypeIII compensator; wherein the Booth diagram and phase diagram of the BUCK circuit of the TypeIII compensator type comprises: the bode diagram and the phase diagram of the total gain of the BUCK circuit of the TypeIII compensator type, the bode diagram and the phase diagram of the compensation gain of the TypeIII compensator type, the bode diagram and the phase diagram of the gain of the open-loop filter of the BUCK circuit of the TypeIII compensator type, and the bode diagram and the phase diagram of the gain of the internal amplifier of the BUCK power supply chip of the BUCK circuit of the TypeIII compensator type, wherein the fourth subcode comprises the capacitance resistance value of the TypeIII compensator determined by the second determining unit.

According to the compensation balance method and device for the BUCK single-phase voltage feedback conversion circuit, the computer executes the preset first code realized based on MATLAB, and the type of the compensator in the BUCK circuit is determined; judging and executing second codes realized based on MATLAB according to the type of the compensator so as to determine the capacitance resistance value of the compensator; and finally, executing a third code through a computer, drawing a burt diagram and a phase diagram of the BUCK circuit according to the determined capacitance resistance value, and adjusting the capacitance resistance value of the compensator according to the burt diagram and the phase diagram so that the BUCK circuit meets a preset balance condition. According to the method provided by the embodiment of the invention, the BUCK circuit of the single-phase voltage feedback BUCK power supply chip provided by any power supply chip manufacturer can be simulated by using the code realized on the basis of MATLAB, and the stable output of the BUCK circuit is controlled, so that the compatibility is good, the universality is strong, and the actual hardware development time and difficulty are saved.

Drawings

FIG. 1 is a schematic structural diagram of a BUCK circuit provided by the present invention;

FIG. 2 is a schematic structural diagram of a TypeII compensator provided by the present invention;

FIG. 3 is a schematic structural diagram of a TypeIII compensator provided by the present invention;

FIG. 4 is a schematic flowchart of a first embodiment of a compensation balancing method for the buck single-phase voltage feedback conversion circuit according to the present invention;

FIG. 5 is a Biter diagram and a phase diagram of the buck single-phase voltage feedback converting circuit provided by the present invention;

fig. 6 is a schematic structural diagram of a first compensation balancing device of the buck single-phase voltage feedback conversion circuit according to the present invention;

fig. 7 is a schematic structural diagram of a second embodiment of the compensation balancing device of the buck single-phase voltage feedback conversion circuit according to the present invention.

Description of reference numerals:

20: a drive modulation circuit; 21: an LC filter output circuit; 22: a type II compensator.

Detailed Description

Fig. 4 is a schematic flowchart of a first embodiment of a compensation balancing method for the buck single-phase voltage feedback conversion circuit according to the present invention. The method is applicable to this type of BUCK power chip circuit. The execution subject of the method may be a computer. As shown in fig. 4, the method includes:

s101: the computer executes a preset first code and determines the type of a compensator in the BUCK circuit; the first code is a code implemented based on a matrix laboratory (MATLAB), and the first code includes circuit parameters of the BUCK circuit.

Specifically, the computer executes a first preset code implemented based on MATLAB to determine the type of compensator in the BUCK circuit. The first code can be input into MATLAB software of a computer by developers and developers, and can also be loaded by the computer. The first code may include circuit parameters related to the BUCK circuit, and the size of the circuit parameters may be determined by design requirements of the BUCK circuit and a power chip selected in the BUCK circuit. The circuit parameters may include: the input voltage Vin, the output voltage Vout, the internal triangular peak-peak voltage Vosc of the Buck power chip, the switching frequency Fsw, the GAIN of the internal amplifier of the Buck power chip, the GAIN bandwidth product (GBWP) of the internal amplifier of the Buck power chip, the total output capacitor Cout, the total output capacitor parasitic resistance ESR, the output inductor Lout, the output inductor dc resistance DCR, the design bandwidth (the crossing frequency of the Buck circuit) Fco, and the reference voltage Vref, and the values of these circuit parameters can be manually input by research personnel. The first code may further include a preset condition or a preset formula or the like for determining the type of the compensator, and the computer may determine the type of the compensator in the BUCK circuit by executing the first code.

S102: the computer judges and executes a preset second code according to the type of the compensator, and determines the capacitance resistance value of the compensator; and the second code is realized based on MATLAB.

Specifically, the types of codes executed by the computer to determine the capacitance resistance values of the compensators are different for different types of compensators, i.e., the codes executed by the computer to determine the capacitance resistance values of the compensators are determined by the type of the compensator determined in S101. The second code is code based on a MATLAB implementation. Moreover, the types of compensators are different, so that the capacitance and resistance values used in the compensators are also different, and even the number of the used capacitance and resistance values is different (different compensators are different in circuit design), for example, referring to fig. 2 and 3, the type ii compensator shown in fig. 2 needs the capacitance and resistance values of R1, R2, C1 and C2; the required capacitance resistances of the TypeIII compensator shown in fig. 3 are R1, R2, R3, C1, C2 and C3, respectively.

S103: the computer executes a preset third code, draws a burt diagram and a phase diagram of the BUCK circuit according to the capacitance resistance value of the compensator, and adjusts the capacitance resistance value of the compensator according to the burt diagram and the phase diagram so that the BUCK circuit meets a preset balance condition; wherein the third code is a code based on a MATLAB implementation.

Specifically, the computer executes a preset third code, that is, a burt diagram and a phase diagram (see fig. 5) of the BUCK circuit are drawn according to the capacitance resistance value in the compensator and the listed circuit parameters, wherein the burt diagram includes a total system GAIN burt diagram of the BUCK circuit and an open-loop filter GAIN (GAIN)_openloop) Bert plot, GAIN of compensator (GAIN)_TypeIIOr GAIN_TypeIII) A bobtit diagram and a gain bobtit diagram of the internal amplifier (limited by the gain-bandwidth product) of the BUCK power chip in the BUCK circuit. Wherein, the total system gain of the BUCK circuit is equal to the logarithmic sum of the gain of the open-loop filter and the compensation gain, and the gain of an amplifier inside the BUCK power supply chip can not be exceeded. The open-loop filter gain can be calculated from the following equation 1 and the circuit parameter in the first code, and the compensation gain of the compensator can be calculated from the following equation 2 or equation 3 and the circuit parameter in the first code. The open loop filter gain may be calculated as: ${\mathrm{GAIN}}_{\mathrm{openloop}}=\frac{V_{\mathrm{in}}}{V_{\mathrm{osc}}}\·\frac{1+s\·\mathrm{ESR}\·C_{\mathrm{out}}}{1+s\·(\mathrm{ESR}+\mathrm{DCR})\·C_{\mathrm{out}}+s^2\·L_{\mathrm{out}}\·C_{\mathrm{out}}}$ (formula 1) wherein GAIN_openloopFor open loop filter gain, V_inIs the input voltage, V, of the BUCK circuit_oscThe peak voltage of a triangular wave crest inside the Buck power supply chip, ESR is the parasitic resistance of the total output capacitance of the BUCK circuit, C_outIs the total output capacitance of the BUCK circuit, and the DCR is the output inductance DC resistance, L of the BUCK circuit_outThe output inductor of the BUCK circuit; the calculation formula of the compensation gain of the compensator may be:(formula 2) wherein GAIN_TypeIIIs the gain of a TypeII compensator, R₁、R₂、C₁、C₂Is the value of the capacitance resistance in the TypeII compensator; the calculation formula of the compensation gain of the compensator can also be ${\mathrm{GAIN}}_{\mathrm{TypeIII}}=\frac{R_1+R_3}{R_1\·R_3\·C_1}\·\frac{(s+\frac{1}{R_2\·C_2})\·(s+\frac{1}{(R_1+R_3)\·C_3})}{s\·(s+\frac{C_1+C_2}{R_2\·C_1\·C_2})\·(s+\frac{1}{R_3\·C_3})}$ (formula 3) wherein GAIN_TypeIIIIs the gain of the TypeIII compensator, R₁、R₂、R₃、C₁、C₂、C₃Is the value of the capacitance resistance in the TypeIII compensator; s in the above equations 1, 2 and 3 is a complex frequency.

After the computer draws the burt diagram and the phase diagram according to the capacitance resistance value in the compensator, research personnel can judge whether the whole BUCK circuit reaches a preset balance condition according to the two diagrams, namely whether the output of the BUCK circuit is stable; when a research and development staff judges that the output of the BUCK circuit is unstable (for example, the phase margin is not enough, the output end generates an oscillation Ring Ring and other unstable phenomena), the research and development staff adjusts the capacitance resistance value in the compensator through a computer until the output of the whole BUCK circuit reaches a stable condition.

The code realized based on MATLAB is simple in program setting and strong in readability, can simulate the BUCK circuit of the BUCK power supply chip using a single-phase voltage feedback type provided by any power supply chip manufacturer and control stable output of the BUCK circuit, is good in compatibility and universality, and saves actual hardware development time and debugging difficulty.

According to the compensation balance method of the BUCK single-phase voltage feedback conversion circuit, the computer executes the preset first code realized based on MATLAB, and the type of the compensator in the BUCK circuit is determined; judging and executing second codes realized based on MATLAB according to the type of the compensator so as to determine the capacitance resistance value of the compensator; and finally, executing a third code through a computer, drawing a burt diagram and a phase diagram of the BUCK circuit according to the determined capacitance resistance value, and adjusting the capacitance resistance value of the compensator according to the burt diagram and the phase diagram so that the BUCK circuit meets a preset balance condition. According to the method provided by the embodiment of the invention, the BUCK circuit of the single-phase voltage feedback BUCK power supply chip provided by any power supply chip manufacturer can be simulated by using the code realized on the basis of MATLAB, and the stable output of the BUCK circuit is controlled, so that the compatibility is good, the universality is strong, and the actual hardware development time and difficulty are saved.

On the basis of the foregoing embodiment, as a first possible implementation manner of the embodiment of the present invention, the method related to this embodiment is a specific process in which a computer executes a first code to determine the compensator type, that is, the foregoing S101 specifically includes: executing the first code by the computer to obtain a zero point and a pole of an output LC circuit in the BUCK circuit; and determining the type of the compensator according to the zero point and the pole and the current crossing frequency of the BUCK circuit.

Specifically, the first code may include circuit parameters related to the BUCK circuit, and may further include formulas for calculating a zero and a pole of the BUCK circuit. The circuit parameters may include: the circuit comprises an input voltage Vin, an output voltage Vout, a Buck power chip internal triangular peak-peak voltage Vosc, a switching frequency Fsw, a Buck power chip internal amplifier GAIN GAIN, a Buck power chip internal amplifier GBWP, a total output capacitor Cout, a total output capacitor parasitic resistor ESR, an output inductor Lout, an output inductor direct current resistor DCR, a design bandwidth (ride-through frequency of a BUCK circuit) Fco and a reference voltage Vref. The pole calculation formula for the circuit open loop LC may be:(formula 4) of the reaction mixture,wherein L is_outIs the output inductance, C, of the BUCK circuit_outThe total output capacitance of the BUCK circuit; the zero calculation formula of the circuit open loop LC may be:(equation 5), where ESR is the total output capacitance parasitic resistance of the BUCK circuit, C_outIs the total output capacitance of the BUCK circuit. It should be noted that, according to the sampling theorem, the crossing frequency Fco (i.e. the system bandwidth) of the BUCK power chip in the voltage feedback mode must be smaller than the switching frequency F_sw1/2 times of (1), and the general empirical value is 0.1 x F_swTo 0.2 x F_sw(ii) a Otherwise there may be a large ripple or ringing Ring in the output.

The computer can determine the pole and the zero of the output LC circuit of the BUCK circuit according to the circuit parameters (voltage unit volt V, capacitance unit Faraday F, resistance unit ohm, inductance unit Hunter H, frequency unit Hz, gain unit decibel dB and the like are not displayed in codes), formula 4 and formula 5; and comparing the calculated poles and zeros of the output LC circuit with the crossover frequency (or bandwidth) of the circuit parameter to determine the type of compensator. When F is present_LC<F_ESR<F_co<F_swAt/2, the computer determines the compensator type as a type TypeII compensator. When F is_co<F_ESRThe computer then determines the type of compensator to be a type TypeIII compensator. Generally, according to engineering experience, the compensation mode can be determined only by judging the sizes of Fesr and Fco.

The first code is specifically:

vin is 12; % "inputs determine circuit parameters, where the numerical values are exemplary, the same applies below"

Vout is 3.3; % output voltage "

Vosc 1.5; % triangular wave voltage "

Fsw-300 e 3; % "switching frequency"

Fco 100e 3; % of the "crossover frequency, i.e. the bandwidth, is typically 0.1Fsw-0.3 Fsw"

Cout 990 e-6; % "total capacitance of output filter"

ESR ═ 0.005; % total capacitance parasitic resistance "

Lout is 0.9 e-6; % "output inductance"

DCR ═ 0.003; % inductance direct current resistance "

GAIN 88; % "Amplifier gain dB unit"

GBWP ═ 1e 6; % "gain-bandwidth product"

Flc ═ 1/(2 × pi — (sqrt (Lout × Cout))); fesr ═ 1/(2 ═ pi · Cout · ESR); % "calculating LC output zero and pole, pi is pi constant"

Min(Fesr,Fco)

1.3e 4% "comparing the magnitude of Fco and Fesr, outputting the smaller of the displayed values to determine which compensation to try"

On the basis of the above embodiment, as a second possible implementation manner of the embodiment of the present invention, the embodiment relates to a method that the computer determines that the compensator type of the BUCK circuit is a TypeII compensator after executing the first code, and the computer executes the first sub-code in the second code to determine the capacitance resistance value in the compensator. That is, S102 specifically includes: if the compensator is a TypeII compensator, the computer judges and executes a first sub-code in the second code; wherein the first sub-code is used for the computer to calculate a capacitance resistance value in the TypeII compensator.

Specifically, if the computer determines that the compensator in the BUCK circuit is a type ii compensator after executing the first code, the computer executes the first sub-code in the preset second code to obtain the capacitance resistance value in the type ii compensator, that is, to obtain the values of R1, R2, C1, and C2 of the type ii compensator shown in fig. 2. AGenerally, R1 is a compensation resistor selected by research personnel, and the value of R1 is generally between 2K and 5K; the formula for R2 may be:(formula 6) in which F_ESRZero point of open-loop LC for circuit, F_LCFor the poles of the open-loop LC of the circuit, F_coTo pass through frequency, V_inIs the input voltage, V, of the BUCK circuit_oscThe value of R2 is related to R1 for the Buck power chip internal triangular peak-to-peak voltage, and R2 is calculated here to be the ideal value R2 for R2 in practice; the formula for C2 may be:(equation 7) where the value of C2 is related to R2, where the calculated value of C2 is actually the ideal value of C2 for C2, and Fz is the zero frequency of compensation, F_z＝0.1*F_LC(the TypeII compensator compensates a zero and a pole, so that the output of the BUCK circuit is more stable); the formula for C1 may be:(equation 8) where the value of C1 is related to C2, where the calculated value of C1 is actually the ideal value of C1 for C1, and Fp is the frequency of the pole of compensation, F_p＝0.5*F_sw，F_swIs the switching frequency.

The first sub-code may specifically be: (this part of the code is input and executed in parallel)

R1 ═ 4.12e 3; % of the compensating resistors, R1 generally being chosen between 2K and 5K "

R2 ═ Fesr ═ fsc · Vosc · R1/(Flc · Flc Fesr · Vin)% "ideal value R2 of R2 obtained after the computer executed the instruction"

R2 ═ input ('please refer to calculated value R2, input selected R2:'); % "the computer or the developer adjusted R2 to the standard value closest to R2, i.e. the actual value of R2 in TypeII compensator"

C2 ═ 1/(2 × pi R2 × 0.1 × Flc)% "ideal value C2 of C2 obtained after the computer executes the instruction, and the compensation zero point Fz is selected at 0.1 × Flc"

C2 ═ input ('please refer to calculated value C2, input selected C2:'); % "computer or developer adjusted C2 to the standard value closest to C2, i.e., the actual value of C2 in TypeII compensator"

C1 ═ C2/(2 × pi 0.5 × Fsw R2 × C2-1)% "ideal value C1 of C1 obtained after the computer executes the instruction, compensation pole Fp is selected at 0.5"

C1 ═ input ('please refer to calculated value C1, input selected C1:')% 'computer or developer adjusted C1 to the standard value closest to C1, i.e. the actual value of C1 in TypeII compensator'

After the computer executes the first sub-code to determine the actual values of R1, R2, C1 and C2 in the TypeII compensator, the computer executes a third sub-code in a preset third code (the third sub-code includes the capacitance resistance value of the TypeII compensator), and draws a Bert chart and a phase chart of a BUCK circuit of the TypeII compensator type (similarly see FIG. 5) according to the determined values of R1, R2, C1 and C2 and by combining the formula 1 and the formula 2, wherein the compensator in the BUCK circuit is the TypeII compensator. Wherein, the Boolean diagram and the phase diagram of the BUCK circuit of the TypeII compensator type comprise: the bode diagram and the phase diagram of the total gain of the BUCK circuit of the TypeII compensator type, the bode diagram and the phase diagram of the compensation gain of the TypeII compensator type, the bode diagram and the phase diagram of the gain of the open-loop filter of the BUCK circuit of the TypeII compensator type, and the bode diagram and the phase diagram of the gain of the internal amplifier of the BUCK power supply chip of the BUCK circuit of the TypeII compensator type.

A research and development staff can judge whether the total gain and the phase margin of the BUCK circuit of the TypeII compensator type meet the stability requirement or not according to the Boolean diagram and the phase diagram of the BUCK circuit of the TypeII compensator type, namely whether the BUCK circuit of the TypeII compensator type meets the preset balance condition or not. The preset balance condition of the BUCK circuit of the TypeII compensator type is specifically as follows: keeping the total phase shift at the crossover frequency Fco below 360 deg., the phase margin is typically at least 45 deg. (i.e., the crossover frequency a point on the bert plot in fig. 5 is more than 45 deg. out of phase with 180 deg. to the phase corresponding to point B on the phase plot), at which frequency (i.e., the crossover frequency) the total loop gain is 1 (i.e., 0dB), the slope is-20 dB, and the compensation gain of the compensator cannot exceed the compensation capability (i.e., the limit of the gain-bandwidth product) of the internal amplifier of the BUCK power supply chip. When it is judged that the output of the BUCK circuit of the TypeII compensator type is unstable according to the bert graph and the phase diagram shown in fig. 5, a developer or a computer may adjust and re-verify the values of R1, R2, C1, and C2 described above according to fig. 5. If the TypeII compensator is still not sufficient to stabilize the BUCK circuit after several adjustments, a TypeIII compensator may be attempted.

The third sub-code specifically includes:

>>num＝(R1+R3)*Vin/R1/R3/C1/Vosc*conv([ESR*Cout,1],conv([1,1/R2/R2],[1,1/(R1+R3)/C3]))

>>den＝conv([1,0],conv([1,(C1+C2)/R2/C1/C2],conv([1,1/R3/C3],[Lout*Cout,(ESR+DCR)*Cout,1])))

>>g＝tf(num,den)；

>>margin(g)

gridon

holdon% "total gain bert plot for BUCK circuits of the type TypeII compensator"

>>num＝(R1+R3)/R1/R3/C1*conv([1,1/R2/C2],[1,1/(R1+R3)/C3])

>>den＝conv([1,0],conv([1,(C1+C2)/R2/C1/C2],[1,1/R3/C3]))

>>g＝tf(num,den)；

>>margin(g)

gridon

Holdon% "Compensation gain GAINtypeII bert plot of TypeII compensator"

>>num＝[Vin/Vosc*ESR*Cout,Vin/Vosc]

>>den＝[l0*Cout,(ESR+DCR)*Cout,1]

>>g＝tf(num,den)；

>>margin(g)

gridon

Holdon% "type of TypeII compensator type BUCK circuit open loop filter gain GAINopenloop bert diagram"

> > num [0,10^ (GAIN/20) ]% "GAIN-bandwidth product gainB"

>>den＝[10^(GAIN/20)/GBWP,1]

>>g＝tf(num,den)；

>>margin(g)

gridon

Botth diagram of the product of gain bandwidth of the amplifier inside a hardon% "BUCK power supply chip"

According to the compensation balance method of the BUCK single-phase voltage feedback conversion circuit, the computer executes the preset first code realized based on MATLAB, and the type of the compensator in the BUCK circuit is determined; judging and executing second codes realized based on MATLAB according to the type of the compensator so as to determine the capacitance resistance value of the compensator; and finally, executing a third code through a computer, drawing a burt diagram and a phase diagram of the BUCK circuit according to the determined capacitance resistance value, and adjusting the capacitance resistance value of the compensator according to the burt diagram and the phase diagram so that the BUCK circuit meets a preset balance condition. According to the method provided by the embodiment of the invention, the BUCK circuit of the BUCK power supply chip provided by any power supply chip manufacturer can be simulated by the code realized based on MATLAB, and the stable output of the BUCK circuit is controlled, so that the compatibility is good, the universality is strong, and the actual hardware development time and difficulty are saved.

On the basis of the above embodiment, as a third possible implementation manner of the embodiment of the present invention, the embodiment relates to a method that the computer determines that the compensator type of the BUCK circuit is a TypeIII compensator after executing the first code, and the computer executes the second sub-code in the second code to determine the capacitance resistance value in the compensator. That is, S102 specifically includes: if the compensator is a TypeIII compensator, the computer judges to execute a second sub-code in the second code; wherein the second sub-code is for the computer to calculate a capacitance resistance value in the TypeIII compensator.

Specifically, if the computer determines that the compensator in the current BUCK circuit is the TypeIII compensator after executing the first code, the computer executes a second sub-code in the preset second code to obtain the capacitance resistance value in the TypeIII compensator, that is, to obtain the values of R1, R2, R3, C1, C2, and C3 of the TypeIII compensator shown in fig. 3. Generally, R1 is a compensation resistor selected by research personnel, and the value of R1 is generally between 2K and 5K; the formula for R2 may be:(formula 9) in which F_LCFor the poles of the open-loop LC of the circuit, F_coTo pass through frequency, V_inIs the input voltage, V, of the BUCK circuit_oscThe value of R2 is related to R1 for the Buck power chip internal triangular peak-to-peak voltage, and R2 is calculated here to be the ideal value R2 for R2 in practice; the formula for C2 may be:(equation 10) in which the value of C2 is related to R2, the value of C2 calculated here is actually the ideal value of C2 for C2, andfor compensating the frequency of the first zero point, F(compensation zero or compensation pole is generally used in calculating the capacitance resistance in the compensator, so that the BUCK circuit can output stable signals); the formula for C1 may be:(equation 11) in which the value of C1 is related to C2, where the calculated value of C1 is actually the ideal value of C1 for C1, andfor compensating the frequency of the first pole, theThe formula for R3 can be(equation 12) in which the value of R3 is correlated with R1, the value of R3 calculated here is actually the ideal value R3 of R3, andin order to compensate for the frequency of the second pole,to compensate for the frequency of the second zero, theWherein, F_swIs the switching frequency; the formula for C3 may be(equation 13) where the value of C3 is related to R3, where the calculated value of C3 is actually the ideal value of C3, F for C3_swIs the switching frequency.

The second sub-code may be: (this part of the code is input and executed in parallel)

R1 ═ 4.12e 3; selecting a% compensation resistor; r1 is generally selected from 2K to 5K "

R2 ═ Fco Vosc R1/Flc/Vin% "ideal value R2 of R2 obtained after the computer executes the instruction"

R2 ═ input ('please refer to calculated value R2, input selected R2:'); % "the computer or the developer adjusted R2 to the standard value closest to R2, i.e. the actual value of R2 in TypeIII compensator"

C2/(2 × pi R2 × 0.5 × Flc)% "the ideal value C2 of C2 obtained after the computer executes the instruction, and the first compensation zero point Fz1 is selected at 0.5 × Flc"

C2 ═ input ('please refer to calculated value C2, input selected C2:'); % "computer or developer adjusted C2 to the standard value closest to C2, i.e., the actual value of C2 in TypeIII compensator"

C1/(2 pi Fesr R2C 2-1)% "ideal value C1 of C1 obtained after the computer executes the instruction, and first compensation pole Fp1 is selected at Fesr"

C1 ═ input ('please refer to calculated value C1, input selected C2:'); % "computer or developer adjusted C1 to the standard value closest to C1, i.e., the actual value of C1 in TypeIII compensator"

R3 ═ R1/(Fsw/2/Flc-1)% "ideal value R3 of R3 obtained after the computer executes the instruction, the second compensation pole Fp2 is selected at 0.5 Fsw, and the second compensation zero Fz2 is selected at Flc"

R3 ═ input ('please refer to calculated value R3, input selected R3:'); % "the computer or the developer adjusted R3 to the standard value closest to R3, i.e. the actual value of R3 in TypeIII compensator"

c3 ═ 1/pi/R3/Fsw% "ideal value c3 of R3 acquired after the computer executed the instruction"

C2 ═ input ('please refer to calculated value C2, input selected C2:'); % "computer or developer adjusted C3 to the standard value closest to C3, i.e., the actual value of C3 in TypeIII compensator"

After the computer executes the second sub-code to determine the actual values of R1, R2, R3, C1, C2 and C3 in the TypeIII compensator, the computer executes the fourth sub-code in the preset third code (the fourth sub-code includes the capacitance resistance value of the TypeIII compensator), and draws a BUCK circuit bert graph and a phase graph of the TypeIII compensator type according to the determined values of R1, R2, R3, C1, C2 and C3 and in combination with the above formula 1 and formula 3, see fig. 5, where the compensator in the BUCK circuit is the TypeIII compensator. Wherein the Booth diagram and the phase diagram of the BUCK circuit of the TypeIII compensator type comprise: the gain control circuit comprises a type III compensator type BUCK circuit, a type III compensator type BUCK circuit open loop filter, a type III compensator type BUCK circuit, a type power supply chip internal amplifier, a type III compensator type BUCK circuit, a.

The research and development personnel can judge whether the total gain and the phase margin of the BUCK circuit of the TypeIII compensator type meet the stability requirement or not according to the Boolean diagram and the phase diagram of the BUCK circuit of the TypeIII compensator type, namely whether the BUCK circuit of the TypeIII compensator type meets the preset balance condition or not. The preset balance condition of the BUCK circuit of the TypeIII compensator type is specifically as follows: keeping the total phase shift at the crossover frequency should be below 360 deg., the phase margin is typically at least 45 deg., at this frequency (i.e., the crossover frequency) the total loop gain is 1 (i.e., 0dB), the slope is-20 dB, and the compensation gain of the compensator cannot exceed the compensation capability of the internal amplifier of the BUCK power supply chip. When it is judged that the output of the BUCK circuit of the TypeIII compensator type is unstable according to the bert graph and the phase diagram shown in fig. 5, a developer or a computer may adjust and re-verify the values of R1, R2, R3, C1, C2, and C3 described above according to fig. 5.

The fourth sub-code may specifically be:

>>num＝(R1+R3)*Vin*Vin/Vout/R1/R3/C1/Vosc*conv([ESR*Cout,1],conv([1,1/R2/C2],[1,1/(R1+R3)/C3]))

>>den＝conv([1,0],conv([1,(C1+C2)/R2/C1/C2],conv([1,1/R3/C3],[Lout*Cout,(ESR+DCR)*c0,1])))

>>g＝tf(num,den)；

>>margin(g)

gridon

holdon% "total gain bert plot for BUCK circuits of the type TypeIII compensator"

>>num＝(R1+R3)/R1/R3/C1*conv([1,1/R2/C2],[1,1/(R1+R3)/C3])

>>den＝conv([1,0],conv([1,(C1+C2)/R2/C1/C2],[1,1/R3/R3]))

>>g＝tf(num,den)；

>>margin(g)

gridon

Holdon% "Compensation gain Bott diagram of TypeIII compensator"

>>num＝[Vin*Vosc*Vout/Vin*ESR*Vout,Vin*Vosc*Vout/Vin]

>>den＝[Lout*Cout,(ESR+DCR)*Cout,1]

>>g＝tf(num,den)；

"margin (g)%" BUCK circuit open-loop filter gain bert plot of type III compensator type "

> > num [0,10^ (GAIN/20) ]% amplifier, GAIN-bandwidth product GAIN unit dB

>>den＝[10^(GAIN/20)/GBWP,1]

>>g＝tf(num,den)；

>>margin(g)

gridon

Holdon% "BUCK power chip internal amplifier combines the bert diagram of its gain bandwidth product"

According to the compensation balance method of the BUCK single-phase voltage feedback conversion circuit, the computer executes the preset first code realized based on MATLAB, and the type of the compensator in the BUCK circuit is determined; judging and executing second codes realized based on MATLAB according to the type of the compensator so as to determine the capacitance resistance value of the compensator; and finally, executing a third code through a computer, drawing a burt diagram and a phase diagram of the BUCK circuit according to the determined capacitance resistance value, and adjusting the capacitance resistance value of the compensator according to the burt diagram and the phase diagram so that the BUCK circuit meets a preset balance condition. According to the method provided by the embodiment of the invention, the code realized based on MATLAB can simulate the BUCK circuit of the single-phase voltage feedback BUCK power supply chip provided by any power supply chip manufacturer and control the stable output of the BUCK circuit, so that the compatibility is good, the universality is strong, and the actual hardware development time and difficulty are saved.

Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.

Fig. 6 is a schematic structural diagram of a first embodiment of a compensation balancing device of the buck single-phase voltage feedback conversion circuit according to the present invention. The device can be a computer or integrated in the computer. As shown in fig. 6, the apparatus includes: a first determining module 10, a second determining module 11, and a rendering adjusting module 12. The first determining module 10 is configured to execute a preset first code, and determine a type of a compensator in the BUCK single-phase voltage feedback conversion BUCK circuit; the first code is realized based on MATLAB of a matrix laboratory, and comprises circuit parameters of the BUCK circuit; a second determining module 11, configured to determine to execute a preset second code according to the type of the compensator determined by the first determining module 10, and determine a capacitance resistance value of the compensator; wherein the second code is a code based on a MATLAB implementation; a drawing and adjusting module 12, configured to execute a preset third code, draw a bobert graph and a phase graph of the BUCK circuit according to the capacitance resistance value of the compensator determined by the second determining module 11, and adjust the capacitance resistance value of the compensator according to the bobert graph and the phase graph, so that the BUCK circuit meets a preset balance condition; wherein the third code is code implemented based on the MATLAB.

The compensation balancing device of the buck single-phase voltage feedback conversion circuit provided by the embodiment of the invention can implement the method embodiment, the implementation principle and the technical effect are similar, and the details are not repeated.

Fig. 7 is a schematic structural diagram of a second embodiment of the compensation balancing device of the buck single-phase voltage feedback conversion circuit according to the present invention, and based on the embodiment shown in fig. 6, the first determining module 10 specifically includes: an acquisition unit 101 and a determination unit 102 are executed. The execution acquisition unit 101 is configured to execute the first code, and acquire a zero point and a pole of an output LC circuit in the BUCK circuit; a determining unit 102, configured to determine a type of the compensator according to the zero, the pole, and the current crossing frequency of the BUCK circuit obtained by the executing and obtaining unit 101.

Further, with continued reference to fig. 7, the second determining module 11 may include a first determining unit 111 and a second determining unit 112; the first determining unit 111 is configured to determine to execute a first sub-code in the second code if the first determining module 10 determines that the compensator is a type TypeII compensator; wherein the first sub-code is used to calculate a capacitance resistance value in the TypeII compensator; the second determining unit 112 is configured to determine to execute a second sub-code in the second code if the first determining module 10 determines that the compensator is a TypeIII compensator; wherein the second sub-code is for calculating a capacitance resistance value in the TypeIII compensator.

Further, with continued reference to fig. 7, the rendering adjustment module 12 may include a first rendering adjustment unit 121 and a second rendering adjustment unit 122; the first drawing and adjusting unit 121 is configured to execute a third sub-code in the third code to draw a bert graph and a phase graph of a BUCK circuit of a type of the TypeII compensator if the first determining module 10 determines that the compensator is the TypeII compensator; wherein the Booth diagram and phase diagram of the BUCK circuit of the TypeII compensator type comprises: a bert graph and a phase graph of a total gain of the BUCK circuit of the type of the TypeII compensator, a bert graph and a phase graph of a compensation gain of the TypeII compensator, a bert graph and a phase graph of an open-loop filter gain of the BUCK circuit of the type of the TypeII compensator, and a bert graph and a phase graph of a gain of an internal amplifier of a BUCK power chip of the BUCK circuit of the type of the TypeII compensator, wherein the third sub-code includes the capacitance resistance value of the TypeII compensator determined by the first determining unit 111;

the second drawing adjustment unit 122 is configured to, if the first determining module 10 determines that the compensator is a TypeIII compensator, execute a fourth sub-code in the third code to draw a bert graph and a phase graph of a BUCK circuit of the TypeIII compensator type; wherein the Booth diagram and phase diagram of the BUCK circuit of the TypeIII compensator type comprises: a bode diagram and a phase diagram of a total gain of the BUCK circuit of the type of the TypeIII compensator, a bode diagram and a phase diagram of a compensation gain of the TypeIII compensator, a bode diagram and a phase diagram of an open-loop filter gain of the BUCK circuit of the type of the TypeIII compensator, a bode diagram and a phase diagram of a gain of an internal amplifier of a BUCK power chip of the BUCK circuit of the type of the TypeIII compensator, wherein the fourth sub-code includes the capacitance resistance value of the TypeIII compensator determined by the second determining unit 112.

The compensation balancing device of the buck single-phase voltage feedback conversion circuit provided by the embodiment of the invention can implement the method embodiment, the implementation principle and the technical effect are similar, and the details are not repeated.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (8)

1. A compensation balance method of a buck single-phase voltage feedback conversion circuit is characterized by comprising the following steps:

executing a preset first code, and determining the type of a compensator in the BUCK single-phase voltage feedback conversion BUCK circuit; the first code is realized based on MATLAB of a matrix laboratory, and comprises circuit parameters of the BUCK circuit;

judging and executing a preset second code according to the type of the compensator, and determining the capacitance resistance value of the compensator; wherein the second code is a code based on a MATLAB implementation;

executing a preset third code, drawing a burt diagram and a phase diagram of the BUCK circuit according to the capacitance resistance value of the compensator, and adjusting the capacitance resistance value of the compensator according to the burt diagram and the phase diagram so that the BUCK circuit meets a preset balance condition; wherein the third code is code implemented based on the MATLAB.

2. The method of claim 1, wherein the executing the preset first code to determine the compensator type in the BUCK circuit specifically comprises:

executing the first code to obtain a zero point and a pole of an output LC circuit in the BUCK circuit; and determining the type of the compensator according to the output LC zero point, the output LC pole and the current crossing frequency of the BUCK circuit.

3. The method according to claim 2, wherein the determining to execute the preset second code according to the type of the compensator specifically includes:

if the compensator is a type TypeII compensator, judging to execute a first sub-code in the second code; wherein the first sub-code is used to calculate a capacitance resistance value in the TypeII compensator;

if the compensator is a TypeIII compensator, judging to execute a second sub-code in the second code; wherein the second sub-code is for calculating a capacitance resistance value in the TypeIII compensator.

4. The method of claim 3, wherein the executing the preset third code to plot the bobert graph and the phase graph of the BUCK circuit according to the capacitance and resistance of the compensator comprises:

if the compensator is a TypeII compensator, executing a third sub-code in the third code to draw a Boolean diagram and a phase diagram of the BUCK circuit of the TypeII compensator type; wherein the Booth diagram and phase diagram of the BUCK circuit of the TypeII compensator type comprises: a bert graph and a phase graph of a total gain of the BUCK circuit of the type ii compensator, a bert graph and a phase graph of a compensation gain of the type ii compensator, a bert graph and a phase graph of an open-loop filter gain of the BUCK circuit of the type ii compensator, a bert graph and a phase graph of a gain of an internal amplifier of a BUCK power chip of the BUCK circuit of the type ii compensator, and the third sub-code includes a capacitance resistance value of the type ii compensator;

if the compensator is a TypeIII compensator, executing a fourth sub-code in the third code to draw a Boolean diagram and a phase diagram of the BUCK circuit of the TypeIII compensator type; wherein the Booth diagram and phase diagram of the BUCK circuit of the TypeIII compensator type comprises: the Boolean diagram and the phase diagram of the total gain of the BUCK circuit of the TypeIII compensator type, the Boolean diagram and the phase diagram of the compensation gain of the TypeIII compensator type, the Boolean diagram and the phase diagram of the open-loop filter gain of the BUCK circuit of the TypeIII compensator type, the Boolean diagram and the phase diagram of the internal amplifier gain of the BUCK power supply chip of the BUCK circuit of the TypeIII compensator type, and the fourth subcode comprises a capacitance resistance value of the TypeIII compensator.

5. A compensation balancing device of a buck single-phase voltage feedback conversion circuit is characterized by comprising:

the first determining module is used for executing a preset first code and determining the type of a compensator in the BUCK single-phase voltage feedback conversion BUCK circuit; the first code is realized based on MATLAB of a matrix laboratory, and comprises circuit parameters of the BUCK circuit;

the second determining module is used for judging and executing a preset second code according to the type of the compensator determined by the first determining module and determining the capacitance resistance value of the compensator; wherein the second code is a code based on a MATLAB implementation;

the drawing and adjusting module is used for executing a preset third code, drawing a burt diagram and a phase diagram of the BUCK circuit according to the capacitance resistance value of the compensator determined by the second determining module, and adjusting the capacitance resistance value of the compensator according to the burt diagram and the phase diagram so that the BUCK circuit meets a preset balance condition; wherein the third code is code implemented based on the MATLAB.

6. The apparatus according to claim 5, wherein the first determining module specifically includes:

the execution acquisition unit is used for executing the first code and acquiring a zero point and a pole of an output LC circuit in the BUCK circuit;

and the determining unit is used for determining the type of the compensator according to the zero, the pole and the current crossing frequency of the BUCK circuit acquired by the execution acquiring unit.

7. The apparatus of claim 6, wherein the second determining module comprises a first determining unit and a second determining unit; wherein,

the first determining unit is configured to determine to execute a first sub-code in the second code if the first determining module determines that the compensator is a type TypeII compensator; wherein the first sub-code is used to calculate a capacitance resistance value in the TypeII compensator;

the second determining unit is configured to determine to execute a second sub-code in the second code if the first determining module determines that the compensator is a TypeIII compensator; wherein the second sub-code is for calculating a capacitance resistance value in the TypeIII compensator.

8. The apparatus of claim 7, wherein the rendering adjustment module comprises a first rendering adjustment unit and a second rendering adjustment unit; wherein,

the first drawing and adjusting unit is configured to execute a third sub-code in the third code to draw a bert graph and a phase graph of a BUCK circuit of the type of the TypeII compensator if the first determining module determines that the compensator is the TypeII compensator; wherein the Booth diagram and phase diagram of the BUCK circuit of the TypeII compensator type comprises: a bert graph and a phase graph of a total gain of the BUCK circuit of the type of the TypeII compensator, a bert graph and a phase graph of a compensation gain of the TypeII compensator, a bert graph and a phase graph of an open-loop filter gain of the BUCK circuit of the type of the TypeII compensator, and a bert graph and a phase graph of a gain of an internal amplifier of a BUCK power chip of the BUCK circuit of the type of the TypeII compensator, wherein the third sub-code includes the capacitance resistance value of the TypeII compensator determined by the first determining unit;

the second drawing and adjusting unit is configured to execute a fourth sub-code in the third code to draw a bert graph and a phase graph of a BUCK circuit of the type of the TypeIII compensator if the first determining module determines that the compensator is the TypeIII compensator; wherein the Booth diagram and phase diagram of the BUCK circuit of the TypeIII compensator type comprises: the bode diagram and the phase diagram of the total gain of the BUCK circuit of the TypeIII compensator type, the bode diagram and the phase diagram of the compensation gain of the TypeIII compensator type, the bode diagram and the phase diagram of the gain of the open-loop filter of the BUCK circuit of the TypeIII compensator type, and the bode diagram and the phase diagram of the gain of the internal amplifier of the BUCK power supply chip of the BUCK circuit of the TypeIII compensator type, wherein the fourth subcode comprises the capacitance resistance value of the TypeIII compensator determined by the second determining unit.