CN105471261A - Buck single-phase voltage feedback transformation circuit compensation balance method and device - Google Patents
Buck single-phase voltage feedback transformation circuit compensation balance method and device Download PDFInfo
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- CN105471261A CN105471261A CN201410455461.8A CN201410455461A CN105471261A CN 105471261 A CN105471261 A CN 105471261A CN 201410455461 A CN201410455461 A CN 201410455461A CN 105471261 A CN105471261 A CN 105471261A
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Abstract
The invention provides a buck single-phase voltage feedback transformation circuit compensation balance method and device. The method comprises the steps that a preset first code is performed, and the type of the compensator in a BUCK circuit is determined, wherein the first code is a code realized based on MATLAB; a preset second code is judged and performed according to the type of the compensator, and the capacitance resistance value of the compensator is determined, wherein the second code is a code realized based on MATLAB; and a preset third code is performed, the Bert diagram and the phase diagram of the BUCK circuit are drawn according to the capacitance resistance value of the compensator, and the capacitance resistance value of the compensator is adjusted according to the Bert diagram and the phase diagram so that the BUCK circuit is enabled to meet the preset balance conditions, wherein the third code is a code realized based on MATLAB. According to the method, stable output of the BUCK circuit is realized through control of the codes realized based on MATLAB so that compatibility is great, generality is high and actual hardware development time and difficulty can be saved.
Description
Technical field
The present invention relates to computer technology, particularly relate to a kind of compensation balance method and apparatus of buck single-phase voltage feedback transformation circuit.
Background technology
Current circuit design, emulation and the debugging of being carried out circuit by a series of simulated program to a great extent, usually build the experiment that concrete entity circuit just can complete before instead of in corresponding hardware experiments room, thus save actual hardware development time and difficulty.Type II (TypeII) compensation model (or compensator) in buck Voltage Feedback conversion (BUCK) circuit and type-iii (TypeIII) compensation model are in the design and layout of reality, also be the corresponding simulated program of R. concomitans to realize the design of whole BUCK circuit, reach balance and stable requirement to make BUCK circuit.Concrete BUCK circuit can be shown in Figure 1, and TypeII compensator can be shown in Figure 2, and TypeIII compensator can be shown in Figure 3.BUCK circuit in Fig. 1 comprise Fig. 2 TypeII compensator, drive modulation circuit and LC filter output circuit, the Vout of output circuit feeds back to driving modulation circuit, by driving the output of the on off state control Vout of two metal-oxide-semiconductors below modulation circuit control Vin, reach balance and stable requirement to make BUCK circuit.In this process, the value of R1, R2, C1 and C2 in TypeII compensator has inseparable relation with whether BUCK circuit is stable.Certainly, the TypeII compensator in Fig. 1 can also be replaced with the TypeIII compensator in Fig. 3, and accordingly, whether the value of R1, R2, R3, C1, C2 and C3 in TypeIII compensator is also stable with BUCK circuit inseparable relation.
In prior art; the power supply chip manufacturer of BUCK circuit can provide corresponding website in-circuit emulation program usually; calculate the capacitance resistance value in TypeII or TypeIII compensator; by the capacitance resistance value in control TypeII or TypeIII compensator, BUCK circuit is made to reach the stable object exported.
But in prior art, the website of each source appliance chip manufacturer provides respective in-circuit emulation program, can only emulate the product of oneself, well can not emulate his family's product non-, versatility is poor.
Summary of the invention
The invention provides a kind of compensation balance method and apparatus of buck single-phase voltage feedback transformation circuit, in order to solve the technical problem of the BUCK circuit stable output of the BUCK power supply chip causing other power supply chip producers of uncontrollable employing to provide because of the poor universality of BUCK power supply chip in prior art.
First aspect, the invention provides a kind of compensation balance method of buck single-phase voltage feedback transformation circuit, comprising:
Perform the first code preset, determine the type of the compensator in described buck single-phase voltage feedback transformation BUCK circuit; Wherein, described first code is the code realized based on matrix labotstory MATLAB, and described first code comprises the circuit parameter of described BUCK circuit;
Judge to perform the second code preset according to the type of described compensator, determine the capacitance resistance value of described compensator; Wherein, described second code is the code realized based on MATLAB;
Perform the third generation code preset, Bert figure and the phase diagram of described BUCK circuit is drawn according to the capacitance resistance value of described compensator, and the capacitance resistance value of described compensator is adjusted according to described Bert figure and described phase diagram, meet to make described BUCK circuit and preset equilibrium condition; Wherein, described third generation code is the code realized based on described MATLAB.
In conjunction with first aspect, in the first possible execution mode of first aspect, the first code that described execution is preset, determine the compensator type in described BUCK circuit, specifically comprise:
Perform described first code, obtain the zeros and poles of the output lc circuit in described BUCK circuit; The cross-over frequency current according to described output LC zero point, described output LC limit and described BUCK circuit, determines the type of described compensator.
In conjunction with the first possible execution mode of first aspect, in the execution mode that the second of first aspect is possible, the described type according to described compensator judges to perform the second code preset, and specifically comprises:
If described compensator is type TypeII compensator, then judge to perform the F1 code in described second code; Wherein, described F1 code is for calculating the capacitance resistance value in described TypeII compensator;
If described compensator is TypeIII compensator, then judge to perform the second filial generation code in described second code; Wherein, described second filial generation code is for calculating the capacitance resistance value in described TypeIII compensator.
In conjunction with the execution mode that the second of first aspect is possible, in the third possible execution mode of first aspect, the third generation code that described execution is preset, draw Bert figure and the phase diagram of described BUCK circuit according to the capacitance resistance value of described compensator, specifically comprise:
If described compensator is TypeII compensator, then perform the F3 code in described third generation code, to draw Bert figure and the phase diagram of the BUCK circuit of described TypeII compensator type; Wherein, the Bert figure of the BUCK circuit of described TypeII compensator type and phase diagram, comprise: the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of the Bert figure of the BUCK circuit open loop filter gain of the Bert figure of the compensating gain of the Bert figure of the BUCK circuit overall gain of described TypeII compensator type and phase diagram, described TypeII compensator and phase diagram, described TypeII compensator type and phase diagram, described TypeII compensator type and phase diagram, described F3 code comprises the capacitance resistance value of described TypeII compensator;
If described compensator is TypeIII compensator, then perform the 4th subcode in described third generation code, to draw Bert figure and the phase diagram of the BUCK circuit of described TypeIII compensator type, wherein, the Bert figure of the BUCK circuit of described TypeIII compensator type and phase diagram, comprise: the Bert figure of the BUCK circuit overall gain of described TypeIII compensator type and phase diagram, the Bert figure of the compensating gain of described TypeIII compensator and phase diagram, the Bert figure of the BUCK circuit open loop filter gain of described TypeIII compensator type and phase diagram, the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of described TypeIII compensator type and phase diagram, described 4th subcode comprises the capacitance resistance value of described TypeIII compensator.
Second aspect, the invention provides a kind of compensation balance device of buck single-phase voltage feedback transformation circuit, comprising:
First determination module, for performing default first code, determines the type of the compensator in described buck single-phase voltage feedback transformation BUCK circuit; Wherein, described first code is the code realized based on matrix labotstory MATLAB, and described first code comprises the circuit parameter of described BUCK circuit;
Second determination module, the type for the described compensator determined according to described first determination module judges to perform the second code preset, and determines the capacitance resistance value of described compensator; Wherein, described second code is the code realized based on MATLAB;
Draw adjusting module, for performing default third generation code, the capacitance resistance value of the described compensator determined according to described second determination module draws Bert figure and the phase diagram of described BUCK circuit, and the capacitance resistance value of described compensator is adjusted according to described Bert figure and described phase diagram, meet to make described BUCK circuit and preset equilibrium condition; Wherein, described third generation code is the code realized based on described MATLAB.
In conjunction with second aspect, in the first possible execution mode of second aspect, described first determination module, specifically comprises:
Performing acquiring unit, for performing described first code, obtaining the zeros and poles of the output lc circuit in described BUCK circuit;
Determining unit, for the cross-over frequency that the described zero point obtained according to described execution acquiring unit, described limit and described BUCK circuit are current, determines the type of described compensator.
In conjunction with the first possible execution mode of second aspect, in the execution mode that the second of second aspect is possible, described second determination module, comprises the first determining unit and the second determining unit; Wherein,
Described first determining unit, if determine that described compensator is type TypeII compensator for described first determination module, then judges to perform the F1 code in described second code; Wherein, described F1 code is for calculating the capacitance resistance value in described TypeII compensator;
Described second determining unit, if determine that described compensator is TypeIII compensator for described first determination module, then judges to perform the second filial generation code in described second code; Wherein, described second filial generation code is for calculating the capacitance resistance value in described TypeIII compensator.
In conjunction with the execution mode that the second of second aspect is possible, in the third possible execution mode of second aspect, described drafting adjusting module, comprises the first drafting adjustment unit and second and draws adjustment unit; Wherein,
Described first draws adjustment unit, if determine that described compensator is TypeII compensator for described first determination module, then performs the F3 code in described third generation code, to draw Bert figure and the phase diagram of the BUCK circuit of described TypeII compensator type, wherein, the Bert figure of the BUCK circuit of described TypeII compensator type and phase diagram, comprise: the Bert figure of the BUCK circuit overall gain of described TypeII compensator type and phase diagram, the Bert figure of the compensating gain of described TypeII compensator and phase diagram, the Bert figure of the BUCK circuit open loop filter gain of described TypeII compensator type and phase diagram, the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of described TypeII compensator type and phase diagram, wherein, described F3 code comprises the capacitance resistance value of the described TypeII compensator that described first determining unit is determined,
Described second draws adjustment unit, if determine that described compensator is TypeIII compensator for described first determination module, then perform the 4th subcode in described third generation code, to draw Bert figure and the phase diagram of the BUCK circuit of described TypeIII compensator type, wherein, the Bert figure of the BUCK circuit of described TypeIII compensator type and phase diagram, comprise: the Bert figure of the BUCK circuit overall gain of described TypeIII compensator type and phase diagram, the Bert figure of the compensating gain of described TypeIII compensator and phase diagram, the Bert figure of the BUCK circuit open loop filter gain of described TypeIII compensator type and phase diagram, the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of described TypeIII compensator type and phase diagram, wherein, described 4th subcode comprises the capacitance resistance value of the described TypeIII compensator that described second determining unit is determined.
The compensation balance method and apparatus of the buck single-phase voltage feedback transformation circuit that the embodiment of the present invention provides, is performed the first code realized based on MATLAB preset, determines the type of the compensator in BUCK circuit by computer; And judge according to this compensator type to perform the second code realized based on MATLAB, to determine the capacitance resistance value of compensator; Perform third generation code finally by computer, according to determined capacitance resistance value to draw Bert figure and the phase diagram of BUCK circuit, and adjust the capacitance resistance value of compensator according to this Bert figure and phase diagram, meet to make BUCK circuit and preset equilibrium condition.The method that the embodiment of the present invention provides, the BUCK circuit of the single-phase voltage feedback BUCK power supply chip using arbitrary power supply chip producer to provide can be emulated by the code realized based on MATLAB, and control the output of this BUCK circuit stability, compatible good, highly versatile, saves actual hardware development time and difficulty.
Accompanying drawing explanation
Fig. 1 is the structural representation of BUCK circuit provided by the invention;
Fig. 2 is the structural representation of TypeII compensator provided by the invention;
Fig. 3 is the structural representation of TypeIII compensator provided by the invention;
Fig. 4 is the schematic flow sheet of the compensation balance embodiment of the method one of buck single-phase voltage feedback transformation circuit provided by the invention;
Fig. 5 is Bert figure and the phase diagram of buck single-phase voltage feedback transformation circuit provided by the invention;
Fig. 6 is the structural representation of the compensation balance device embodiment one of buck single-phase voltage feedback transformation circuit provided by the invention;
Fig. 7 is the structural representation of the compensation balance device embodiment two of buck single-phase voltage feedback transformation circuit provided by the invention.
Description of reference numerals:
20: drive modulation circuit; 21:LC filtering output circuit; 22: Type II compensator.
Embodiment
Fig. 4 is the schematic flow sheet of the compensation balance embodiment of the method one of buck single-phase voltage feedback transformation circuit provided by the invention.The method is applicable to the BUCK power supply chip circuit of this type.The executive agent of the method can be computer.As shown in Figure 4, the method comprises:
S101: computer performs the first code preset, and determines the type of the compensator in BUCK circuit; Wherein, described first code is the code realized based on matrix labotstory (MatrixLaboratory, hereinafter referred to as MATLAB), and described first code comprises the circuit parameter of described BUCK circuit.
Concrete, computer performs the first code realized based on MATLAB preset, to determine the type of the compensator in BUCK circuit.This first code can be that research staff is input in the MATLAB software of computer, can also be that computer self loads.Can comprise the circuit parameter that BUCK circuit is relevant in this first code, and the size of this circuit parameter can be determined by the power supply chip chosen in the designing requirement of this BUCK circuit and BUCK circuit.This circuit parameter can comprise: input voltage vin, output voltage Vout, Buck power supply chip inner triangular ripple P-to-P voltage Vosc, switching frequency Fsw, Buck power supply chip internal amplifier gain G AIN, gain bandwidth product (the GainBandwidthProduct of Buck power supply chip internal amplifier, hereinafter referred to as GBWP), total output capacitance Cout, total output capacitance dead resistance ESR, outputting inductance Lout, outputting inductance D.C. resistance DCR, design bandwidth (cross-over frequency of BUCK circuit) Fco, reference voltage Vref, the value of these circuit parameters manually can be inputted by research staff.This first code can also comprise determines the pre-conditioned of compensator type or preset formula etc., and computer can determine the type of the compensator in BUCK circuit by performing this first code.
S102: computer judges according to the type of this compensator to perform the second code preset, and determines the capacitance resistance value of above-mentioned compensator; Wherein, above-mentioned second code is the code realized based on MATLAB.
Concrete, dissimilar compensator, the type of code of the capacitance resistance value for determining compensator that computer performs also is not identical, i.e. during the capacitance resistance value of computer determination compensator, performed code is determined by the compensator type determined in S101.This second code is the code realized based on MATLAB.And, the type of compensator is different, the capacitance resistance value used in compensator is also just different, the capacitance-resistance number even used is not identical (different compensator also, not identical in circuit design) yet, for example, see the TypeII compensator shown in Fig. 2 and Fig. 3, Fig. 2, the capacitance resistance required for it is respectively R1, R2, C1 and C2; TypeIII compensator shown in Fig. 3, the capacitance resistance required for it is respectively R1, R2, R3, C1, C2 and C3.
S103: computer performs the third generation code preset, Bert figure and the phase diagram of BUCK circuit is drawn according to the capacitance resistance value of above-mentioned compensator, and the capacitance resistance value of above-mentioned compensator is adjusted according to described Bert figure and described phase diagram, meet to make described BUCK circuit and preset equilibrium condition; Wherein, third generation code is the code realized based on MATLAB.
Concrete, computer performs the third generation code preset, namely draw Bert figure and the phase diagram (see Fig. 5) of BUCK circuit according to the capacitance resistance value in above-mentioned compensator and above-mentioned listed circuit parameter, Bert figure comprises the total system gain Bert figure of BUCK circuit, open loop filter gain (GAIN
openloop) Bert figure, compensator gain (GAIN
typeIIor GAIN
typeIII) the gain Bert figure of BUCK power supply chip internal amplifier (limiting by gain bandwidth product) in Bert figure and BUCK circuit.Wherein, the overall system gain of BUCK circuit equal open loop filter gain and compensating gain logarithm and, and can not more than the gain of the amplifier of BUCK power supply chip inside.In addition, open loop filter gain can be obtained by the circuit parameter calculation in following formula 1 and above-mentioned first code, can being obtained by the circuit parameter calculation in following formula 2 or formula 3 and above-mentioned first code of the compensating gain of compensator.The computing formula of open loop filter gain can be:
(formula 1), wherein, GAIN
openloopfor open loop filter gain, V
infor the input voltage of BUCK circuit, V
oscfor Buck power supply chip inner triangular ripple P-to-P voltage, ESR is total output capacitance dead resistance of BUCK circuit, C
outfor total output capacitance of BUCK circuit, DCR is the outputting inductance D.C. resistance of BUCK circuit, L
outfor the outputting inductance of BUCK circuit; The computing formula of the compensating gain of compensator can be:
(formula 2), wherein, GAIN
typeIIfor the gain of TypeII compensator, R
1, R
2, C
1, C
2for the capacitance-resistance value in TypeII compensator; The computing formula of the compensating gain of compensator can also be
(formula 3), wherein, GAIN
typeIIIfor the gain of TypeIII compensator, R
1, R
2, R
3, C
1, C
2, C
3for the capacitance-resistance value in TypeIII compensator; S in above-mentioned formula 1, formula 2 and formula 3 is complex frequency.
After computer has drawn Bert figure and phase diagram according to the capacitance resistance value in above-mentioned compensator, can judge whether whole BUCK circuit reaches default equilibrium condition by research staff according to this two width figure, namely judge whether the output of this BUCK circuit stablizes; When research staff judges to export instability by BUCK circuit, (such as phase margin is inadequate, output produces the wild effects such as ring Ring of shaking), then research staff adjusts the capacitance resistance value in above-mentioned compensator by computer, till the output of whole BUCK circuit reaches stable condition.
All the codes realized based on MATLAB because above computer to reach performed in the process of balance at treatments B UCK circuit, and MATLAB is in algorithm development, data visualization, data analysis and control imitation aspect very advantageous, especially in Control System Imitation, analysis and design aspect is widely applied, therefore the code realized based on MATLAB provided by the invention, programming is simple, readable strong, the BUCK circuit of the BUCK power supply chip of the single-phase voltage feedback kind using arbitrary power supply chip producer to provide can be emulated, and control the output of this BUCK circuit stability, compatible good, highly versatile, save actual hardware development time and debugging difficulty.
The compensation balance method of the buck single-phase voltage feedback transformation circuit that the embodiment of the present invention provides, is performed the first code realized based on MATLAB preset, determines the type of the compensator in BUCK circuit by computer; And judge according to this compensator type to perform the second code realized based on MATLAB, to determine the capacitance resistance value of compensator; Perform third generation code finally by computer, according to determined capacitance resistance value to draw Bert figure and the phase diagram of BUCK circuit, and adjust the capacitance resistance value of compensator according to this Bert figure and phase diagram, meet to make BUCK circuit and preset equilibrium condition.The method that the embodiment of the present invention provides, the BUCK circuit of the single-phase voltage feedback BUCK power supply chip using arbitrary power supply chip producer to provide can be emulated by the code realized based on MATLAB, and control the output of this BUCK circuit stability, compatible good, highly versatile, saves actual hardware development time and difficulty.
On the basis of above-described embodiment, as the first possible execution mode of the embodiment of the present invention, the method that the present embodiment relates to is that computer performs first code to determine the detailed process of compensator type, namely above-mentioned S101 specifically comprises: computer performs described first code, obtains the zeros and poles of the output lc circuit in above-mentioned BUCK circuit; And according to the type of this zeros and poles and the current cross-over frequency determination compensator of described BUCK circuit.
Concrete, the circuit parameter that this BUCK circuit is relevant can be comprised in this first code, the formula of the zeros and poles calculating BUCK circuit can also be comprised.This circuit parameter can comprise: the GBWP of input voltage vin, output voltage Vout, Buck power supply chip inner triangular ripple P-to-P voltage Vosc, switching frequency Fsw, Buck power supply chip internal amplifier gain G AIN, Buck power supply chip internal amplifier, total output capacitance Cout, total output capacitance dead resistance ESR, outputting inductance Lout, outputting inductance D.C. resistance DCR, design bandwidth (cross-over frequency of BUCK circuit) Fco, reference voltage Vref.The limit computing formula of circuit open loop LC can be:
(formula 4), wherein, L
outfor the outputting inductance of above-mentioned BUCK circuit, C
outfor total output capacitance of above-mentioned BUCK circuit; The computing formula at zero point of circuit open loop LC can be:
(formula 5), wherein, ESR is total output capacitance dead resistance of BUCK circuit, C
outfor total output capacitance of above-mentioned BUCK circuit.It should be noted that, the BUCK power supply chip of Voltage Feedback pattern, according to sampling thheorem, cross-over frequency Fco (i.e. system bandwidth) must be less than switching frequency F
sw1/2 times, universal experience value gets 0.1*F
swto 0.2*F
sw; Otherwise larger ripple or ring Ring may be had in output.
Computer can according to foregoing circuit parameter (voltage unit volt V, unit of capacity farad F, unit of resistance ohm ohm, Henry Hunter H, cps hertz Hz, gain unit decibel dB etc. does not all show in code), formula 4 and formula 5, determine the pole and zero of the output lc circuit of BUCK circuit; And the pole and zero of output lc circuit that will calculate, compare with the cross-over frequency (or bandwidth) in foregoing circuit parameter, determine the type of compensator.Work as F
lC<F
eSR<F
co<F
swwhen/2, computer determination compensator type is TypeII type compensator.And work as F
co<F
eSRtime, the type of computer determination compensator is TypeIII type compensator.General according to engineering experience, only need judge which kind of compensation model is the size of Fesr and Fco can determine.
Above-mentioned first code is specially:
Vin=12; % " circuit parameter is determined in input, and numerical value is citing herein, lower same "
Vout=3.3; % " output voltage "
Vosc=1.5; % " triangle wave voltage "
Fsw=300e3; % " switching frequency "
Fco=100e3; % " cross-over frequency, that is to say bandwidth, is generally 0.1Fsw-0.3Fsw "
Cout=990e-6; % " output filtering total capacitance "
ESR=0.005; % " total capacitance dead resistance "
Lout=0.9e-6; % " outputting inductance "
DCR=0.003; % " inductance D.C. resistance "
GAIN=88; % " amplifier gain dB unit "
GBWP=1e6; % " gain bandwidth product "
Flc=1/ (2*pi* (sqrt (Lout*Cout))); Fesr=1/ (2*pi*Cout*ESR); % " calculate LC and export zeros and poles, pi is π constant "
Min(Fesr,Fco)
1.3e4% " compare Fco and Fesr size, the numerical value of output display is little that, decides which kind of is attempted and compensates "
On the basis of above-described embodiment, as the execution mode that the second of the embodiment of the present invention is possible, the method that the present embodiment relates to after execution first code, determines that the compensator type of BUCK circuit is TypeII compensator at computer, and the F1 code in computer execution second code is to determine the detailed process of the capacitance resistance value in compensator.That is, above-mentioned S102 specifically comprises: if above-mentioned compensator is TypeII compensator, then computer judges to perform the F1 code in second code; Wherein, this F1 code is used for the capacitance resistance value in TypeII compensator described in described computer calculate.
Concrete, if after computer performs above-mentioned first code, determine that the compensator in current BUCK circuit is TypeII compensator, then computer performs the F1 code in the second code preset, to obtain the capacitance resistance value in this TypeII compensator, namely obtain the value of R1, R2, C1 and C2 of the TypeII compensator shown in Fig. 2.General, R1 is the compensating resistance chosen by research staff, and the value of R1 is generally between 2K-5K; The computing formula of R2 can be:
(formula 6), wherein, F
eSRfor the zero point of circuit open loop LC, F
lCfor the limit of circuit open loop LC, F
cofor cross-over frequency, V
infor the input voltage of BUCK circuit, V
oscfor Buck power supply chip inner triangular ripple P-to-P voltage, the value of this R2 is relevant to R1, and that R2 calculated here is the ideal value r2 being actually R2; The computing formula of C2 can be:
(formula 7), wherein, the value of C2 is relevant to R2, and the value of C2 calculated here is actually the ideal value c2 of C2, and Fz is the zero frequency compensated, this F
z=0.1*F
lC(TypeII compensator adopt be a zero point of compensation and a limit, can make like this BUCK circuit export more stable); The computing formula of C1 can be:
(formula 8), wherein, the value of C1 is relevant to C2, and the value of C1 calculated here is actually the ideal value c1 of C1, and Fp is the frequency of the limit compensated, this F
p=0.5*F
sw, F
swfor switching frequency.
This F1 code is specifically as follows: (this partial code branch inputs execution)
R1=4.12e3; % " choosing of compensating resistance, R1 generally chooses between 2K-5K "
R2=Fesr*Fesr*Fco*Vosc*R1/ (Flc*Flc*Fesr*Vin) % " the ideal value r2 of the R2 that computer obtains after performing this instruction "
R2=input (' please refer to calculated value r2, input the R2:' chosen); % " R2 is adjusted to the standard value closest to r2 by computer or research staff, i.e. the actual value of R2 in TypeII compensator "
C2=1/ (2*pi*R2*0.1*Flc) % " the ideal value c2 of the C2 that computer obtains after performing this instruction, compensation Fz at zero point is selected in 0.1*Flc place "
C2=input (' please refer to calculated value c2, input the C2:' chosen); % " C2 is adjusted to the standard value closest to c2 by computer or research staff, i.e. the actual value of C2 in TypeII compensator "
C1=C2/ (2*pi*0.5*Fsw*R2*C2-1) % " the ideal value c1 of the C1 that computer obtains after performing this instruction compensates limit Fp and is selected in 0.5*Fsw place "
C1=input (' please refer to calculated value c1, input the C1:' that chooses) % " C1 is adjusted to the standard value closest to c1 by computer or research staff, i.e. the actual value of C1 in TypeII compensator "
After computer execution F1 code determines the actual value of R1, R2, C1 and C2 in TypeII compensator, computer performs F3 code (F3 code comprises the capacitance resistance value of above-mentioned TypeII compensator) in the third generation code preset, according to the value of above-mentioned determined R1, R2, C1 and C2, and in conjunction with above-mentioned formula 1 and formula 2, draw Bert figure and the phase diagram of the BUCK circuit of TypeII compensator type, (similar to Fig. 5), the compensator in this BUCK circuit is TypeII compensator.Wherein, the Bert figure of the BUCK circuit of this TypeII compensator type and phase diagram, comprising: the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of the Bert figure of the BUCK circuit open loop filter gain of the Bert figure of the compensating gain of the Bert figure of the BUCK circuit overall gain of this TypeII compensator type and phase diagram, TypeII compensator and phase diagram, this TypeII compensator type and phase diagram, this TypeII compensator type and phase diagram.
According to the Bert figure of the BUCK circuit of above-mentioned TypeII compensator type and phase diagram, research staff can judge whether the overall gain of the BUCK circuit of this TypeII compensator type and phase margin meet stability requirement, namely judge whether the BUCK circuit of above-mentioned TypeII compensator type meets and preset equilibrium condition.The default equilibrium condition of the BUCK circuit of this TypeII compensator type is specially: total phase shift at maintenance cross-over frequency Fco place should lower than 360 °, phase margin is at least got 45 ° (phase difference that the cross-over frequency A point on the Bert figure namely in Fig. 5 corresponds to phase distance 180 ° of phase places of the B point on phase diagram is greater than 45 °) usually, when this frequency (i.e. cross-over frequency), total loop gain is 1 (i.e. 0dB), slope is-20dB, and the compensating gain of compensator can not more than the compensation ability of BUCK power supply chip internal amplifier (i.e. the restriction of gain bandwidth product).When the Bert figure according to Fig. 5 and phase diagram judge that the output of the BUCK circuit of TypeII compensator type is unstable, then research staff or computer can adjust according to the value of Fig. 5 to above-mentioned R1, R2, C1 and C2 and verify.If be still not enough to make BUCK circuit stability by TypeII type compensator after several times adjustment, then can attempt TypeIII type compensator.
Above-mentioned F3 code is specially:
>>num＝(R1+R3)*Vin/R1/R3/C1/Vosc*conv([ESR*Cout,1],conv([1,1/R2/R2],[1,1/(R1+R3)/C3]))
>>den＝conv([1,0],conv([1,(C1+C2)/R2/C1/C2],conv([1,1/R3/C3],[Lout*Cout,(ESR+DCR)*Cout,1])))
>>g＝tf(num,den)；
>>margin(g)
gridon
Holdon% " the overall gain Bert figure of the BUCK circuit of TypeII compensator type "
>>num＝(R1+R3)/R1/R3/C1*conv([1,1/R2/C2],[1,1/(R1+R3)/C3])
>>den＝conv([1,0],conv([1,(C1+C2)/R2/C1/C2],[1,1/R3/C3]))
>>g＝tf(num,den)；
>>margin(g)
gridon
Holdon% " the compensating gain GAINtypeII Bert figure of TypeII compensator "
>>num＝[Vin/Vosc*ESR*Cout,Vin/Vosc]
>>den＝[l0*Cout,(ESR+DCR)*Cout,1]
>>g＝tf(num,den)；
>>margin(g)
gridon
Holdon% " the BUCK circuit open loop filter gain GAINopenloop Bert figure of TypeII compensator type "
>>num=[0,10^ (GAIN/20)] % " gain bandwidth product gaindB "
>>den＝[10^(GAIN/20)/GBWP,1]
>>g＝tf(num,den)；
>>margin(g)
gridon
Holdon% " BUCK power supply chip internal amplifier is in conjunction with the Bert figure of its gain bandwidth product "/
The compensation balance method of the buck single-phase voltage feedback transformation circuit that the embodiment of the present invention provides, is performed the first code realized based on MATLAB preset, determines the type of the compensator in BUCK circuit by computer; And judge according to this compensator type to perform the second code realized based on MATLAB, to determine the capacitance resistance value of compensator; Perform third generation code finally by computer, draw Bert figure and the phase diagram of BUCK circuit according to determined capacitance resistance value, and adjust the capacitance resistance value of compensator according to this Bert figure and phase diagram, meet to make BUCK circuit and preset equilibrium condition.The method that the embodiment of the present invention provides, the BUCK circuit of the BUCK power supply chip using arbitrary power supply chip producer to provide can be emulated by the code realized based on MATLAB, and control the output of this BUCK circuit stability, compatible good, highly versatile, saves actual hardware development time and difficulty.
On the basis of above-described embodiment, as the third possible execution mode of the embodiment of the present invention, the method that the present embodiment relates to after execution first code, determines that the compensator type of BUCK circuit is TypeIII compensator at computer, and the second filial generation code in computer execution second code is to determine the detailed process of the capacitance resistance value in compensator.That is, above-mentioned S102 specifically comprises: if above-mentioned compensator is TypeIII compensator, then computer judges to perform the second filial generation code in second code; Wherein, this second filial generation code is used for the capacitance resistance value in TypeIII compensator described in described computer calculate.
Concrete, if after computer performs above-mentioned first code, determine that the compensator in current BUCK circuit is TypeIII compensator, then computer performs the second filial generation code in the second code preset, to obtain the capacitance resistance value in this TypeIII compensator, namely obtain the value of R1, R2, R3, C1, C2 and C3 of the TypeIII compensator shown in Fig. 3.General, R1 is the compensating resistance chosen by research staff, and the value of R1 is generally between 2K-5K; The computing formula of R2 can be:
(formula 9), wherein, F
lCfor the limit of circuit open loop LC, F
cofor cross-over frequency, V
infor the input voltage of BUCK circuit, V
oscfor Buck power supply chip inner triangular ripple P-to-P voltage, the value of this R2 is relevant to R1, and that R2 calculated here is the ideal value r2 being actually R2; The computing formula of C2 can be:
(formula 10), wherein, the value of C2 is relevant to R2, and the value of C2 calculated here is actually the ideal value c2 of C2, and
for the frequency of the first zero of compensation, this F
(what generally all adopt during capacitance resistance in calculation compensation device is the limit of zero point or the compensation compensated, and can make the signal of BUCK circuit stable output like this); The computing formula of C1 can be:
(formula 11), wherein, the value of C1 is relevant to C2, and the value of C1 calculated here is actually the ideal value c1 of C1, and
for the frequency of the first limit of compensation, should
the computing formula of R3 can be
(formula 12), wherein, the value of R3 is relevant to R1, and the value of R3 calculated here is actually the ideal value r3 of R3, and
for the frequency of the second limit of compensation,
for the frequency at the second zero point of compensation, should
wherein, F
swfor switching frequency; The computing formula of C3 can be
(formula 13), wherein, the value of C3 is relevant to R3, and the value of C3 calculated here is actually the ideal value c3 of C3, F
swfor switching frequency.
This second filial generation code can be: (this partial code branch inputs execution)
R1=4.12e3; % " choosing of compensating resistance; R1 generally chooses between 2K-5K "
R2=Fco*Vosc*R1/Flc/Vin% " the ideal value r2 of the R2 that computer obtains after performing this instruction "
R2=input (' please refer to calculated value r2, input the R2:' chosen); % " R2 is adjusted to the standard value closest to r2 by computer or research staff, i.e. the actual value of R2 in TypeIII compensator "
C2=1/ (2*pi*R2*0.5*flc) % " the ideal value c2 of the C2 that computer obtains after performing this instruction, the first compensation Fz1 at zero point is selected in 0.5*Flc place "
C2=input (' please refer to calculated value c2, input the C2:' chosen); % " C2 is adjusted to the standard value closest to c2 by computer or research staff, i.e. the actual value of C2 in TypeIII compensator "
C1=C2/ (2*pi*Fesr*R2*C2-1) % " the ideal value c1 of the C1 that computer obtains after performing this instruction, first compensates limit Fp1 is selected in Fesr place "
C1=input (' please refer to calculated value c1, input the C2:' chosen); % " C1 is adjusted to the standard value closest to c1 by computer or research staff, i.e. the actual value of C1 in TypeIII compensator "
R3=R1/ (Fsw/2/Flc-1) % " the ideal value r3 of the R3 that computer obtains after performing this instruction, second compensates limit Fp2 is selected in 0.5*Fsw place, and the second compensation Fz2 at zero point is selected in flc place "
R3=input (' please refer to calculated value r3, input the R3:' chosen); % " R3 is adjusted to the standard value closest to r3 by computer or research staff, i.e. the actual value of R3 in TypeIII compensator "
C3=1/pi/R3/Fsw% " the ideal value c3 of the R3 that computer obtains after performing this instruction "
C2=input (' please refer to calculated value c2, input the C2:' chosen); % " C3 is adjusted to the standard value closest to c3 by computer or research staff, i.e. the actual value of C3 in TypeIII compensator "
After computer execution second filial generation code determines the actual value of R1, R2, R3, C1, C2 and C3 in TypeIII compensator, computer performs the 4th subcode (the 4th subcode comprises the capacitance resistance value of above-mentioned TypeIII compensator) in the third generation code preset, according to the value of above-mentioned determined R1, R2, R3, C1, C2 and C3, and in conjunction with above-mentioned formula 1 and formula 3, draw BUCK circuit Bert figure and the phase diagram of TypeIII compensator type, see Fig. 5, the compensator in this BUCK circuit is TypeIII compensator.Wherein, the Bert figure of the BUCK circuit of this TypeIII compensator type and phase diagram, comprising: the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of the Bert figure of the BUCK circuit open loop filter gain of the Bert figure of the compensating gain of the Bert figure of the BUCK circuit overall gain of TypeIII compensator type and phase diagram, TypeIII compensator and phase diagram, TypeIII compensator type and phase diagram, TypeIII compensator type and phase diagram.
According to the Bert figure of the BUCK circuit of above-mentioned TypeIII compensator type and phase diagram, research staff can judge whether the overall gain of the BUCK circuit of this TypeIII compensator type and phase margin meet stability requirement, namely judge whether the BUCK circuit of this TypeIII compensator type meets and preset equilibrium condition.The default equilibrium condition of the BUCK circuit of this TypeIII compensator type is specially: total phase shift at maintenance cross-over frequency place should lower than 360 °, phase margin at least gets 45 ° usually, when this frequency (i.e. cross-over frequency), total loop gain is 1 (i.e. 0dB), slope is-20dB, and the compensating gain of compensator can not more than the compensation ability of BUCK power supply chip internal amplifier.When the Bert figure according to Fig. 5 and phase diagram judge that the output of the BUCK circuit of TypeIII compensator type is unstable, then research staff or computer can adjust according to the value of Fig. 5 to above-mentioned R1, R2, R3, C1, C2 and C3 and verify.
Above-mentioned 4th subcode is specifically as follows:
>>num＝(R1+R3)*Vin*Vin/Vout/R1/R3/C1/Vosc*conv([ESR*Cout,1],conv([1,1/R2/C2],[1,1/(R1+R3)/C3]))
>>den＝conv([1,0],conv([1,(C1+C2)/R2/C1/C2],conv([1,1/R3/C3],[Lout*Cout,(ESR+DCR)*c0,1])))
>>g＝tf(num,den)；
>>margin(g)
gridon
Holdon% " the overall gain Bert figure of the BUCK circuit of TypeIII compensator type "
>>num＝(R1+R3)/R1/R3/C1*conv([1,1/R2/C2],[1,1/(R1+R3)/C3])
>>den＝conv([1,0],conv([1,(C1+C2)/R2/C1/C2],[1,1/R3/R3]))
>>g＝tf(num,den)；
>>margin(g)
gridon
Holdon% " the compensating gain Bert figure of TypeIII compensator "
>>num＝[Vin*Vosc*Vout/Vin*ESR*Vout,Vin*Vosc*Vout/Vin]
>>den＝[Lout*Cout,(ESR+DCR)*Cout,1]
>>g＝tf(num,den)；
>>margin (g) % " the BUCK circuit open loop filter gain Bert figure of TypeIII compensator type "
>>num=[0,10^ (GAIN/20)] % amplifier, gain bandwidth product GAIN unit dB
>>den＝[10^(GAIN/20)/GBWP,1]
>>g＝tf(num,den)；
>>margin(g)
gridon
Holdon% " BUCK power supply chip internal amplifier is in conjunction with the Bert figure of its gain bandwidth product "
The compensation balance method of the buck single-phase voltage feedback transformation circuit that the embodiment of the present invention provides, is performed the first code realized based on MATLAB preset, determines the type of the compensator in BUCK circuit by computer; And judge according to this compensator type to perform the second code realized based on MATLAB, to determine the capacitance resistance value of compensator; Perform third generation code finally by computer, draw Bert figure and the phase diagram of BUCK circuit according to determined capacitance resistance value, and adjust the capacitance resistance value of compensator according to this Bert figure and phase diagram, meet to make BUCK circuit and preset equilibrium condition.The method that the embodiment of the present invention provides, the code realized based on MATLAB can emulate the BUCK circuit that the single-phase voltage using arbitrary power supply chip producer to provide feeds back BUCK power supply chip, and control the output of this BUCK circuit stability, compatible good, highly versatile, saves actual hardware development time and difficulty.
One of ordinary skill in the art will appreciate that: all or part of step realizing above-mentioned each embodiment of the method can have been come by the hardware that program command is relevant.Aforesaid program can be stored in a computer read/write memory medium.This program, when performing, performs the step comprising above-mentioned each embodiment of the method; And aforesaid storage medium comprises: ROM, RAM, magnetic disc or CD etc. various can be program code stored medium.
Fig. 6 is the structural representation of the compensation balance device embodiment one of buck single-phase voltage feedback transformation circuit provided by the invention.This device can be computer, also can be in a computer integrated.As shown in Figure 6, this device comprises: the first determination module 10, second determination module 11, drafting adjusting module 12.Wherein, the first determination module 10, for performing default first code, determines the type of the compensator in described buck single-phase voltage feedback transformation BUCK circuit; Wherein, described first code is the code realized based on matrix labotstory MATLAB, and described first code comprises the circuit parameter of described BUCK circuit; Second determination module 11, the type for the described compensator determined according to described first determination module 10 judges to perform the second code preset, and determines the capacitance resistance value of described compensator; Wherein, described second code is the code realized based on MATLAB; Draw adjusting module 12, for performing default third generation code, the capacitance resistance value of the described compensator determined according to described second determination module 11 draws Bert figure and the phase diagram of described BUCK circuit, and the capacitance resistance value of described compensator is adjusted according to described Bert figure and described phase diagram, meet to make described BUCK circuit and preset equilibrium condition; Wherein, described third generation code is the code realized based on described MATLAB.
The compensation balance device of the buck single-phase voltage feedback transformation circuit that the embodiment of the present invention provides, can embodiment to perform the above method, and it realizes principle and technique effect is similar, does not repeat them here.
Fig. 7 is the structural representation of the compensation balance device embodiment two of buck single-phase voltage feedback transformation circuit provided by the invention, on above-mentioned basis embodiment illustrated in fig. 6, further, above-mentioned first determination module 10 specifically comprises: perform acquiring unit 101 and determining unit 102.Wherein, perform acquiring unit 101, for performing described first code, obtain the output lc circuit in described BUCK circuit zeros and poles; Determining unit 102, for the cross-over frequency that the described zero point obtained according to described execution acquiring unit 101, described limit and described BUCK circuit are current, determines the type of described compensator.
Further, continue with reference to Fig. 7, described second determination module 11, can comprise the first determining unit 111 and the second determining unit 112; Wherein, described first determining unit 111, if determine that described compensator is type TypeII compensator for described first determination module 10, then judges to perform the F1 code in described second code; Wherein, described F1 code is for calculating the capacitance resistance value in described TypeII compensator; Described second determining unit 112, if determine that described compensator is TypeIII compensator for described first determination module 10, then judges to perform the second filial generation code in described second code; Wherein, described second filial generation code is for calculating the capacitance resistance value in described TypeIII compensator.
Further, continue with reference to Fig. 7, described drafting adjusting module 12, the first drafting adjustment unit 121 and second can be comprised and draw adjustment unit 122, wherein, described first draws adjustment unit 121, if determine that described compensator is TypeII compensator for described first determination module 10, then perform the F3 code in described third generation code, to draw Bert figure and the phase diagram of the BUCK circuit of described TypeII compensator type, wherein, the Bert figure of the BUCK circuit of described TypeII compensator type and phase diagram, comprise: the Bert figure of the BUCK circuit overall gain of described TypeII compensator type and phase diagram, the Bert figure of the compensating gain of described TypeII compensator and phase diagram, the Bert figure of the BUCK circuit open loop filter gain of described TypeII compensator type and phase diagram, the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of described TypeII compensator type and phase diagram, wherein, described F3 code comprises the capacitance resistance value of the described TypeII compensator that described first determining unit 111 is determined,
Described second draws adjustment unit 122, if determine that described compensator is TypeIII compensator for described first determination module 10, then perform the 4th subcode in described third generation code, to draw Bert figure and the phase diagram of the BUCK circuit of described TypeIII compensator type, wherein, the Bert figure of the BUCK circuit of described TypeIII compensator type and phase diagram, comprise: the Bert figure of the BUCK circuit overall gain of described TypeIII compensator type and phase diagram, the Bert figure of the compensating gain of described TypeIII compensator and phase diagram, the Bert figure of the BUCK circuit open loop filter gain of described TypeIII compensator type and phase diagram, the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of described TypeIII compensator type and phase diagram, wherein, described 4th subcode comprises the capacitance resistance value of the described TypeIII compensator that described second determining unit 112 is determined.
The compensation balance device of the buck single-phase voltage feedback transformation circuit that the embodiment of the present invention provides, can embodiment to perform the above method, and it realizes principle and technique effect is similar, does not repeat them here.
Last it is noted that above each embodiment is only in order to illustrate technical scheme of the present invention, be not intended to limit; Although with reference to foregoing embodiments to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein some or all of technical characteristic; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (8)
1. a compensation balance method for buck single-phase voltage feedback transformation circuit, is characterized in that, comprising:
Perform the first code preset, determine the type of the compensator in described buck single-phase voltage feedback transformation BUCK circuit; Wherein, described first code is the code realized based on matrix labotstory MATLAB, and described first code comprises the circuit parameter of described BUCK circuit;
Judge to perform the second code preset according to the type of described compensator, determine the capacitance resistance value of described compensator; Wherein, described second code is the code realized based on MATLAB;
Perform the third generation code preset, Bert figure and the phase diagram of described BUCK circuit is drawn according to the capacitance resistance value of described compensator, and the capacitance resistance value of described compensator is adjusted according to described Bert figure and described phase diagram, meet to make described BUCK circuit and preset equilibrium condition; Wherein, described third generation code is the code realized based on described MATLAB.
2. method according to claim 1, is characterized in that, then the first code that described execution is default, determines the compensator type in described BUCK circuit, specifically comprises:
Perform described first code, obtain the zeros and poles of the output lc circuit in described BUCK circuit; The cross-over frequency current according to described output LC zero point, described output LC limit and described BUCK circuit, determines the type of described compensator.
3. method according to claim 2, is characterized in that, the described type according to described compensator judges to perform the second code preset, and specifically comprises:
If described compensator is type TypeII compensator, then judge to perform the F1 code in described second code; Wherein, described F1 code is for calculating the capacitance resistance value in described TypeII compensator;
If described compensator is TypeIII compensator, then judge to perform the second filial generation code in described second code; Wherein, described second filial generation code is for calculating the capacitance resistance value in described TypeIII compensator.
4. method according to claim 3, is characterized in that, the third generation code that described execution is preset, and draws Bert figure and the phase diagram of described BUCK circuit, specifically comprise according to the capacitance resistance value of described compensator:
If described compensator is TypeII compensator, then perform the F3 code in described third generation code, to draw Bert figure and the phase diagram of the BUCK circuit of described TypeII compensator type; Wherein, the Bert figure of the BUCK circuit of described TypeII compensator type and phase diagram, comprise: the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of the Bert figure of the BUCK circuit open loop filter gain of the Bert figure of the compensating gain of the Bert figure of the BUCK circuit overall gain of described TypeII compensator type and phase diagram, described TypeII compensator and phase diagram, described TypeII compensator type and phase diagram, described TypeII compensator type and phase diagram, described F3 code comprises the capacitance resistance value of described TypeII compensator;
If described compensator is TypeIII compensator, then perform the 4th subcode in described third generation code, to draw Bert figure and the phase diagram of the BUCK circuit of described TypeIII compensator type, wherein, the Bert figure of the BUCK circuit of described TypeIII compensator type and phase diagram, comprise: the Bert figure of the BUCK circuit overall gain of described TypeIII compensator type and phase diagram, the Bert figure of the compensating gain of described TypeIII compensator and phase diagram, the Bert figure of the BUCK circuit open loop filter gain of described TypeIII compensator type and phase diagram, the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of described TypeIII compensator type and phase diagram, described 4th subcode comprises the capacitance resistance value of described TypeIII compensator.
5. a compensation balance device for buck single-phase voltage feedback transformation circuit, is characterized in that, comprising:
First determination module, for performing default first code, determines the type of the compensator in described buck single-phase voltage feedback transformation BUCK circuit; Wherein, described first code is the code realized based on matrix labotstory MATLAB, and described first code comprises the circuit parameter of described BUCK circuit;
Second determination module, the type for the described compensator determined according to described first determination module judges to perform the second code preset, and determines the capacitance resistance value of described compensator; Wherein, described second code is the code realized based on MATLAB;
Draw adjusting module, for performing default third generation code, the capacitance resistance value of the described compensator determined according to described second determination module draws Bert figure and the phase diagram of described BUCK circuit, and the capacitance resistance value of described compensator is adjusted according to described Bert figure and described phase diagram, meet to make described BUCK circuit and preset equilibrium condition; Wherein, described third generation code is the code realized based on described MATLAB.
6. device according to claim 5, is characterized in that, described first determination module, specifically comprises:
Performing acquiring unit, for performing described first code, obtaining the zeros and poles of the output lc circuit in described BUCK circuit;
Determining unit, for the cross-over frequency that the described zero point obtained according to described execution acquiring unit, described limit and described BUCK circuit are current, determines the type of described compensator.
7. device according to claim 6, is characterized in that, described second determination module comprises the first determining unit and the second determining unit; Wherein,
Described first determining unit, if determine that described compensator is type TypeII compensator for described first determination module, then judges to perform the F1 code in described second code; Wherein, described F1 code is for calculating the capacitance resistance value in described TypeII compensator;
Described second determining unit, if determine that described compensator is TypeIII compensator for described first determination module, then judges to perform the second filial generation code in described second code; Wherein, described second filial generation code is for calculating the capacitance resistance value in described TypeIII compensator.
8. device according to claim 7, is characterized in that, described drafting adjusting module comprises the first drafting adjustment unit and second and draws adjustment unit; Wherein,
Described first draws adjustment unit, if determine that described compensator is TypeII compensator for described first determination module, then performs the F3 code in described third generation code, to draw Bert figure and the phase diagram of the BUCK circuit of described TypeII compensator type, wherein, the Bert figure of the BUCK circuit of described TypeII compensator type and phase diagram, comprise: the Bert figure of the BUCK circuit overall gain of described TypeII compensator type and phase diagram, the Bert figure of the compensating gain of described TypeII compensator and phase diagram, the Bert figure of the BUCK circuit open loop filter gain of described TypeII compensator type and phase diagram, the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of described TypeII compensator type and phase diagram, wherein, described F3 code comprises the capacitance resistance value of the described TypeII compensator that described first determining unit is determined,
Described second draws adjustment unit, if determine that described compensator is TypeIII compensator for described first determination module, then perform the 4th subcode in described third generation code, to draw Bert figure and the phase diagram of the BUCK circuit of described TypeIII compensator type, wherein, the Bert figure of the BUCK circuit of described TypeIII compensator type and phase diagram, comprise: the Bert figure of the BUCK circuit overall gain of described TypeIII compensator type and phase diagram, the Bert figure of the compensating gain of described TypeIII compensator and phase diagram, the Bert figure of the BUCK circuit open loop filter gain of described TypeIII compensator type and phase diagram, the Bert figure of the BUCK power supply chip internal amplifier gain of the BUCK circuit of described TypeIII compensator type and phase diagram, wherein, described 4th subcode comprises the capacitance resistance value of the described TypeIII compensator that described second determining unit is determined.
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| CN111324160A (en) * | 2018-12-14 | 2020-06-23 | 致茂电子(苏州)有限公司 | Power supply and compensation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111324160A (en) * | 2018-12-14 | 2020-06-23 | 致茂电子(苏州)有限公司 | Power supply and compensation method thereof |
| CN111324160B (en) * | 2018-12-14 | 2021-07-09 | 致茂电子(苏州)有限公司 | Power supply and compensation method thereof |
| CN111682766A (en) * | 2020-06-30 | 2020-09-18 | 厦门理工学院 | Modeling and simulation method of compensator of improved interleaved buck DC-DC converter |
| CN111682766B (en) * | 2020-06-30 | 2022-03-29 | 厦门理工学院 | Modeling and simulation method of compensator of improved interleaved buck DC-DC converter |
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