CN105468557B - A kind of partition method for avoiding SMBUS from being disturbed - Google Patents
A kind of partition method for avoiding SMBUS from being disturbed Download PDFInfo
- Publication number
- CN105468557B CN105468557B CN201510804476.5A CN201510804476A CN105468557B CN 105468557 B CN105468557 B CN 105468557B CN 201510804476 A CN201510804476 A CN 201510804476A CN 105468557 B CN105468557 B CN 105468557B
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- CN
- China
- Prior art keywords
- smbus
- gpio
- interface equipments
- avoiding
- switch chips
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Links
- 238000000034 method Methods 0.000 title claims abstract description 19
- 238000005192 partition Methods 0.000 title claims abstract description 13
- 238000012544 monitoring process Methods 0.000 claims abstract description 10
- 238000002955 isolation Methods 0.000 claims description 5
- 230000005611 electricity Effects 0.000 claims 1
- 230000002045 lasting effect Effects 0.000 abstract description 4
- 238000007726 management method Methods 0.000 description 13
- 239000004606 Fillers/Extenders Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004171 remote diagnosis Methods 0.000 description 1
- 238000013024 troubleshooting Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/38—Universal adapter
- G06F2213/3812—USB port controller
Abstract
The present invention discloses a kind of partition method for avoiding SMBUS from being disturbed, and belongs to server admin field；When non-using one group of SMBUS carry that server B MC the is gone out SMBUS interface equipments of the present invention,Increase isolating chip to non-SMBUS interface equipments to be isolated,The GPIO of non-SMBUS interface equipments is output to the enabled pin of isolating chip,After the completion of the initialization of non-SMBUS interface equipments,According to program setting,Different GPIO export different level,A high level is exported after XOR gate to open isolating chip,The management and monitoring of BMC will be just subjected to by the SMBUS of carry,The equipment for solving no SMBUS interfaces,In power up phase,Due to lasting longer program initialization time,SMBUS interface levels state can be highly unstable,The problem of may leading to BUS BUSY to influence BMC normal works,SMBUS under the above situation is avoided to be affected.
Description
Technical field
The present invention discloses a kind of partition method for avoiding SMBUS from being disturbed, and belongs to server admin field.
Background technology
In server field, monitoring management is realized to whole system using BMC.However in high-end server, pipe is needed
The number of devices of reason often compares more.Since the SMBUS quantity of BMC module limits, many times need on one group of SMBUS simultaneously
Join multiple equipment to achieve the purpose that make full use of.Some equipment, such as PsoC, FPGA do not have dedicated SMBUS interfaces, usually make
With GPIO come software definition SMBUS interfaces.In power up phase, these equipment, such as PsoC, FPGA would generally continue longer program
Initialization time.In this stage, SMBUS interface level states are highly unstable, if BMC is managing other equipment at this time,
It can lead to BUS BUSY to influence BMC normal works.The present invention provides a kind of partition method for avoiding SMBUS from being disturbed, and keeps away
Exempt from SMBUS under the above situation to be affected.
BMC, Baseboard Management Controller, baseboard management controller, Baseboard Management Controller are
One special service processor, is communicated, BMC is commonly included in mould by independent connection line and system manager
In plate or the main circuit board of monitored equipment.The sensor of BMC is used for measuring internal physical variable, and notifies administrator,
Administrator will take correct measure using remote control.In this way, single administrator can simultaneously remote control without
Several servers and other equipment, save the overall cost of network, and may insure reliability.Function：It is local and remote
Diagnosis, console support, configuration management, hardware management and troubleshooting.
The abbreviation of SMBus, System Management Bus, are translated into System Management Bus, and SMBus is a kind of two-wire system
Universal serial bus provides a controlling bus for task as system and power management, using the system of SMBus, equipment it
Between send and receive message all and be through SMBus, rather than use individual control line, the pin of equipment can be saved in this way
Number.
Invention content
The present invention is in the prior art without the equipment of SMBUS interfaces, in power up phase, due to lasting longer program
Initialization time, SMBUS interface levels state can be highly unstable, may lead to BUS BUSY to influence BMC normal works
The problem of, a kind of partition method for avoiding SMBUS from being disturbed is provided, SMBUS under the above situation is avoided to be affected.
Concrete scheme proposed by the present invention is：
A kind of partition method for avoiding SMBUS from being disturbed, the non-SMBUS interfaces of one group of SMBUS carry that server B MC is gone out
When equipment, isolating chip is increased to non-SMBUS interface equipments and is isolated, the GPIO of non-SMBUS interface equipments is output to isolation
The enabled pin of chip, after the completion of the initialization of non-SMBUS interface equipments, according to program setting, different GPIO export different
Level, one high level of output opens isolating chip after XOR gate, and the pipe of BMC will be just subjected to by the SMBUS of carry
Reason and monitoring.
It is described that non-SMBUS interface equipments increase SWITCH chips are isolated, the GPIO outputs of non-SMBUS interface equipments
To the enabled pin of SWITCH chips, after the completion of the initialization of non-SMBUS interface equipments, according to program setting, different GPIO are defeated
Go out different level, after XOR gate export a high level SWITCH chips are opened, by the SMBUS of carry will normally by
To the management and monitoring of BMC.
It is described that non-SMBUS interface equipments increase SWITCH chips are isolated, the GPIO outputs of non-SMBUS interface equipments
OE pin to SWITCH chips enable pin.
The non-SMBUS interface equipments include PsoC, FPGA.
A kind of isolation circuit for avoiding SMBUS from being disturbed, the non-SMBUS interfaces of one group of SMBUS carry that server B MC is gone out
The GPIO of equipment enables pin by the OE pin of XOR gate connection SWITCH chips, and non-SMBUS interface equipments were initializing
The level of GPIO is maintained at default conditions in journey, and XOR gate exports a low level and closes Switch chips；Initialization is completed
Afterwards, according to program setting, different GPIO export different level, and a high level is exported after XOR gate by Switch chips
It opens.
Universal input/output is referred to as GPIO or bus extender.
Usefulness of the present invention is：
When non-using one group of SMBUS carry that server B MC the is gone out SMBUS interface equipments of the present invention, to non-SMBUS interfaces
Equipment increases isolating chip and is isolated, and the GPIO of non-SMBUS interface equipments is output to the enabled pin of isolating chip, when non-
After the completion of the initialization of SMBUS interface equipments, according to program setting, different GPIO export different level, defeated after XOR gate
Go out a high level to open isolating chip, the management and monitoring of BMC will be just subjected to by the SMBUS of carry, solves not having
The equipment of SMBUS interfaces, in power up phase, due to lasting longer program initialization time, SMBUS interface levels state can be non-
It is often unstable, the problem of BUS BUSY may be caused to influence BMC normal works, avoid under the above situation SMBUS by shadow
It rings.
Description of the drawings
Fig. 1 the method for the present invention schematic diagram of application structure.
Specific implementation mode
A kind of partition method for avoiding SMBUS from being disturbed, the non-SMBUS interfaces of one group of SMBUS carry that server B MC is gone out
When equipment, isolating chip is increased to non-SMBUS interface equipments and is isolated, the GPIO of non-SMBUS interface equipments is output to isolation
The enabled pin of chip, after the completion of the initialization of non-SMBUS interface equipments, according to program setting, different GPIO export different
Level, one high level of output opens isolating chip after XOR gate, and the pipe of BMC will be just subjected to by the SMBUS of carry
Reason and monitoring.
In addition, the present invention also provides a kind of isolation circuit for avoiding SMBUS from being disturbed, gone out one group of server B MC
The GPIO of the non-SMBUS interface equipments of SMBUS carries enables pin by the OE pin of XOR gate connection SWITCH chips, non-
SMBUS interface equipments level of GPIO in initialization procedure is maintained at default conditions, and XOR gate exports a low level will
Switch chips are closed；After the completion of initialization, according to program setting, different GPIO export different level, after XOR gate
One high level of output opens Switch chips.
According to the above method and invention content, in conjunction with attached drawing, the present invention will be further described.
With reference to attached drawing, the carry multiple equipment on one group of SMBUS that BMC is gone out.Simple parallel way can not avoid
The equipment such as PsoC/FPGA influence, and to generate BUS BUSY, influence BMC monitoring managements.Therefore as follows at the ends PsoC/FPGA
Increase SWITCH chips to be isolated, the OE pin of SWITCH chips enable pin and controlled by PsoC/FPGA.PsoC/FPGA
GPIO all pass through an XOR gate (XOR) and be output to the OE pin of Switch.OE pin have high effectively.Under normal conditions,
The level of PsoC/FPGA GPIO in initialization procedure can be maintained at default conditions.Therefore XOR gate can export a low level
Switch is closed.To which SMBUS is from the influence of PsoC/FPGA.After the completion of PsoC/FPGA initialization, set according to program
Fixed, two GPIO export two different level, and a high level is exported after XOR gate and opens Switch.At this point,
The SMBUS of PsoC/FPGA will just be subjected to the management and monitoring of BMC.
The equipment for solving no SMBUS interfaces by the above method present invention, in power up phase, due to lasting longer journey
Sequence initialization time, SMBUS interface levels state can be highly unstable, may lead to BUS BUSY to influence the normal works of BMC
The problem of making avoids SMBUS under the above situation from being affected.
Claims (5)
1. a kind of partition method for avoiding SMBUS from being disturbed, it is characterized in that one group of SMBUS carry that server B MC is gone out is non-
When SMBUS interface equipments, isolating chip is increased to non-SMBUS interface equipments and is isolated, the GPIO of non-SMBUS interface equipments is defeated
Go out the enabled pin to isolating chip, after the completion of the initialization of non-SMBUS interface equipments, according to program setting, different GPIO are defeated
Go out different level, a high level is exported after XOR gate and opens isolating chip, will be just subjected to by the SMBUS of carry
The management and monitoring of BMC.
2. a kind of partition method for avoiding SMBUS from being disturbed according to claim 1, it is characterized in that described to non-SMBUS
Interface equipment, which increases SWITCH chips, is isolated, and the GPIO of non-SMBUS interface equipments is output to the enabled of SWITCH chips and draws
Foot, after the completion of the initialization of non-SMBUS interface equipments, according to program setting, different GPIO export different level, by exclusive or
A high level is exported behind the door to open SWITCH chips, and the management and monitoring of BMC will be just subjected to by the SMBUS of carry.
3. a kind of partition method for avoiding SMBUS from being disturbed according to claim 1 or 2, it is characterized in that described to non-
SMBUS interface equipments, which increase SWITCH chips, is isolated, and the GPIO of non-SMBUS interface equipments is output to the OE of SWITCH chips
Pin enables pin.
4. a kind of partition method for avoiding SMBUS from being disturbed according to claim 3, it is characterized in that the non-SMBUS connects
Jaws equipment includes PsoC, FPGA.
5. a kind of isolation circuit for avoiding SMBUS from being disturbed, it is characterized in that one kind described in claim 3 avoid SMBUS by
It is applied in the partition method of interference, the GPIO warps for the non-SMBUS interface equipments of one group of SMBUS carry that wherein server B MC is gone out
The OE pin for crossing XOR gate connection SWITCH chips enable pin, the electricity of non-SMBUS interface equipments GPIO in initialization procedure
Flat to be maintained at default conditions, XOR gate exports a low level and closes Switch chips；After the completion of initialization, set according to program
Fixed, different GPIO export different level, and a high level is exported after XOR gate and opens Switch chips.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510804476.5A CN105468557B (en) | 2015-11-20 | 2015-11-20 | A kind of partition method for avoiding SMBUS from being disturbed |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510804476.5A CN105468557B (en) | 2015-11-20 | 2015-11-20 | A kind of partition method for avoiding SMBUS from being disturbed |
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| Publication Number | Publication Date |
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| CN105468557A CN105468557A (en) | 2016-04-06 |
| CN105468557B true CN105468557B (en) | 2018-09-04 |
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| CN201510804476.5A Active CN105468557B (en) | 2015-11-20 | 2015-11-20 | A kind of partition method for avoiding SMBUS from being disturbed |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107219912A (en) * | 2017-05-27 | 2017-09-29 | 郑州云海信息技术有限公司 | A kind of cabinet type power supplying system of server of Novel machine and powering mode control method |
| CN110347555B (en) * | 2019-07-09 | 2021-10-01 | 英业达科技有限公司 | Hard disk operation state determination method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102073349A (en) * | 2011-01-27 | 2011-05-25 | 浪潮电子信息产业股份有限公司 | Method for saving peripheral circuits of mainboard of server |
| CN103645976A (en) * | 2013-12-06 | 2014-03-19 | 浪潮电子信息产业股份有限公司 | Light path diagnosing method based on NUMA computer architecture |
| CN104035855A (en) * | 2014-06-13 | 2014-09-10 | 浪潮(北京)电子信息产业有限公司 | Method and device for monitoring hard disks |
-
2015
- 2015-11-20 CN CN201510804476.5A patent/CN105468557B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102073349A (en) * | 2011-01-27 | 2011-05-25 | 浪潮电子信息产业股份有限公司 | Method for saving peripheral circuits of mainboard of server |
| CN103645976A (en) * | 2013-12-06 | 2014-03-19 | 浪潮电子信息产业股份有限公司 | Light path diagnosing method based on NUMA computer architecture |
| CN104035855A (en) * | 2014-06-13 | 2014-09-10 | 浪潮(北京)电子信息产业有限公司 | Method and device for monitoring hard disks |
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| CN105468557A (en) | 2016-04-06 |
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