CN105447941A - Sound-light alarming wireless speech-recognition entrance guard system based on snubber circuit - Google Patents
Sound-light alarming wireless speech-recognition entrance guard system based on snubber circuit Download PDFInfo
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- CN105447941A CN105447941A CN201510958031.2A CN201510958031A CN105447941A CN 105447941 A CN105447941 A CN 105447941A CN 201510958031 A CN201510958031 A CN 201510958031A CN 105447941 A CN105447941 A CN 105447941A
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- G—PHYSICS
- G07—CHECKING-DEVICES
- G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
- G07C9/00—Individual registration on entry or exit
- G07C9/30—Individual registration on entry or exit not involving the use of a pass
- G07C9/32—Individual registration on entry or exit not involving the use of a pass in combination with an identity check
- G07C9/37—Individual registration on entry or exit not involving the use of a pass in combination with an identity check using biometric data, e.g. fingerprints, iris scans or voice recognition
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- G—PHYSICS
- G07—CHECKING-DEVICES
- G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
- G07C9/00—Individual registration on entry or exit
- G07C9/30—Individual registration on entry or exit not involving the use of a pass
- G07C9/38—Individual registration on entry or exit not involving the use of a pass with central registration
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Abstract
The invention discloses a sound-light alarming wireless speech-recognition entrance guard system based on a snubber circuit. The sound-light alarming wireless speech-recognition entrance guard system is mainly composed of a central processing unit; a second wireless transmission module; an A/D conversion circuit, an entrance guard driving circuit, a sound-light alarming circuit, a display module, a memorizer, and a first wireless transmission module which are connected with the central processing unit respectively; and a sound sensor connected with the A/D conversion circuit. The snubber circuit is arranged between the A/D conversion circuit and the central processing unit, and is connected with the A/D conversion circuit and the central processing unit via tandem connection. The sound-light alarming wireless speech-recognition entrance guard system is used for sending alarm via the sound-light alarming circuit, when recognized sound signals and prestored sound signals are not matched, the sound-light alarming circuit is used for sending alarm sound and emitting warning light, so that security personnel can be informed preferably. The sound-light alarming wireless speech-recognition entrance guard system comprises the snubber circuit, the snubber circuit can be used for realizing smooth inputting of signals into the central processing unit, avoiding influences on signal processing and recognition of the central processing unit caused by signal fluctuation, and increasing identification accuracy of the sound-light alarming wireless speech-recognition entrance guard system.
Description
Technical field
The present invention relates to a kind of gate control system, specifically refer to a kind of sound and light alarm wireless speech identification gate control system based on buffer circuit.
Background technology
Gate control system is new-modernization management of public safety system, it integrates microcomputer automatic identification technology and modern safety management measure, relating to many new technologies such as electronics, machinery, optics, computer technology, the communication technology and biotechnology, is the effective guarantee that important department gateway realizes safety precaution management.Existing gate control system mostly is wire transmission mode, the communication of each controller and PC is generally undertaken by RS-232, RS-485 or CAN, and the physical connection between equipment is complicated, network rebuilding constructional difficulties is loaded down with trivial details especially for wiring newly-increased Adding User.
Summary of the invention
The object of the invention is to overcome existing gate control system is wire transmission mode, and the physical connection between its equipment is complicated, and the defect of network rebuilding constructional difficulties, provides a kind of sound and light alarm wireless speech identification gate control system based on buffer circuit.
Object of the present invention is achieved through the following technical solutions: a kind of sound and light alarm wireless speech identification gate control system based on buffer circuit, primarily of central processing unit, second wireless transport module, the A/D change-over circuit be connected with central processing unit respectively, gate inhibition's driving circuit, sound light alarming circuit, display module, storer and the first wireless transport module, the sound transducer be connected with A/D change-over circuit, the gate inhibition be connected with gate inhibition's driving circuit, the signal processing circuit be connected with the second wireless transport module, the PC be connected with signal processing circuit, and the printer to be connected with PC forms, described first wireless transport module is connected with the second wireless transport module by wireless network, in order to better implement the present invention, the present invention is also serially connected with buffer circuit between A/D change-over circuit and central processing unit.Described sound light alarming circuit is by Sheffer stroke gate A3, triode VT5, triode VT6, not gate A1, not gate A2, not gate A4, the forward end of positive pole Sheffer stroke gate A1 is connected, the electric capacity C7 that the backward end of negative pole then Sheffer stroke gate A1 is connected, the resistance R13 be in parallel with electric capacity C7, be serially connected in the resistance R14 between the positive pole of electric capacity C7 and the base stage of triode VT5, be serially connected in the resistance R15 between the backward end of not gate A1 and the forward end of not gate A2, the forward end of positive pole Sheffer stroke gate A2 is connected, the electric capacity C8 that negative pole is then connected with the base stage of triode VT5, the backward end of negative pole Sheffer stroke gate A4 is connected, the electric capacity C9 that positive pole is then connected with the positive pole of Sheffer stroke gate A3 after resistance R16, be serially connected in the resistance R17 between the positive pole of electric capacity C9 and the output terminal of Sheffer stroke gate A3, be serially connected in the oscillator X between the output terminal of Sheffer stroke gate A3 and the collector of triode VT5, one end is connected with the collector of triode VT5, the resistance R18 that the other end is then connected with the emitter of triode VT6 after warning lamp XL, be serially connected in the resistance R19 between the backward end of not gate A4 and the base stage of triode VT6, and the alarm BL be serially connected between the negative pole of electric capacity C7 and the collector of triode VT6 forms, the forward termination 12V voltage of described not gate A1, its backward end forms the input end of this sound light alarming circuit and is connected with central processing unit, the backward end of the emitter Sheffer stroke gate A2 of described triode VT5 is connected, its grounded collector, the negative pole of described Sheffer stroke gate A3 is then connected with the emitter of triode VT5.
Further, described buffer circuit is by amplifier P1, amplifier P2, amplifier P3, triode VT7, one end is connected with the positive pole of amplifier P1, the other end then forms the resistance R20 of the input end of this buffer circuit, P pole is connected with the emitter of triode VT7, the diode D4 that N pole is then connected with the output terminal of amplifier P3 after resistance R21, be serially connected in the resistance R22 between the positive pole of amplifier P2 and output terminal, positive pole is connected with the output terminal of amplifier P2, the electric capacity C10 that negative pole is then connected with the negative pole of amplifier P1 after resistance R23, P pole is connected with the output terminal of amplifier P1, the diode D5 that N pole is then connected with the negative pole of amplifier P1, N pole is connected with the negative pole of amplifier P3, the diode D6 that P pole is then connected with the negative pole of amplifier P1, be serially connected in the resistance R24 between the output terminal of amplifier P3 and the negative pole of electric capacity C10, and one end is connected with the output terminal of amplifier P2, the resistance R25 that the other end then forms the output terminal of this buffer circuit forms, the base stage of described triode VT7 is connected with the positive pole of amplifier P1, and its collector is then connected with the output terminal of amplifier P1, and its emitter is then connected with the positive pole of amplifier P3, the negative pole of described amplifier P2 is connected with the output terminal of amplifier P1, the input end of described buffer circuit is connected with the output terminal of A/D change-over circuit, and its output terminal is then connected with central processing unit.
Described signal processing circuit by signal compensation circuit, the phase lock circuitry be connected with signal compensation circuit, and the filtering circuit be connected with phase lock circuitry forms; The input end of described signal compensation circuit is connected with the second wireless transport module, and the output terminal of filtering circuit is then connected with PC.
Described signal compensation circuit is by triode VT1, field effect transistor MOS1, positive pole is connected with the grid of field effect transistor MOS1 after resistance R3, the polar capacitor C1 of minus earth, one end is connected with the positive pole of polar capacitor C1, the resistance R2 of other end ground connection, negative pole is connected with the grid of field effect transistor MOS1, positive pole then forms the polar capacitor C2 of the input end of this signal compensation circuit, one end is connected with the base stage of triode VT1, the resistance R4 that the other end is then connected with the positive pole of polar capacitor C1 after resistance R1, N pole is connected with the source electrode of field effect transistor MOS1, the diode D1 of P pole ground connection, and positive pole is connected with the collector of triode VT1, the polar capacitor C3 that negative pole is then connected with the N pole of diode D1 forms, the source electrode of described field effect transistor MOS1 is connected with phase lock circuitry, and its drain electrode is then connected with the base stage of triode VT1, the emitter of described triode VT1 is connected with phase lock circuitry, the tie point of described resistance R1 and resistance R4 connects 12V voltage.
Described phase lock circuitry is by phase-locked chip U1, triode VT2, triode VT3, field effect transistor MOS2, be serially connected in the resistance R5 between the base stage of triode VT2 and the base stage of triode VT3, P pole is connected with the drain electrode of field effect transistor MOS2, the diode D3 that N pole is then connected with the collector of triode VT2 after resistance R6, be serially connected in the resistance R8 between the source electrode of field effect transistor MOS2 and the COMP pin of phase-locked chip U1, P pole is connected with the collector of triode VT3, the diode D2 that N pole is then connected with the source electrode of field effect transistor MOS2 after resistance R7, positive pole is connected with the FB pin of phase-locked chip U1, the electric capacity C4 that negative pole is then connected with the N pole of diode D2, positive pole is connected with the DRV pin of phase-locked chip U1, the electric capacity C5 of minus earth, one end is connected with the N pole of diode D3, the resistance R9 that the other end is then connected with the VSS pin of phase-locked chip U1, and one end is connected with the N pole of diode D3, the resistance R10 that the other end is then connected with the VDD pin of phase-locked chip U1 forms, the collector of described triode VT2 is connected with the emitter of triode VT1, and its emitter is then connected with the emitter of triode VT3, the described base stage of triode VT3 is connected with the source electrode of field effect transistor MOS1, and its emitter is then connected with the grid of field effect transistor MOS2, the TOFF pin of described phase-locked chip U1 is all connected with filtering circuit with CS pin.
Described filtered electrical routing amplifier P, triode VT4, be serially connected in the resistance R11 between the TOFF pin of phase-locked chip U1 and the positive pole of amplifier P, be serially connected in the resistance R12 between the CS pin of phase-locked chip U1 and the base stage of triode VT4, and the electric capacity C6 that positive pole is connected with the emitter of triode VT4, negative pole is then connected with the output terminal of amplifier P forms; The emitter of described triode VT4 is connected with the negative pole of amplifier P, its grounded collector; The output terminal of described amplifier P forms the output terminal of this filtering circuit.
Described phase-locked chip U1 is UCT4392 type integrated chip.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) the present invention adopts wireless mode to carry out data transmission, realizes the message exchange of access control and PC, decreases difficulty of construction, be beneficial in the future supvr to the transformation of gate inhibition's network.
(2) the present invention can process the signal after wireless transmission, thus improves the accuracy of the data that PC receives.
(3) the present invention is reported to the police by sound light alarming circuit, and when identified voice signal does not mate with the voice signal stored up in advance, this sound light alarming circuit can sound the alarm and warning lamp is lighted, and so can better notify security protection personnel.
(4) the present invention is provided with buffer circuit, and it can make the input central processing unit of signal smoothing, avoids signal fluctuation and affect central processing unit processing signal, identifying, thus improves accuracy of identification of the present invention.
Accompanying drawing explanation
Fig. 1 is one-piece construction block diagram of the present invention.
Fig. 2 is the structural drawing of signal processing circuit of the present invention.
Fig. 3 is the structural drawing of sound light alarming circuit of the present invention.
Fig. 4 is the structural drawing of buffer circuit of the present invention.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Embodiment
As shown in Figure 1, a kind of sound and light alarm wireless speech identification gate control system based on buffer circuit of the present invention, primarily of central processing unit, second wireless transport module, the buffer circuit be connected with central processing unit respectively, gate inhibition's driving circuit, sound light alarming circuit, display module, storer and the first wireless transport module, the A/D change-over circuit be connected with buffer circuit, the sound transducer be connected with A/D change-over circuit, the gate inhibition be connected with gate inhibition's driving circuit, the signal processing circuit be connected with the second wireless transport module, the PC be connected with signal processing circuit, and the printer to be connected with PC forms, described first wireless transport module is connected with the second wireless transport module by wireless network.
This sound transducer is arranged near gate inhibition, for collected sound signal.A/D change-over circuit is used for that the simulating signal that sound transducer exports is converted to electric signal and exports to buffer circuit.This buffer circuit then for processing signal, the input central processing unit enabling signal level and smooth.This central processing unit is for controlling the running of whole system, and its SPCE061A single-chip microcomputer preferentially adopting Taiwan Ling Yang company to produce realizes.Storer is then for storing the voice signal that can pass in and out gate inhibition personnel in advance; Sound light alarming circuit be used for voice signal coupling not pair time sound the alarm and light warning lamp.Display module is then for simultaneous display recognition result, and it uses display to realize, gate inhibition's driving circuit opening then for access control.First wireless transport module and the second wireless transport module are used for carrying out wireless transmission to signal, and the preferential PTR2000 type wireless transport module that adopts realizes.Signal processing circuit is used for processing to the received signal.This PC is then for storing signal; Printer is then for printing data-signal.The IOA2 pin of this SPCE061A type single-chip microcomputer is connected with the output terminal of buffer circuit, its IOA1 pin is then connected with the input end of gate inhibition's driving circuit, its IOA6 pin is then connected with storer, its IOA5 pin is then connected with display module, its DAC1 pin is then connected with the input end of sound light alarming circuit, and its IOA3 pin is then connected with the DI pin of the first wireless transport module.The DI pin of described second wireless transport module is then connected with signal processing circuit.Described A/D change-over circuit, gate inhibition's driving circuit, storer, sound transducer, PC and printer all adopt prior art to realize.
As shown in Figure 2, described signal processing circuit by signal compensation circuit, the phase lock circuitry be connected with signal compensation circuit, and the filtering circuit be connected with phase lock circuitry forms.The input end of described signal compensation circuit is connected with the DI pin of the second wireless transport module, and the output terminal of filtering circuit is then connected with PC.
Described signal compensation circuit by triode VT1, field effect transistor MOS1, resistance R1, resistance R2, resistance R3, resistance R4, polar capacitor C1, polar capacitor C2, polar capacitor C3 and diode D1.
Wherein, the positive pole of polar capacitor C1 be connected with the grid of field effect transistor MOS1 after resistance R3, its minus earth.One end of resistance R2 is connected with the positive pole of polar capacitor C1, its other end ground connection.The input end that the negative pole of polar capacitor C2 is connected with the grid of field effect transistor MOS1, its positive pole then forms this signal compensation circuit.One end of resistance R4 is connected with the base stage of triode VT1, its other end is then connected with the positive pole of polar capacitor C1 after resistance R1.The N pole of diode D1 is connected with the source electrode of field effect transistor MOS1, its P pole ground connection.The positive pole of polar capacitor C3 is connected with the collector of triode VT1, its negative pole is then connected with the N pole of diode D1.
The source electrode of this field effect transistor MOS1 is connected with phase lock circuitry, and its drain electrode is then connected with the base stage of triode VT1.The emitter of described triode VT1 is connected with phase lock circuitry.The tie point of described resistance R1 and resistance R4 connects 12V voltage.This signal compensation circuit can compensate the decay of the appearance of signal in wireless transmission process, wherein field effect transistor MOS1, triode VT1, diode D1 and polar capacitor C3 form amplifying circuit, it carries out amplification process to signal, thus compensate for the decay that signal occurs in transmitting procedure.
Described phase lock circuitry is by phase-locked chip U1, triode VT2, and triode VT3, field effect transistor MOS2, resistance R5, resistance R6, resistance R7, resistance R8, resistance R9, resistance R10, diode D2, diode D3, electric capacity C4 and electric capacity C5 form.
During connection, resistance R5 is serially connected between the base stage of triode VT2 and the base stage of triode VT3.The P pole of diode D3 is connected with the drain electrode of field effect transistor MOS2, its N pole is then connected with the collector of triode VT2 after resistance R6.Resistance R8 is serially connected between the source electrode of field effect transistor MOS2 and the COMP pin of phase-locked chip U1.The P pole of diode D2 is connected with the collector of triode VT3, its N pole is then connected with the source electrode of field effect transistor MOS2 after resistance R7.The positive pole of electric capacity C4 is connected with the FB pin of phase-locked chip U1, its negative pole is then connected with the N pole of diode D2.The positive pole of electric capacity C5 is connected with the DRV pin of phase-locked chip U1, its minus earth.One end of resistance R9 is connected with the N pole of diode D3, its other end is then connected with the VSS pin of phase-locked chip U1.One end of resistance R10 is connected with the N pole of diode D3, its other end is then connected with the VDD pin of phase-locked chip U1.
Meanwhile, the collector of described triode VT2 is connected with the emitter of triode VT1, and its emitter is then connected with the emitter of triode VT3.The described base stage of triode VT3 is connected with the source electrode of field effect transistor MOS1, and its emitter is then connected with the grid of field effect transistor MOS2.The TOFF pin of described phase-locked chip U1 is all connected with filtering circuit with CS pin.This phase lock circuitry can lock the frequency of signal, thus makes signal more stable, and this phase-locked chip U1 is preferably UCT4392 type integrated chip and realizes.
Described filtered electrical routing amplifier P, triode VT4, be serially connected in the resistance R11 between the TOFF pin of phase-locked chip U1 and the positive pole of amplifier P, be serially connected in the resistance R12 between the CS pin of phase-locked chip U1 and the base stage of triode VT4, and the electric capacity C6 that positive pole is connected with the emitter of triode VT4, negative pole is then connected with the output terminal of amplifier P forms.The emitter of described triode VT4 is connected with the negative pole of amplifier P, its grounded collector; The output terminal of described amplifier P forms the output terminal of this filtering circuit.This filtering circuit can suppress the undesired signal in signal, makes the signal stored by PC more accurate.
As shown in Figure 3, this sound light alarming circuit by Sheffer stroke gate A3, triode VT5, triode VT6, not gate A1, not gate A2, not gate A4, resistance R13, resistance R14, resistance R15, resistance R16, resistance R17, resistance R18, resistance R19, electric capacity C7, electric capacity C8, electric capacity C9, oscillator X, warning lamp XL and alarm BL form.
Wherein, the forward end of the positive pole Sheffer stroke gate A1 of electric capacity C7 is connected, the backward end of its negative pole then Sheffer stroke gate A1 is connected.Resistance R13 and electric capacity C7 is in parallel.Resistance R14 is serially connected between the positive pole of electric capacity C7 and the base stage of triode VT5.Resistance R15 is serially connected between the backward end of not gate A1 and the forward end of not gate A2.The forward end of the positive pole Sheffer stroke gate A2 of electric capacity C8 is connected, its negative pole is then connected with the base stage of triode VT5.The backward end of the negative pole Sheffer stroke gate A4 of electric capacity C9 is connected, its positive pole is then connected with the positive pole of Sheffer stroke gate A3 after resistance R16.Between the positive pole that resistance R17 is serially connected in electric capacity C9 and the output terminal of Sheffer stroke gate A3.Oscillator X is serially connected between the output terminal of Sheffer stroke gate A3 and the collector of triode VT5.One end of resistance R18 is connected with the collector of triode VT5, its other end is then connected with the emitter of triode VT6 after warning lamp XL.Resistance R19 is serially connected between the backward end of not gate A4 and the base stage of triode VT6.Alarm BL is serially connected between the negative pole of electric capacity C7 and the collector of triode VT6.
Meanwhile, the forward termination 12V voltage of described not gate A1, its backward end forms the input end of this sound light alarming circuit and is connected with central processing unit.The backward end of the emitter Sheffer stroke gate A2 of described triode VT5 is connected, its grounded collector.The negative pole of described Sheffer stroke gate A3 is then connected with the emitter of triode VT5.
When central processing unit outputs signal, degenerative amplifying circuit via not gate A1, resistance R15, not gate A2, triode VT5, electric capacity C8 and resistance R14 composition amplifies, signal after amplifying is input to the oscillatory circuit be made up of Sheffer stroke gate A3, not gate A4 and oscillator X makes oscillatory circuit oscillates, at this moment triode VT6 conducting thus triggered alarm BL report to the police, and warning lamp XL lights.
As shown in Figure 4, described buffer circuit is by amplifier P1, and amplifier P2, amplifier P3, triode VT7, resistance R20, resistance R21, resistance R22, resistance R23, resistance R24, resistance R25, diode D4, diode D5, diode D6 and electric capacity C10 form.
During connection, the input end that one end of resistance R20 is connected with the positive pole of amplifier P1, its other end then forms this buffer circuit is also connected with the output terminal of A/D change-over circuit.The P pole of diode D4 is connected with the emitter of triode VT7, its N pole is then connected with the output terminal of amplifier P3 after resistance R21.Between the positive pole that crosstalk resistance R22 is connected on amplifier P2 and output terminal.The positive pole of electric capacity C10 is connected with the output terminal of amplifier P2, its negative pole is then connected with the negative pole of amplifier P1 after resistance R23.The P pole of diode D5 is connected with the output terminal of amplifier P1, its N pole is then connected with the negative pole of amplifier P1.The N pole of diode D6 is connected with the negative pole of amplifier P3, its P pole is then connected with the negative pole of amplifier P1.Resistance R24 is serially connected between the output terminal of amplifier P3 and the negative pole of electric capacity C10.One end of resistance R25 is connected with the output terminal of amplifier P2, its other end then forms the output terminal of this buffer circuit and is connected with central processing unit.
Meanwhile, the base stage of described triode VT7 is connected with the positive pole of amplifier P1, and its collector is then connected with the output terminal of amplifier P1, and its emitter is then connected with the positive pole of amplifier P3.The negative pole of described amplifier P2 is connected with the output terminal of amplifier P1.
Wherein, amplifier P3 and amplifier P2 forms a buffer stage in parallel, and it can make the input central processing unit of signal smoothing, avoids signal fluctuation and affect central processing unit processing signal, identifying, thus improves accuracy of identification of the present invention.
During work, the personnel of turnover are needed to send signal to sound transducer, this sound transducer then gathers voice signal and sends to A/D change-over circuit, this A/D change-over circuit sends to buffer circuit after voice analog signal is converted to electric signal, and this electric signal transmits central processing unit after buffer circuit process.This central processing unit mates the signal of input with the signal stored in advance in storer, if it fails to match, central processing unit then sends command signal and makes alarm equipment alarm to sound light alarming circuit, and warning lamp is lighted.If the match is successful, central processing unit then sends command signal to gate inhibition's driving circuit, and this gate inhibition's driving circuit then access control is opened.The matching result of this display module then display.Simultaneously, the acoustic information of the personnel of entering, the temporal information that enters gate inhibition are also sent to the second wireless transport module by wireless network by the first wireless transport module by central processing unit, and the second wireless transport module sends PC again to and stores after signal is sent to signal processing circuit process.
As mentioned above, just well the present invention can be implemented.
Claims (7)
1. the sound and light alarm wireless speech identification gate control system based on buffer circuit, primarily of central processing unit, second wireless transport module, the A/D change-over circuit be connected with central processing unit respectively, gate inhibition's driving circuit, sound light alarming circuit, display module, storer and the first wireless transport module, the sound transducer be connected with A/D change-over circuit, the gate inhibition be connected with gate inhibition's driving circuit, the signal processing circuit be connected with the second wireless transport module, the PC be connected with signal processing circuit, and the printer be connected with PC forms, described first wireless transport module is connected with the second wireless transport module by wireless network, it is characterized in that, between A/D change-over circuit and central processing unit, be also serially connected with buffer circuit, described sound light alarming circuit is by Sheffer stroke gate A3, triode VT5, triode VT6, not gate A1, not gate A2, not gate A4, the forward end of positive pole Sheffer stroke gate A1 is connected, the electric capacity C7 that the backward end of negative pole then Sheffer stroke gate A1 is connected, the resistance R13 be in parallel with electric capacity C7, be serially connected in the resistance R14 between the positive pole of electric capacity C7 and the base stage of triode VT5, be serially connected in the resistance R15 between the backward end of not gate A1 and the forward end of not gate A2, the forward end of positive pole Sheffer stroke gate A2 is connected, the electric capacity C8 that negative pole is then connected with the base stage of triode VT5, the backward end of negative pole Sheffer stroke gate A4 is connected, the electric capacity C9 that positive pole is then connected with the positive pole of Sheffer stroke gate A3 after resistance R16, be serially connected in the resistance R17 between the positive pole of electric capacity C9 and the output terminal of Sheffer stroke gate A3, be serially connected in the oscillator X between the output terminal of Sheffer stroke gate A3 and the collector of triode VT5, one end is connected with the collector of triode VT5, the resistance R18 that the other end is then connected with the emitter of triode VT6 after warning lamp XL, be serially connected in the resistance R19 between the backward end of not gate A4 and the base stage of triode VT6, and the alarm BL be serially connected between the negative pole of electric capacity C7 and the collector of triode VT6 forms, the forward termination 12V voltage of described not gate A1, its backward end forms the input end of this sound light alarming circuit and is connected with central processing unit, the backward end of the emitter Sheffer stroke gate A2 of described triode VT5 is connected, its grounded collector, the negative pole of described Sheffer stroke gate A3 is then connected with the emitter of triode VT5.
2. a kind of sound and light alarm wireless speech identification gate control system based on buffer circuit according to claim 1, it is characterized in that: described buffer circuit is by amplifier P1, amplifier P2, amplifier P3, triode VT7, one end is connected with the positive pole of amplifier P1, the other end then forms the resistance R20 of the input end of this buffer circuit, P pole is connected with the emitter of triode VT7, the diode D4 that N pole is then connected with the output terminal of amplifier P3 after resistance R21, be serially connected in the resistance R22 between the positive pole of amplifier P2 and output terminal, positive pole is connected with the output terminal of amplifier P2, the electric capacity C10 that negative pole is then connected with the negative pole of amplifier P1 after resistance R23, P pole is connected with the output terminal of amplifier P1, the diode D5 that N pole is then connected with the negative pole of amplifier P1, N pole is connected with the negative pole of amplifier P3, the diode D6 that P pole is then connected with the negative pole of amplifier P1, be serially connected in the resistance R24 between the output terminal of amplifier P3 and the negative pole of electric capacity C10, and one end is connected with the output terminal of amplifier P2, the resistance R25 that the other end then forms the output terminal of this buffer circuit forms, the base stage of described triode VT7 is connected with the positive pole of amplifier P1, and its collector is then connected with the output terminal of amplifier P1, and its emitter is then connected with the positive pole of amplifier P3, the negative pole of described amplifier P2 is connected with the output terminal of amplifier P1, the input end of described buffer circuit is connected with the output terminal of A/D change-over circuit, and its output terminal is then connected with central processing unit.
3. a kind of sound and light alarm wireless speech identification gate control system based on buffer circuit according to claim 2, it is characterized in that: described signal processing circuit is by signal compensation circuit, the phase lock circuitry be connected with signal compensation circuit, and the filtering circuit be connected with phase lock circuitry forms; The input end of described signal compensation circuit is connected with the second wireless transport module, and the output terminal of filtering circuit is then connected with PC.
4. a kind of sound and light alarm wireless speech identification gate control system based on buffer circuit according to claim 3, it is characterized in that: described signal compensation circuit is by triode VT1, field effect transistor MOS1, positive pole is connected with the grid of field effect transistor MOS1 after resistance R3, the polar capacitor C1 of minus earth, one end is connected with the positive pole of polar capacitor C1, the resistance R2 of other end ground connection, negative pole is connected with the grid of field effect transistor MOS1, positive pole then forms the polar capacitor C2 of the input end of this signal compensation circuit, one end is connected with the base stage of triode VT1, the resistance R4 that the other end is then connected with the positive pole of polar capacitor C1 after resistance R1, N pole is connected with the source electrode of field effect transistor MOS1, the diode D1 of P pole ground connection, and positive pole is connected with the collector of triode VT1, the polar capacitor C3 that negative pole is then connected with the N pole of diode D1 forms, the source electrode of described field effect transistor MOS1 is connected with phase lock circuitry, and its drain electrode is then connected with the base stage of triode VT1, the emitter of described triode VT1 is connected with phase lock circuitry, the tie point of described resistance R1 and resistance R4 connects 12V voltage.
5. a kind of sound and light alarm wireless speech identification gate control system based on buffer circuit according to claim 4, it is characterized in that: described phase lock circuitry is by phase-locked chip U1, triode VT2, triode VT3, field effect transistor MOS2, be serially connected in the resistance R5 between the base stage of triode VT2 and the base stage of triode VT3, P pole is connected with the drain electrode of field effect transistor MOS2, the diode D3 that N pole is then connected with the collector of triode VT2 after resistance R6, be serially connected in the resistance R8 between the source electrode of field effect transistor MOS2 and the COMP pin of phase-locked chip U1, P pole is connected with the collector of triode VT3, the diode D2 that N pole is then connected with the source electrode of field effect transistor MOS2 after resistance R7, positive pole is connected with the FB pin of phase-locked chip U1, the electric capacity C4 that negative pole is then connected with the N pole of diode D2, positive pole is connected with the DRV pin of phase-locked chip U1, the electric capacity C5 of minus earth, one end is connected with the N pole of diode D3, the resistance R9 that the other end is then connected with the VSS pin of phase-locked chip U1, and one end is connected with the N pole of diode D3, the resistance R10 that the other end is then connected with the VDD pin of phase-locked chip U1 forms, the collector of described triode VT2 is connected with the emitter of triode VT1, and its emitter is then connected with the emitter of triode VT3, the described base stage of triode VT3 is connected with the source electrode of field effect transistor MOS1, and its emitter is then connected with the grid of field effect transistor MOS2, the TOFF pin of described phase-locked chip U1 is all connected with filtering circuit with CS pin.
6. a kind of sound and light alarm wireless speech identification gate control system based on buffer circuit according to claim 5, it is characterized in that: described filtered electrical routing amplifier P, triode VT4, be serially connected in the resistance R11 between the TOFF pin of phase-locked chip U1 and the positive pole of amplifier P, be serially connected in the resistance R12 between the CS pin of phase-locked chip U1 and the base stage of triode VT4, and the electric capacity C6 that positive pole is connected with the emitter of triode VT4, negative pole is then connected with the output terminal of amplifier P forms; The emitter of described triode VT4 is connected with the negative pole of amplifier P, its grounded collector; The output terminal of described amplifier P forms the output terminal of this filtering circuit.
7. a kind of sound and light alarm wireless speech identification gate control system based on buffer circuit according to claim 6, is characterized in that: described phase-locked chip U1 is UCT4392 type integrated chip.
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| CN201510958031.2A CN105447941A (en) | 2015-12-19 | 2015-12-19 | Sound-light alarming wireless speech-recognition entrance guard system based on snubber circuit |
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| CN201510958031.2A CN105447941A (en) | 2015-12-19 | 2015-12-19 | Sound-light alarming wireless speech-recognition entrance guard system based on snubber circuit |
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