CN105447231A - Method for quickly extracting threshold voltage of field effect transistor with passive drain triple-gate structure - Google Patents
Method for quickly extracting threshold voltage of field effect transistor with passive drain triple-gate structure Download PDFInfo
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- CN105447231A CN105447231A CN201510775618.XA CN201510775618A CN105447231A CN 105447231 A CN105447231 A CN 105447231A CN 201510775618 A CN201510775618 A CN 201510775618A CN 105447231 A CN105447231 A CN 105447231A
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Abstract
The present invention belongs to the technical field of semiconductors, particularly is a method for quickly extracting a threshold voltage of a field effect transistor with a passive drain triple-gate structure. According to the present invention, a channel potential distribution of a sub-threshold region of a field effect transistor with such structure is acquired by solving a three-dimensional poisson equation in a rectangular coordinate system; according to a definition of a threshold voltage of the present invention, when average channel potential is equal to Quasi-Fermi potential minus double thermoelectric potential, an applied gate voltage is the threshold voltage; and accordingly, a threshold voltage analytical model can be acquired. The threshold voltage analytical model is brief in form and clear in physical concept, and provides a rapid and accurate extracting tool for a circuit simulation software when a threshold voltage of a field effect transistor with a new passive drain triple-gate structure is acquired.
Description
Technical field
The invention belongs to technical field of semiconductors, be specifically related to a kind of method of rapid extraction without source-drain three grid (Triple-Gate) structured metal oxide semiconductor field effect transistor (MOSFET, Metal-Oxide-SemiconductorField-EffectTransistor) threshold voltage.
Background technology
Along with integrated circuit (IC) chip integrated level improves constantly and constantly the reducing of device geometries, in the evolution of nanoscale field effect transistor, progressively develop from planar technology to spatial structure.For nanoscale field effect transistor, because source and drain is more and more less, preparation technology becomes increasingly complex, so people propose the field effect transistor of without source-drain structure.The source and drain of this device is the same with the doping content of raceway groove and doping type, while Simplified flowsheet, reduces source-drain contact resistance, and the performance of device is improved.For conventional source drain structure device, the break-over of device when semiconductor is in strong inversion.And for without source-drain structure devices, when semiconductor is in fully-depleted for turning off, when semiconductor is part depletion, device starts conducting.In all kinds of three-dimensional device architecture, without source-drain three grid structure field effect transistor, because raceway groove can surround by grid completely, its integration density is high, grid are strong to channel controllability, and technique is relatively simple easily to be realized.This device better can suppress short-channel effect, and reduce the quiescent dissipation of device, subthreshold current is minimized, and it is optimal structure that three gate field-effect transistors enter nanoscale.Therefore to this without source-drain three gate field-effect transistor, create analytic model and become particularly important.Day by day be subject to industry member to the V_th generation of this nanoscale without source-drain three grid structure field effect transistor to pay close attention to simultaneously.The V_th generation method of the body silicon field-effect pipe of conventional planar technique can not adapt in the past, proposed new challenge to the practical application of this novel nano nanoscale devices.
Threshold voltage
be one of of paramount importance parameter of field effect transistor, traditional devices threshold voltage is defined as: grid voltage required when reaching threshold value transoid point, for the electron quasi-Fermi electromotive force that N-shaped device equals 2 times when surface potential
time device state, or the accurate fermi potential in hole that 2 times are equaled when surface potential for p-type device
time device state.In order to use circuit simulation software can correct mimic channel characteristic, fast, accurately to extract threshold voltage be indispensable, vital.
Summary of the invention
In view of this, the object of the invention is to provide that a kind of form is succinct, clear physics conception, and the method for the high rapid extraction without source-drain three grid structure field effect transistor threshold voltage of precision.
The without source-drain three grid structure field effect transistor V_th generation method that the present invention proposes, can implanted circuit simulating software, accurately emulates the circuit behavior be made up of this device.
For without source-drain three gate field-effect transistor, when device is in part depletion district, Charge Terms in Poisson equation mainly determined by immovable ionized impurity, when source and drain, semiconductor are all N-type doping, its channel region Potential Distributing can be represented by the Solving Three-Dimensional poisson Equation under rectangular coordinate system:
(1)
In above formula,
for groove potential,
for electron charge,
for raceway groove donor doping concentration,
for the specific inductive capacity of silicon, V is as the criterion fermi potential, V
tfor thermoelectrical potential, be 0.026V under room temperature.
When solving groove potential and resolving distribution, source voltage terminal
be a steady state value, we are set as reference potential it.The boundary condition of device can do following simplification:
(2)
(3)
(4)
(5)
(6)
Suppose that bottom device buries oxide layer enough thick, make the electric field intensity enough little (this easily accomplishes in practice) of burying in oxide layer, thus can ignore and to bury in oxide layer electric field to the impact of raceway groove electrology characteristic, can be substituted by following formula with the boundary condition formula (6) of burying oxide interface place bottom device channel:
(7)
The reference potential of setting
source electromotive force,
channel length,
the applying bias voltage of drain terminal,
the effective voltage being grid is biased,
grid voltage,
it is flat-band voltage.Suppose that gate oxide does not have interfacial charge, fixed charge and all kinds of surface scattering, interface state is perfect condition, then have
, wherein W
mand W
sbe respectively the work function of grid and semiconductor.
In addition, in order to simplify calculating, oxide layer equivalence being replaced with silicon medium, namely oxide layer can be equivalent to silicon, obtain equivalent width and equivalent height:
(8)
(9)
T in formula
oxbe device oxidated layer thickness, top gate oxide is identical with side gate oxide thickness, T
effand H
effeffective channel width respectively after corresponding equivalent normalization and effective channel height, H
finand W
finchannel height and the width of practical devices respectively, ε
oxit is the electric medium constant of gate oxide.
When additional grid voltage is lower than threshold voltage, when namely device is in sub-threshold region, device is in the state exhausted, and device is not now also opened, and the inner electromotive force of raceway groove is much smaller compared to accurate fermi potential, then the exponential term after former Poisson equation
can ignore.Conveniently solve, the Poisson equation of former (1) formula is reduced to:
(10)
The definition of conventional threshold values voltage model: namely the electromotive force of surface potential minimum point equals the fermi potential of 2 times
time corresponding gate voltage.But the novel passive that this definition is studied for us leaks device inapplicable, because traditional devices conducting when channel surface strong inversion, and the conducting when part depletion of without source-drain device.The present invention adopts new threshold voltage definition for this reason: the grid voltage added when raceway groove is in part depletion, is threshold voltage.Specifically, the grid voltage added when channel center potential minima 2 times thermoelectrical potential less of accurate fermi potential is threshold voltage.
Determine that groove potential distributes by boundary condition formula (2) and formula (3), the groove potential distribution solution of following progression form can be obtained:
(11)
Above formula is substituted into Poisson equation formula (10), by Fourier expansion, can obtain:
(12)
In above formula
, will
by Fourier expansion:
(13)
Wherein
, then known
meet following two-dimentional partial differential equation:
(14)
Wushu (11) substitutes into formula (4), then will
by Fourier expansion, make
meet following Fourier transform:
(15)
Convolution (11) and formula (15), be namely expressed as constant item groove potential
with sine series item and form:
(16)
(17)
Convolution (11) and formula (16), because xyz is in three independently in dimension respectively, and device model has absolute convergence in three dimensions, and we can obtain groove potential expression formula thus:
(18)
Wherein
（19）
In formula
provided by (17) formula,
,
, t=T
eff/ 2, h=H
eff, m, n, and l is positive integer.
By formula (18), we determine the minimum point coordinate along channel center Potential Distributing
, its expression formula is approximately:
(20)
According to above-mentioned solution procedure, we can obtain the analytical expression of groove potential, get the electromotive force that trench bottom centre potential is minimum
for average potential
, that is:
（21）
When device channel electromotive force meets above formula, specify that now corresponding additional grid voltage is threshold voltage, be the analytic model that the present invention obtains threshold voltage:
(22)
Wherein:
,
,
,
。
Accompanying drawing explanation
Fig. 1 is without source-drain three gate metal oxide semiconductor field effect duct ligation composition.
Fig. 2 is without source-drain three gate metal oxide semiconductor field effect tube section figure.
Fig. 3 is threshold voltage and channel length graph of a relation.
Fig. 4 is threshold voltage and source-drain voltage graph of a relation.
Fig. 5 is threshold voltage and gate oxide thickness graph of a relation.
Fig. 6 is threshold voltage and dopant concentration graph of a relation.
Fig. 7 is the inventive method flow process diagram.
Embodiment
For the problem that background technology is mentioned, calculate without source-drain three gate field-effect transistor threshold voltage in existing TCAD simulation software, undertaken by numerical evaluation.
Calculated by our analytic model, can obtain the relation between threshold voltage and channel length, as shown in Figure 3, along with diminishing of channel length, threshold voltage can reduce, and this is the same with traditional inversion channel device.
Fig. 4 illustrates threshold voltage and source-drain voltage relation curve, the same with traditional inversion channel device, and along with the increase of source-drain voltage, threshold voltage reduces.
Fig. 5 shows the relation between threshold voltage and gate oxide thickness, and along with the increase of gate oxide thickness, threshold voltage can reduce, this characteristic and traditional inversion channel device different.Because for without source-drain tri-gate devices, it just starts conducting when part depletion, and charge carrier quantity depleted in raceway groove is directly proportional to gate oxide capacitance, gate oxide thickness is larger, oxide layer electric capacity is less, depleted carrier number is fewer, and the carrier number remained is more, so threshold voltage can be less.
Fig. 6 is given in the threshold voltage in different dopant concentration situations.Along with the increase of dopant concentration, threshold voltage can reduce, fast because the increase of dopant concentration, channel carrier concentration is caused to increase, grid voltage required when reaching part depletion reduces, and namely threshold voltage reduces, and this and traditional inversion channel device are also different.
Can see, utilize the present invention, fast, accurately can extract its this key parameter of threshold voltage, thus realize verifying the integrate circuit function designed rapidly, this all has great importance to optimized, behavior simulation.
Claims (1)
1. a without source-drain three grid structure field effect transistor threshold voltage rapid extracting method, it is characterized in that, first the groove potential distribution of this structure field effect transistor sub-threshold region is obtained by the Solving Three-Dimensional poisson Equation solved under rectangular coordinate system, then according to the definition of threshold voltage, in raceway groove, average potential equals accurate Fermi potential when deducting 2 times of thermoelectrical potentials, added grid voltage is threshold voltage, obtains threshold voltage analytic model, thus rapid extraction threshold voltage; This threshold voltage V
thanalytic model be:
Wherein, V
fbfor flat-band voltage, V
rfor reference potential, V
dsfor source-drain voltage, other parameter is as follows:
In above formula,
,
with
be respectively the channel length of three gate field-effect transistors, width and height, T
oxfor thickness of grid oxide layer;
with
for the specific inductive capacity of silicon and gate oxide; Q is electron charge; x
minalong channel center direction electromotive force minimum point; N
dfor channel region doping content, V
tbe thermoelectrical potential, under room temperature, equal 0.026V.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2588378Y (en) * | 2002-11-27 | 2003-11-26 | 电子科技大学 | AC/dc source and drainage carrent free transducer |
| CN102270263A (en) * | 2011-09-05 | 2011-12-07 | 复旦大学 | Metal-oxide-semiconductor field effect transistor (MOSFET) threshold voltage analytic model with Schottky source and drain double-grid structure |
| CN104360219A (en) * | 2014-11-20 | 2015-02-18 | 国家电网公司 | DC circuit ground fault auxiliary positioning device and method for power substation |
-
2015
- 2015-11-15 CN CN201510775618.XA patent/CN105447231A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2588378Y (en) * | 2002-11-27 | 2003-11-26 | 电子科技大学 | AC/dc source and drainage carrent free transducer |
| CN102270263A (en) * | 2011-09-05 | 2011-12-07 | 复旦大学 | Metal-oxide-semiconductor field effect transistor (MOSFET) threshold voltage analytic model with Schottky source and drain double-grid structure |
| CN104360219A (en) * | 2014-11-20 | 2015-02-18 | 国家电网公司 | DC circuit ground fault auxiliary positioning device and method for power substation |
Non-Patent Citations (1)
| Title |
|---|
| GUANGXI HU ET AL.: "Analytical models for threshold voltage,drain included barrier lowering effect of junctionless triple-gate finfets", 《PROCEEDINGS OF THE 10TH IEEE INTERNATIONAL CONFERENCE ON ASIC》 * |
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Application publication date: 20160330 |