CN105427886B - Data substep emphasis method during NAND Flash storage system saves - Google Patents
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Abstract
Data substep emphasis method during being saved the invention discloses a kind of NAND Flash storage system, the emphasis method is the following steps are included: after data are written in NAND flash storage, judge whether data block where data are written is fully written, and judges whether data block belongs to high wear block；If data block is fully written and belongs to high wear block, data block is marked, and records data renewal time；It during data, inquires labeled data block last time data and aggravates the implementation time of operation, and judge to implement whether the time reaches prefixed time interval；If implementing the time reaches the prefixed time interval, data exacerbation is carried out to labeled data block, and more new data aggravates operation and implements the time.Data substep emphasis method during the preservation, it is possible to reduce data retention failures rate promotes data storing reliability.
Description
Technical field
Data during being saved the invention belongs to technical field of data storage more particularly to a kind of NAND Flash storage system
Substep emphasis method.
Background technique
NAND FLASH memory have benefited from its height is handled up, low power consumption, shatter-proof, stability is high, low temperature resistant, calorific value is small,
Numerous advantages such as operating noise is low, in mobile phone, digital camera, USB flash disk, MP3, tablet computer, PC, high-performance computer,
The fields such as defense industry possess vast market prospect.
To meet the market urgent need growing to NAND flash storage capacity, NAND FLASH memory is in
Reveal that process constantly reduces and MLC (Multi-Level Cell, more level cells) technology extensive utilization two is big
Development trend.However memory capacity is effectively being promoted, while reducing per bit data carrying cost, NAND FLASH is same
Face more serious integrity problem.
In terms of construction, NAND FLASH memory is that the preservation for realizing data is stored based on floating gate charge, such as Fig. 1 (a)
It is shown.However, the floating gate charge leakage of NAND flash storage causes floating gate charge quantity to reduce between data retention period,
As shown in Fig. 1 (b), the loss of floating gate charge will will lead to error in data generation, and as shown in Fig. 1 (c), floating gate charge loss is continuous
Accumulation, leads to data retention failures.As NAND FLASH process constantly reduces, the storage list of NAND flash storage
The geometric dimension of first FGS floating gate structure constantly reduces, and leads to the reduction of floating gate charge storage quantity, at the same time, the fortune of MLC technology
With making data more sensitive to the variation of floating gate charge quantity, increasing sharply for the bit error rate is kept so as to cause data.
The program/erase number that the mass loss rates of NAND FLASH memory floating gate charge are subjected to its storage unit has
Close association.NAND flash storage unit is programmed/erasing operation during, be applied to storage unit tunnelling oxygen
Change layer on strong electrical field will induced oxidation layer defects generation, so that tunnel oxide decreasing insulating is caused, to make
The escape probability of floating gate charge increases.In the high eroded area of NAND flash storage, storage unit tunnel oxide layer defects
Constantly accumulation, declines floating gate charge quantity between data retention period rapidly, to cause serious data retention failures.
As NAND flash storage process constantly reduces and the extensive utilization of MLC technology, high eroded area
In excessively high data retention failures rate have become the key factor for restricting NAND FLASH data reliability.It is illustrated in figure 2
The data of a typical commercialization MLC NAND FLASH memory keep the bit error rate and storage unit program/erase number and
The curve synoptic diagram of the variation tendency of time data memory.Between data retention period, NAND flash storage data keep wrong
Mistake increases rapidly with the increase of storage unit program/erase number and the storage time of data, and the abrasion of storage unit
Degree, which has data holding error rate, to be significantly affected.As shown in Fig. 2, being lived through after 4 years data retention over time of experience
The NAND flash storage of 6000 program/erases, data retention failures rate are in the case of undergoing 3000 program/erases
7 times.Excessively high data retention failures rate has become the key for restricting NAND FLASH data reliability in high eroded area
Factor.
In real system application, according to different applications and data type, the reliable retention time of data is needed
Very big difference is sought.Wherein, for data types such as film, music, archive file, backup files, after system creation, often
It is not modified and refresh operation for a long time, what simultaneity factor required to realize such data in the period of very long can
By saving.Since retention time demand is longer, in the storing process of data, the integrity problem of such data becomes NAND
One of the significant challenge that flash storage is faced.
Summary of the invention
The present invention is directed to solve at least some of the technical problems in related technologies.For this purpose, the present invention needs
It is proposed data substep emphasis method during a kind of NAND Flash storage system saves, this method can reduce data and keep wrong
Accidentally rate promotes data storing reliability.
To solve the above-mentioned problems, the embodiment of the present invention proposes data point during a kind of NAND Flash storage system saves
Emphasis method is walked, method includes the following steps: judging to be written where data after data are written in NAND flash storage
Whether data block is fully written, and judges whether the data block belongs to high wear block；If the data block is fully written and belongs to
In high wear block, then the data block is marked, and records data renewal time；Between data retention period, inquiry is marked
The data block last time data of note aggravate the implementation time of operation, and between judging whether the implementation time reaches preset time
Every；And if the implementation time reaches the prefixed time interval, data is carried out to the labeled data block and are added
Weight, and more new data aggravates operation and implements the time.
Data substep emphasis method during NAND Flash storage system according to an embodiment of the present invention saves, by number
According to high wear block is marked after write-in, between data retention period, implements the time when the exacerbation operation of labeled data block and reach pre-
If when interval time, to the mark data block carry out substep exacerbation processing, it is possible to reduce memory cell data keep during due to
The accumulation of floating gate charge leak data and the data retention failures rate caused effectively promote the storage of NAND flash storage data
Reliability.
Wherein it is possible to be judged by the following manner whether the data block belongs to high wear block: by the data block
Programming experienced/erasable counting how many times judgement；Alternatively, given data is written to the data block, by data error rate
Measurement judgement；Alternatively, being sentenced after undergoing the known retention time by the measurement of the data error rate to the data block
It is disconnected.
Wherein, data exacerbation is carried out to the labeled data block by any one following method: passes through reading-weight
The method write carries out data exacerbation to the labeled data block；By the method for data page refreshing to the labeled number
Data exacerbation is carried out according to block；Data exacerbation is carried out to the labeled data block by the method for word line program crosstalk；Pass through
The method for reading crosstalk carries out data exacerbation to the labeled data block.
Specifically, wherein the NAND flash storage is MLC NAND flash storage, passes through reading-rewriting
Method data exacerbation is carried out to the labeled data block, specifically include: S10 and read in the labeled data block
All LSB (Least Significant Bit, LSB, minimum effective bit) page data；S11 returns the LSB page data
It is written in the labeled data block in corresponding LSB data page, wherein in the LSB page write back data, induce institute
The floating gate charge injection of NAND FLASH memory is stated to realize that floating gate charge pre-compensates for, it is single to storage to reduce data during saving
The sensibility of first floating gate charge loss, to realize high eroded area data preemphasis；And step S10-S11 is repeated, until
Reach the first preset times.
Wherein, the NAND flash storage is SLC (Single-Level Cell, single level cell) NAND
Flash storage carries out data exacerbation to the labeled data block by reading-rewriting method, specifically includes: S12,
Read all page datas in the labeled data block；The page data is written back to the labeled data by S13
In block in corresponding data page, wherein in the page data write-back, induce the floating gate electricity of the NAND FLASH memory
Lotus injection reduces the sensibility that data lose storage unit floating gate charge during saving to realize that floating gate charge pre-compensates for, from
And realize high eroded area data preemphasis；And step S12-S13 is repeated, until reaching the second preset times.
Specifically, wherein the NAND flash storage is MLC NAND flash storage, is refreshed by data page
Method data exacerbation is carried out to the labeled data block, wherein the NAND Flash of more level cells is deposited
Reservoir specifically includes: reading all LSB page data in the labeled data block；ECC is carried out to the LSB page data
(Error Correcting Code, error checking and correction code) decoding；If ECC successfully decoded, by the LSB page data
It is written back in the labeled data block in corresponding LSB data page, and repeats write back operations, until write-back number reaches
Third preset times.
Wherein, wherein the NAND flash storage is SLC NAND flash storage, is refreshed by data page
Method carries out data exacerbation to the labeled data block, specifically includes: reading all in the labeled data block
Page data；ECC decoding is carried out to the page data；If ECC successfully decoded, the page data is written back to described labeled
In data block in corresponding data page, and write back operations are repeated, until write-back number reaches the 4th preset times.
Specifically, wherein the NAND flash storage is MLC NAND flash storage, passes through word line program string
The method disturbed carries out data exacerbation to the labeled data block, wherein for the NAND Flash of more level cells
Memory specifically includes: being sequentially written in complete ' 1 ' data to all LSB data pages in the labeled data block, wherein
In LSB page operation, the floating gate charge for inducing the NAND FLASH memory is injected to realize that floating gate charge pre-compensates for,
The sensibility that data lose storage unit floating gate charge during saving is reduced, to realize high eroded area data preemphasis；
And it is repeatedly written operation, until write-in number reaches the 5th preset times.
Wherein, wherein the NAND flash storage is SLC NAND flash storage, passes through word line program crosstalk
Method data exacerbation is carried out to the labeled data block, specifically include: to all in the labeled data block
Data page is sequentially written in complete ' 1 ' data, wherein in the page operations, induces the floating gate electricity of the NAND FLASH memory
Lotus injection reduces the sensibility that data lose storage unit floating gate charge during saving to realize that floating gate charge pre-compensates for, from
And realize high eroded area data preemphasis；And it is repeatedly written operation, until write-in number reaches the 6th preset times.
Specifically, data exacerbation is carried out to the labeled data block by the method for reading crosstalk, specifically included: to institute
All data pages stated in labeled data block successively carry out repeatedly read operation, wherein in the read operation, induce
The floating gate charge injection of the NAND FLASH memory is to realize that floating gate charge pre-compensates for, and data are to storage during reducing preservation
The sensibility of unit floating gate charge loss, to realize high eroded area data preemphasis；And read operation is repeated, until
Reading times reach the 7th preset times.
Detailed description of the invention
(a), (b), (c) in Fig. 1 are that NAND FLASH memory carries out floating gate charge when data preservation in the related technology
Quantity changes schematic diagram；
Fig. 2 be in the related technology in NAND flash storage data retention failures rate with storage unit program/erase
Several curve synoptic diagrams with storage time variation tendency；
Fig. 3 is data substep exacerbation side during NAND Flash storage system according to an embodiment of the invention saves
The flow chart of method；
Fig. 4 is the flow chart of the marking phase of a specific embodiment according to the present invention；
Fig. 5 (a), (b), (c) and (d) are carrying out during data are kept for another specific embodiment according to the present invention
Data substep aggravates the contrast effect schematic diagram of processing；
Fig. 6 is that the substep of another specific embodiment according to the present invention aggravates the flow chart in stage；
Fig. 7 be it is according to an embodiment of the invention for MLC NAND flash storage using reading-rewriting
Method carries out the flow chart of data exacerbation to labeled data block；
Fig. 8 be it is according to an embodiment of the invention for SLC NAND flash storage using reading-rewriting
Method carries out the flow chart of data exacerbation to labeled data block；
(a), (b) and (c) are a specific embodiments according to the present invention in MLC NAND FLASH memory in Fig. 9
With in the process when LSB page data are by write-back device array voltage bias schematic diagram；
(a) and (b) in Figure 10 is the MLC NAND FLASH memory of another specific embodiment according to the present invention
LSB and MSB programmed algorithm schematic diagram；
Figure 11 be it is according to an embodiment of the invention for MLC NAND flash storage using data page refresh
Method the flow chart of data exacerbation is carried out to labeled data block；
Figure 12 be still another embodiment in accordance with the present invention for SLC NAND flash storage using data page brush
New method carries out the flow chart of data exacerbation to labeled data block；
Figure 13 be according to still another embodiment of the invention word line program is passed through for MLC NAND flash storage
The method of crosstalk carries out the flow chart of data exacerbation to labeled data block；
(a) and (b) are the methods using word line program crosstalk according to still another embodiment of the invention to quilt in Figure 14
The data block of label carries out the voltage bias of the device array of data exacerbation and floating gate charge injects schematic diagram；
Figure 15 be according to still another embodiment of the invention word line program is passed through for SLC NAND flash storage
The method of crosstalk carries out the flow chart of data exacerbation to labeled data block；
Figure 16 is that the use word line program crosstalk method of a specific embodiment according to the present invention carries out data storage period
Between step by step aggravate after device holding error rate contrast schematic diagram；
Figure 17 is the method using reading crosstalk of another specific embodiment according to the present invention to labeled data block
Carry out the flow chart of data exacerbation；And
Figure 18 (a) and (b) are the methods by reading crosstalk according to still another embodiment of the invention to labeled number
The voltage bias of the device array of data exacerbation is carried out according to block and charge injects schematic diagram.
Specific embodiment
The embodiment of the present invention is described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning to end
Same or similar label indicates same or similar element or element with the same or similar functions.Below with reference to attached
The embodiment of figure description is exemplary, it is intended to is used to explain the present invention, and is not considered as limiting the invention.
Present inventor is it is considered that since NAND flash storage data retention failures problem is due to floating gate charge
Loss between data retention period, so being kept for high eroded area data in NAND flash storage especially memory
The problem of reliability is significantly degenerated, the embodiment of the present invention are proposed by carrying out between data retention period to storage unit floating gate charge
It gradually compensates, data substep during the preservation of NAND Flash storage system is aggravated to realize, it is single that storage can be substantially reduced
The data retention failures rate caused during meta-data preservation due to the accumulative of floating gate charge leak data, to effectively be promoted
The reliability of NAND flash storage storing data.
Data during the NAND Flash storage system proposed according to embodiments of the present invention stores are described with reference to the accompanying drawings
Substep emphasis method.
In summary, data substep emphasis method can be with during the NAND Flash storage system of the embodiment of the present invention saves
It is divided into two separate phases, i.e. marking phase and substep aggravates the stage.Fig. 3 is the NAND according to one embodiment of the present of invention
The flow chart of data substep emphasis method during Flash storage system saves, as shown in figure 3, this method comprises:
S1 judges whether data block where data are written is fully written after data are written in NAND flash storage, with
And judge whether data block belongs to high wear block.
It should be noted that due in NAND flash storage, erasing operation in blocks, so in same
Storage unit programming/erasable number having the same so that the reliable similar temperament of the holding of storage unit in same block, thus this
The method of inventive embodiments carries out in blocks.
Specifically, it can be judged by the following manner whether data block belongs to high wear block: by being undergone to data block
Programming/erasable counting how many times judgement, due to NAND flash storage floating gate charge mass loss rates and its storage unit
Programming experienced/erasable number association, so by judging that programming/erasable number of data block experience may determine that its abrasion
Situation judges the data block for high wear block when the program/erase number of data block experience reaches preset times, wherein
Programming/erasable counting how many times can recorde in Flash layer (FTL, Flash translation layer), especially static
In abrasion equilibrium module.
Alternatively, given data is written to data block, judged by the measurement to data error rate, for example, if data are wrong
Accidentally rate reaches preset value, then judges the data block for high wear block.
Alternatively, being judged after undergoing the known retention time by the measurement of the data error rate to data block.
S2 is marked data block if data block is fully written and belongs to high wear block, and record data update when
Between.
Since the data retention characteristics of high eroded area data block decline, so between such block progress data retention period
Substep aggravates, and for non-high wear block, since itself data holding ability is stronger, divide during being kept without data
Step aggravates.
In short, determining after data write-in block where data, if the block has been write completely, and belong to
In high eroded area, then data renewal time is recorded, and be marked, this stage is marking phase.
Fig. 4 is the flow chart of the marking phase of a specific embodiment according to the present invention, as shown in figure 4, specifically including:
S100 carries out data access/write-in, and j is written in data, and data substep aggravates algorithm during trigger data saves.
S110, into marking phase algorithm.
S120, judges whether writing data blocks have been fully written, if it is, entering step S130, otherwise enters step
S160。
S130, the programming of the data block/erasable number record in queries static abrasion equilibrium module.
S140, judges whether the data block belongs to high wear block, if it is, entering step S150, otherwise enters step
S160.
The data block is marked in S150, and sets current system for the data of the data block exacerbation operating time
Time.
S160 exits exacerbation algorithm.
S3 inquires labeled data block last time data and aggravates the implementation time of operation, and sentence between data retention period
Whether implementation time of breaking reaches prefixed time interval.
S4 carries out data exacerbation to the labeled data block if the implementation time reaches prefixed time interval, and
More new data aggravates operation and implements the time.
Specifically, between data retention period, when the system is idle, each tag block is handled.It obtains one on tag block
The secondary implementation time for carrying out data and aggravating operation, and the time compares homologous ray now, if interval time have not yet been reached it is pre-
If time interval, then substep exacerbation algorithm exits.Otherwise, data are carried out to the tag block and aggravates operation, while more new data adds
Operation is implemented the time again, this stage is that substep aggravates the stage.
Substep exacerbation processing is carried out to the data block of high eroded area between data retention period, NAND Flash can be deposited
The storage unit floating gate charge of reservoir is gradually compensated, to substantially reduce during memory cell data saves due to floating gate electricity
The accumulation of lotus leakage quantity and the data retention failures rate that causes, improve the reliability of NAND flash storage storing data.
As shown in figure 5, the data substep that carries out during data are kept for a specific embodiment according to the present invention adds
The contrast effect schematic diagram handled again, wherein Fig. 5 (a) is floating gate charge quantity schematic diagram after programming；Fig. 5 (b) is data guarantor
Charge leakage leads to the schematic diagram of floating gate charge quantity reduction during depositing；Fig. 5 (c) conscientious data substep between data retention period adds
It handles again and the schematic diagram gradually compensated is lost to floating gate charge；Fig. 5 (d) is to aggravate to make after processing by data substep
Floating gate charge evapotranspiration controls the schematic diagram in reduced levels, reduces data error rate.
Fig. 6 is that the substep of a specific embodiment according to the present invention aggravates the flow chart in stage, as shown in fig. 6, specifically
Include:
S200, between data retention period, data access, data substep exacerbation side during trigger data saves in the system free time
Method.
S210 aggravates algorithm into substep.
S220 inquires the implementation time that data block last time data aggravate operation.
S230, judges whether interval time reaches prefixed time interval, if it is, entering step S240, otherwise enters
Step S250.
S240 carries out data exacerbation to the data block, and more new data aggravates operation and implements the time.
S250 exits exacerbation algorithm.
Wherein, it since after block is wiped, wherein data are no longer valid, is aggravated step by step during data are kept without continuing
Operation, so the existing label of reply is purged.Besides, during perfoming block erasing operation, if the block by
Label, should remove label.
As can be seen that data substep emphasis method during the NAND Flash storage system preservation of the embodiment of the present invention, leads to
It crosses and marks high wear block after data write-in, between data retention period, when the time is implemented in the exacerbation operation of labeled data block
When reaching preset interval time, substep exacerbation processing is carried out to the mark data block, it is possible to reduce memory cell data retention period
Between due to floating gate charge leak data accumulation and the data retention failures rate that causes, effectively promote NAND flash storage number
According to the reliability of storage.
The process for carrying out substep exacerbation processing to labeled data block data retention period is carried out below further detailed
It describes in detail bright.
Specifically, data exacerbation can be carried out to labeled data block by any one following method: by reading-
The method of rewriting carries out data exacerbation to labeled data block；Alternatively, by the method for data page refreshing to labeled number
Data exacerbation is carried out according to block；Alternatively, the method by word line program crosstalk carries out data exacerbation to labeled data block；Or
Person carries out data exacerbation to labeled data block by the method for reading crosstalk.Below in embodiment to above-mentioned several data
Emphasis method is illustrated.
Embodiment 1 carries out data exacerbation to labeled data block using reading-rewriting method.
Wherein, for MLC NAND flash storage, as shown in fig. 7, data exacerbation specifically includes:
S10 reads all LSB page data in labeled data block, i.e., will need in data weight (Block)
All LSB pages are sequential read out.
S11, by LSB page write back data into labeled data block in corresponding LSB data page, wherein in LSB page
When write back data, the floating gate charge injection of NAND FLASH memory is induced to realize that floating gate charge pre-compensates for, reduces storage life
Between data sensibility that storage unit floating gate charge is lost, to realize high eroded area data preemphasis.
Specifically, for example, in write-back, it is applied to high level in the unit floating gate of NAND flash storage.In write-back
In the process, there are array the memory cell voltages of different LSB data to bias during NAND flash storage, during write-back
The high level being applied in unit floating gate can induce floating gate charge and reinject, to carry out floating gate electricity to memory high eroded area
Lotus precompensation realizes that high eroded area data aggravate.Step S10-S11 is repeated, until reaching the first preset times, such as is repeated
N times, to reach more obvious floating gate charge compensation.
For SLC NAND flash storage, specifically included as shown in figure 8, carrying out data exacerbation:
S12 reads all page datas in labeled data block, it can be seen that is different from MLC NAND Flash
Only LSB data page is operated in memory, and does not have LSB/MSB data page for SLC NAND flash storage
It divides, so for being operated in SLC NAND flash storage to all data pages.
Page data is written back in labeled data block in corresponding data page, wherein in page data write-back by S13
When, the floating gate charge injection of NAND FLASH memory is induced to realize that floating gate charge pre-compensates for, and reduces data pair during saving
The sensibility of storage unit floating gate charge loss, to realize high eroded area data preemphasis.For example, applying in write-back
The high level in the unit floating gate of NAND flash storage.Step S12-S13 is repeated, until reaching the second preset times, example
It such as repeats N1 times, to reach more significant floating gate charge compensation.
Floating gate charge pre-compensates for mechanism in order to better understand, explains below NAND FLASH memory programmed algorithm
It states.
It wherein, include multiple bit informations, multiple bits in each storage unit in MLC NAND FLASH memory
Write storage unit stage by stage.
Firstly, carrying out LSB programming, the bit LSB of write-in, in this stage, according to specific LSB data, storage unit threshold value
Voltage is divided to two different windows.If LSB write-in 1, storage unit is in program-inhibit state, if LSB write-in 0,
Then storage unit is in programmed state
After LSB programming, when carrying out the write-in of MSB (Most Significant Bit, highest significant bit) data, deposit
Storage unit threshold voltage is further divided to four voltage windows by two voltage windows by reservoir.
The movement of storage unit threshold voltage is realized by carrying out floating gate charge injection to storage unit in programming process, is floated
Grid charge injection point multiple stages realize that the quantity of electric charge that each stage is injected is seldom, to prevent the movement of threshold voltage too fast.
Each floating gate charge injection stage is completed, and memory carries out the verification of storage unit threshold voltage, when threshold voltage is lower than default ginseng
When examining voltage (Vref), continue the injection of next stage floating gate charge, otherwise, stops programmed algorithm.
For SLC NAND FLASH memory, due to only having a bit in storage unit, so on only implementing
LSB programming phases described in text.
Realize that the mechanism of floating gate charge precompensation can be explained by Fig. 9 by page write-back.MLC NAND FLASH
Memory keeps Fault recovery to realize using LSB page write-back.Specifically, be illustrated in figure 9 according to the present invention one implementation
Example MLC NAND FLASH memory use during, the voltage of device array is inclined during LSB page data are by write-back
Set schematic diagram.
Referring to shown in (a), (b) and (c) in Fig. 9, in the process, algorithm reads storage unit in selected word line first
LSB data, and by write back data.If LSB data are 1, LSB programmed algorithm as shown in Figure 10 is it is found that the storage unit
In program-inhibit state.If LSB data are 0, which is in programmed state.For being in the storage list of program-inhibit state
Member, although unit biasing state as shown, its voltage for being applied is lower, can not cause significant floating gate charge note
Enter, however, since storage unit remains unchanged there are the high pressure that representative value is 12V, so slight floating gate charge injection phenomenon can not
It avoids, to realize that storage unit floating gate charge pre-compensates for.
And the storage unit for being in programming state, although the voltage applied is higher, due to the LSB of storage unit
It is in 0, so the threshold voltage of storage unit has been over corresponding predetermined reference voltage (Vref), so carrying out the
Algorithm stops after the injection of one stage floating gate charge, prevents crossing for floating gate charge from injecting, meanwhile, the floating gate that the first stage has been carried out
Charge injection is successfully made floating gate charge precompensation.
So all units have obtained slight floating gate charge injection to realize floating gate by LSB write back operations
Charge precompensation, while avoiding floating gate charge and cross injection and causing data corruption.
Embodiment 2 carries out data exacerbation to labeled data block by the method that data page refreshes.NAND Flash is deposited
There may be error in data in writing process for reservoir, this mistake is extended during data aggravate in order to prevent, can be first
It is decoded by ECC first and obtains correct data, and carries out write back data according to correct data, to realize that data aggravate.
Wherein, for MLC NAND flash storage, as shown in figure 11, data exacerbation is carried out by the method that page refreshes
It specifically includes:
S20 reads all LSB page data in labeled data block.
S21 carries out ECC decoding to LSB page data.
S22, judges whether ECC decoding succeeds, if it succeeds, entering step S23, otherwise enters step S25.
S23 by LSB page write back data into labeled data block in corresponding LSB data page, and repeats write-back behaviour
Make, until write-back number reaches third preset times, for example, repeating N2 times, to reach more significant floating gate charge compensation effect
Fruit.
S24, algorithm failure, loss of data.
For SLC NAND flash storage, as shown in figure 12, data is carried out by the method that page refreshes and are aggravated specifically
Include:
S25 reads all page datas in labeled data block.
S26 carries out ECC decoding to page data.
S27, judges whether ECC decoding succeeds, if ECC successfully decoded, enters step S28, otherwise enters step S29.
Page data is written back in labeled data block in corresponding data page by S28, and repeats write back operations, directly
Reach the 4th preset times to write-back number, for example, repeating N3 times, to reach more obvious floating gate charge compensation effect.
S29, algorithm failure, loss of data.
Embodiment 3 carries out data exacerbation to the labeled data block by the method for word line program crosstalk.
Wherein, for MLC NAND flash storage, as shown in figure 13, word line program cross-talk data aggravates specific packet
It includes:
S30 is sequentially written in complete ' 1 ' data to all LSB data pages in labeled data block, for MLC NAND
Flash storage, will be so that storage unit be in programming holddown to LSB data page write-in " 1 ", wherein operate in LSB page
When, the floating gate charge injection of NAND FLASH memory is induced to realize that floating gate charge pre-compensates for.For example, NAND Flash is stored
High level is imposed between the control gate and channel of the storage unit of device, shown in voltage bias such as Figure 14 (a), is inhibited in programming
Storage unit in state will not generate significant floating gate charge injection, however, the height between storage unit control gate and channel
Voltage will lure that the phenomenon is known as word line program crosstalk shown in slight floating gate charge injection phenomenon such as Figure 14 (b) into.Pass through
Word line program crosstalk can carry out floating gate charge precompensation to high eroded area, and data are to storage unit floating gate during reducing preservation
The sensibility of loss of charge realizes that high eroded area data aggravate.It, can in order to reach more significant floating gate charge compensation effect
To repeat above-mentioned write operation, until write-in number reaches the 5th preset times, for example, repeating N4 times.
For SLC NAND flash storage, as shown in figure 15, the exacerbation of word line program cross-talk data is specifically included:
S31 is sequentially written in complete ' 1 ' data to all data pages in labeled data block, wherein in page operations,
The floating gate charge injection of NAND FLASH memory is induced to realize that floating gate charge pre-compensates for, and data are to storage during reducing preservation
The sensibility of unit floating gate charge loss, thus realize high eroded area data preemphasis, for example, NAND flash storage
High level is imposed between the control gate and channel of storage unit.Different from MLC NAND flash storage only to LSB number
According to being operated, for being operated in SLC NAND flash storage to all data pages.
Further, in order to reach more significant floating gate charge compensation effect, above-mentioned write operation can be repeated, until
Write-in number reaches the 6th preset times, for example, repeating N5 times.
As shown in figure 16, data are carried out for the use word line program crosstalk method of a specific embodiment according to the present invention
After being aggravated step by step during storage, the holding error rate contrast schematic diagram of device, as shown, being 8 when choosing preemphasis degree N
It is secondary/3 months when, by 4 years holding times, the case where compared to not using data substep to aggravate, data error rate was reduced
66%, it is seen then that aggravate that the data error rate between data retention period can be effectively reduced by substep.
Embodiment 4 carries out data exacerbation to labeled data block by the method for reading crosstalk.
Specifically, as shown in figure 17, comprising: S40 is successively read out all data pages in labeled data block
Operation, wherein in read operation, the floating gate charge for inducing NAND FLASH memory is injected to realize that floating gate charge is mended in advance
It repays, the sensibility that data lose storage unit floating gate charge during saving is reduced, to realize high eroded area data pre-add
Weight, for example, imposing height between the control gate and channel of the storage unit of NAND flash storage when being read
Voltage during read operation, is applied to storage unit control gate in the voltage bias such as Figure 18 of device array shown in (a)
High voltage between channel will lure slight floating gate charge injection into as shown in Figure 18 (b), which is known as reading crosstalk, leads to
Floating gate charge precompensation can be carried out to high eroded area by crossing reading crosstalk, aggravate to operate to high eroded area data to realize.
Further, in order to reach more significant floating gate charge compensation effect, above-mentioned read operation can be repeated, until
Reading times reach the 7th preset times and for example carry out N6 read operation.
It should be noted that operation number of repetition such as N, N1, N2, N3, N4, N5, N6 need during implementation above
It is optimised, a large amount of generations for causing data to cross misprogrammed are excessively injected with prevent floating gate charge.Besides, for different
Block abrasion condition, prefixed time interval and the data implemented every time substep exacerbation intensity operate number of repetition can not
Together, for example, data block for serious wear, implementing the time interval that data substep aggravates can shorten, implemented every time
Data substep, which aggravates intensity, suitably to be aggravated.In addition, the data substep implemented aggravates strong when implementing data exacerbation operation
Degree can be same or different with exacerbation intensity before, and after implementing data and aggravating operation, preset time interval can be with
Same or different with time interval before, i.e., the time that progress data substep aggravates operation can be with even distribution, can also be with
Uneven substep.
In the explanation of this specification, any process described otherwise above or method description can in flow chart or herein
To be understood to, indicate to include the steps that one or more for realizing the executable instruction of specific logical function or process
Module, segment or the part of code, and the range of the preferred embodiment of the present invention includes other realization, wherein can not
By sequence shown or discussed, including according to related function by it is basic simultaneously in the way of or in the opposite order, to hold
Row function, this should be understood by the embodiment of the present invention person of ordinary skill in the field.
Expression or logic and/or step described otherwise above herein in flow charts, for example, being considered use
In the order list for the executable instruction for realizing logic function, may be embodied in any computer-readable medium, for
Instruction execution system, device or equipment (such as computer based system, including the system of processor or other can be held from instruction
The instruction fetch of row system, device or equipment and the system executed instruction) it uses, or combine these instruction execution systems, device or set
It is standby and use.For the purpose of this specification, " computer-readable medium ", which can be, any may include, stores, communicates, propagates or pass
Defeated program is for instruction execution system, device or equipment or the dress used in conjunction with these instruction execution systems, device or equipment
It sets.The more specific example (non-exhaustive list) of computer-readable medium include the following: there is the electricity of one or more wirings
Interconnecting piece (electronic device), portable computer diskette box (magnetic device), random access memory (RAM), read-only memory
(ROM), erasable edit read-only storage (EPROM or flash memory), fiber device and portable optic disk is read-only deposits
Reservoir (CDROM).In addition, computer-readable medium can even is that the paper that can print described program on it or other are suitable
Medium, because can then be edited, be interpreted or when necessary with it for example by carrying out optical scanner to paper or other media
His suitable method is handled electronically to obtain described program, is then stored in computer storage.
It should be appreciated that each section of the invention can be realized with hardware, software, firmware or their combination.Above-mentioned
In embodiment, software that multiple steps or method can be executed in memory and by suitable instruction execution system with storage
Or firmware is realized.It, and in another embodiment, can be under well known in the art for example, if realized with hardware
Any one of column technology or their combination are realized: having a logic gates for realizing logic function to data-signal
Discrete logic, with suitable combinational logic gate circuit specific integrated circuit, programmable gate array (PGA), scene
Programmable gate array (FPGA) etc..
Those skilled in the art are understood that realize all or part of step that above-described embodiment method carries
It suddenly is that relevant hardware can be instructed to complete by program, the program can store in a kind of computer-readable storage medium
In matter, which when being executed, includes the steps that one or a combination set of embodiment of the method.
In addition, term " first ", " second " are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance
Or implicitly indicate the quantity of indicated technical characteristic.Define " first " as a result, the feature of " second " can be expressed or
Implicitly include at least one this feature.In the description of the present invention, the meaning of " plurality " is at least two, such as two, three
It is a etc., unless otherwise specifically defined.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means specific features, structure, material or spy described in conjunction with this embodiment or example
Point is included at least one embodiment or example of the invention.In the present specification, schematic expression of the above terms are not
It must be directed to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be in office
It can be combined in any suitable manner in one or more embodiment or examples.In addition, without conflicting with each other, the skill of this field
Art personnel can tie the feature of different embodiments or examples described in this specification and different embodiments or examples
It closes and combines.
Although the embodiments of the present invention has been shown and described above, it is to be understood that above-described embodiment is example
Property, it is not considered as limiting the invention, those skilled in the art within the scope of the invention can be to above-mentioned
Embodiment is changed, modifies, replacement and variant.
Claims (10)
- Data substep emphasis method during 1. a kind of NAND Flash storage system saves, which comprises the following steps:After data are written in NAND flash storage, judge whether data block where data are written is fully written, and judgement Whether the data block belongs to high wear block；If the data block is fully written and belongs to high wear block, the data block is marked, and records data update Time；Between data retention period, the implementation time that labeled data block last time data aggravate operation is inquired, and described in judgement Implement whether the time reaches prefixed time interval；AndIf the implementation time reaches the prefixed time interval, data exacerbation is carried out to the labeled data block, And more new data aggravates operation and implements the time.
- Data substep emphasis method during 2. NAND Flash storage system as described in claim 1 saves, which is characterized in that It is judged by the following manner whether the data block belongs to high wear block:By judging data block programming experienced/erasable counting how many times；OrGiven data is written to the data block, is judged by the measurement to data error rate；OrAfter undergoing the known retention time, judged by the measurement of the data error rate to the data block.
- Data substep emphasis method during 3. NAND Flash storage system as claimed in claim 2 saves, which is characterized in that Data exacerbation is carried out to the labeled data block by any one following method:Data exacerbation is carried out to the labeled data block by reading-rewriting method；Data exacerbation is carried out to the labeled data block by the method that data page refreshes；Data exacerbation is carried out to the labeled data block by the method for word line program crosstalk；Data exacerbation is carried out to the labeled data block by the method for reading crosstalk.
- Data substep emphasis method during 4. NAND Flash storage system as claimed in claim 3 saves, which is characterized in that Wherein, the NAND flash storage is MLC NAND flash storage, is marked by reading-rewriting method to described The data block of note carries out data exacerbation, specifically includes:S10 reads all LSB page data in the labeled data block；S11, by the LSB page write back data into the labeled data block in corresponding LSB data page, wherein In When the LSB page write back data, the floating gate charge for inducing the NAND flash storage is injected to realize that floating gate charge is mended in advance It repays；AndStep S10-S11 is repeated, until reaching the first preset times.
- Data substep emphasis method during 5. NAND Flash storage system as claimed in claim 3 saves, which is characterized in that Wherein, the NAND flash storage is SLC NAND flash storage, is marked by reading-rewriting method to described The data block of note carries out data exacerbation, specifically includes:S12 reads all page datas in the labeled data block；The page data is written back in the labeled data block in corresponding data page, wherein in page data by S13 When write-back, the floating gate charge injection of NAND flash storage is induced to realize that floating gate charge pre-compensates for；AndStep S12-S13 is repeated, until reaching the second preset times.
- Data substep emphasis method during 6. NAND Flash storage system as claimed in claim 3 saves, which is characterized in that Wherein, the NAND flash storage is MLC NAND flash storage, by the method for data page refreshing to the quilt The data block of label carries out data exacerbation, specifically includes:Read all LSB page data in the labeled data block；ECC decoding is carried out to the LSB page data；If ECC successfully decoded, by the LSB page write back data into the labeled data block corresponding LSB data In page, and write back operations are repeated, until write-back number reaches third preset times.
- Data substep emphasis method during 7. NAND Flash storage system as claimed in claim 3 saves, which is characterized in that Wherein, the NAND flash storage is SLC NAND flash storage, by the method for data page refreshing to the quilt The data block of label carries out data exacerbation, specifically includes:Read all page datas in the labeled data block；ECC decoding is carried out to the page data；If ECC successfully decoded, the page data is written back in the labeled data block in corresponding data page, and Write back operations are repeated, until write-back number reaches the 4th preset times.
- Data substep emphasis method during 8. NAND Flash storage system as claimed in claim 3 saves, which is characterized in that Wherein, the NAND flash storage is MLC NAND flash storage, by the method for word line program crosstalk to described Labeled data block carries out data exacerbation, specifically includes:Complete ' 1 ' data are sequentially written in all LSB data pages in the labeled data block, wherein grasp in the LSB page When making, the floating gate charge injection of the NAND flash storage is induced to realize that floating gate charge pre-compensates for；AndIt is repeatedly written operation, until write-in number reaches the 5th preset times.
- Data substep emphasis method during 9. NAND Flash storage system as claimed in claim 3 saves, which is characterized in that Wherein, the NAND flash storage is SLC NAND flash storage, by the method for word line program crosstalk to described Labeled data block carries out data exacerbation, specifically includes:Complete ' 1 ' data are sequentially written in all data pages in the labeled data block, wherein in the page operations, The floating gate charge injection of the NAND flash storage is induced to realize that floating gate charge pre-compensates for；AndIt is repeatedly written operation, until write-in number reaches the 6th preset times.
- 10. data substep emphasis method during NAND Flash storage system as claimed in claim 3 saves, feature exist In the method by reading crosstalk specifically includes the labeled data block progress data exacerbation:All data pages in the labeled data block are successively read, wherein in the read operation, The floating gate charge injection of the NAND flash storage is induced to realize that floating gate charge pre-compensates for；AndRead operation is repeated, until reading times reach the 7th preset times.
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| CN107480012A (en) * | 2017-08-28 | 2017-12-15 | 郑州云海信息技术有限公司 | The data reconstruction method and data recovery system of a kind of solid state hard disc |
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