CN105425488A - Pixel driving circuit for blue phase liquid crystal display device - Google Patents
Pixel driving circuit for blue phase liquid crystal display device Download PDFInfo
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- CN105425488A CN105425488A CN201511003123.1A CN201511003123A CN105425488A CN 105425488 A CN105425488 A CN 105425488A CN 201511003123 A CN201511003123 A CN 201511003123A CN 105425488 A CN105425488 A CN 105425488A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- Microelectronics & Electronic Packaging (AREA)
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- Liquid Crystal Display Device Control (AREA)
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Abstract
The invention provides a pixel driving circuit for a blue phase liquid crystal display device. The pixel driving circuit comprises a first switch, a second switch, a third switch, a fourth switch and a fifth switch, wherein a control terminal of the first switch receives a first control signal, and a second terminal receives a first data signal; a control terminal of the second switch receives the first control signal, and a second terminal receives a second data signal; a control terminal of the third switch is coupled to a first clock signal through a first capacitor; a control terminal of the fourth switch is electrically coupled to a second clock signal rough a second capacitor; a first end of the fifth switch is coupled to first preset voltage. Compared with the prior art, the pixel driving circuit adopts analog data voltage to be matched with a step-index type slope clock signal for write-in of pixel voltage or determination of pixel opening time, pixel gray-to-gray is realized, and the driving mode requires a period of time for pre-charging, so that the problem of insufficient charging caused by severe variation of equivalent capacitance of a blue phase liquid crystal in a maintaining period and a scanning period can be solved.
Description
Technical field
The present invention relates to a kind of blue phase liquid crystal (BluePhaseLiquidCrystal, BPLC) display device, particularly relate to a kind of pixel-driving circuit for blue phase liquid crystal display device.
Background technology
In the prior art, the resolution of liquid crystal display is more and more higher, and frame frequency is also more and more faster, and grid (gate) opening time of conventional pixel circuit shortens gradually, thus also shortens the duration of charging of liquid crystal capacitance thereupon.Thus, the electric field frequency that liquid crystal molecule during charging in liquid crystal layer suffers also can accelerate, and when electric field frequency exceedes a certain frequency values, the dielectric coefficient of liquid crystal diminishes, and the electric capacity of its liquid crystal cell also can diminish.On the other hand, after gate turn-off makes the thin film transistor (TFT) closedown of image element circuit, the electric field that the liquid crystal molecule in liquid crystal cell is corresponding gets back to stable state, and the dielectric coefficient of liquid crystal also can return to original larger state.According to charge conservation theorem, the two-end-point voltage of its liquid crystal cell will decline, and causes luminance loss, and this phenomenon is referred to as dissipation effect (dissipationeffect).
In order to the bad situation of decline appears in the two-end-point voltage solving liquid crystal cell, generally need increase and a pixel storage capacitor (storagecapacitor) is set.But, at the liquid crystal indicator that operating frequency is higher, in the liquid crystal display (as blue phase liquid crystal display) of such as field sequence displayer (fieldsequentialdisplay), high-dielectric coefficient, ferroelectric liquid Crystal (ferroelectricLC), often need very large-area pixel storage capacitor, this has very large loss by causing aperture opening ratio.For blue phase liquid crystal display, the operating frequency (duty cycle corresponding to the gate drive signal of thin film transistor (TFT)) of normal liquid crystal panel is often below the low frequency of liquid crystal.But in blue phase liquid crystal display device, the operating frequency of panel is between the High-frequency and low-frequency of liquid crystal, or the frequency response of liquid crystal capacitance is too small, when this can cause thin film transistor (TFT) to turn off, liquid crystal voltage cannot keep or reduce instantaneously, and then output signal is diminished.
In addition, existing a kind of image element circuit framework improving dissipation effect uses a thin film transistor (TFT) to carry out the input of control data voltage as switch, another thin film transistor (TFT) forms source follower (sourcefollower), and the polarity of (inverse) liquid crystal that reversed by common electric voltage.This circuit is roughly divided into two benches when operating: the first stage is for during reset (resetperiod) and data input (datainputperiod), subordinate phase is glow phase (emissionperiod), but, the voltage put on liquid crystal in this image element circuit framework can be subject to threshold voltage (thresholdvoltage) drift effect of thin film transistor (TFT), finally causes picture to occur the situation of brightness irregularities.
In view of this, how to design a kind of pixel-driving circuit for blue phase liquid crystal display device, dissipation effect is avoided through reduction charge frequency, and improve the problem of the brightness irregularities caused by thin film transistor (TFT) threshold voltage shift, to overcome above-mentioned defect or the deficiency of prior art, it is the problem that person skilled is urgently to be resolved hurrily in the industry.
Summary of the invention
For the above-mentioned defect existing for pixel-driving circuit of the prior art, the invention provides a kind of novelty, can charge frequency be reduced and improve the pixel-driving circuit for blue phase liquid crystal display device of thin film transistor (TFT) threshold voltage shift situation.
According to one aspect of the present invention, provide a kind of pixel-driving circuit for blue phase liquid crystal display device, comprising:
One first switch, has a first end, one second end and a control end, and the control end of described first switch is in order to receive one first control signal, and the second end of described first switch is in order to receive one first data-signal;
One second switch, has a first end, one second end and a control end, and the control end of described second switch is in order to receive this first control signal, and the second end of described second switch is in order to receive one second data-signal;
One the 3rd switch, has a first end, one second end and a control end, and the control end of described 3rd switch is electrically coupled to the first end of described first switch and is electrically coupled to one first clock signal via one first electric capacity;
One the 4th switch, there is a first end, one second end and a control end, the control end of described 4th switch is electrically coupled to the first end of described second switch and is electrically coupled to a second clock signal via one second electric capacity, the first end of described 4th switch is electrically coupled to the second end of described 3rd switch, and the second end of described 4th switch is in order to receive one the 3rd control signal;
One the 5th switch, there is a first end, one second end and a control end, the control end of described 5th switch is electrically coupled to the first end of described 3rd switch, the first end of described 5th switch is electrically coupled to one first predeterminated voltage, and the second end of described 5th switch is electrically coupled to the pixel storage capacitor and a liquid crystal capacitance that are connected in parallel.
An embodiment wherein, described pixel-driving circuit also comprises: one the 6th switch, there is a first end, one second end and a control end, the control end of described 6th switch is electrically coupled to the first end of described 3rd switch, the first end of described 6th switch is electrically coupled to the control end of described 5th switch, and the second end of described 6th switch is in order to receive one second control signal.
An embodiment wherein, described first clock signal and described second clock signal are step clock, and the step cycle of described second clock signal is greater than the step cycle of described first clock signal.
An embodiment wherein, first clock signal and described second clock signal are step clock, the amplitude of wherein said first clock signal successively increase progressively and duration successively shorten, the amplitude of described second clock signal successively increase progressively and duration successively shorten.
An embodiment wherein, described first predeterminated voltage is a constant voltage or a step voltage with negative edge.
According to another aspect of the present invention, a kind of pixel-driving circuit for blue phase liquid crystal display device is provided, comprises:
One first switch, has a first end, one second end and a control end, and the control end of described first switch is in order to receive one first control signal, and the second end of described first switch is in order to receive one first data-signal;
One second switch, has a first end, one second end and a control end, and the control end of described second switch is in order to receive this first control signal, and the second end of described second switch is in order to receive one second data-signal;
One the 3rd switch, has a first end, one second end and a control end, and the control end of described 3rd switch is electrically coupled to the first end of described first switch and is electrically coupled to one first clock signal via one first electric capacity;
One the 4th switch, there is a first end, one second end and a control end, the control end of described 4th switch is electrically coupled to the first end of described second switch and is electrically coupled to a second clock signal via one second electric capacity, the first end of described 4th switch is electrically coupled to the second end of described 3rd switch, and the second end of described 4th switch is in order to receive one the 3rd control signal;
One the 5th switch, there is a first end, one second end and a control end, the control end of described 5th switch is electrically coupled to the first end of described 3rd switch, the first end of described 5th switch is electrically coupled to one first predeterminated voltage, and the second end of described 5th switch is electrically coupled to pixel storage capacitor in parallel and one end of liquid crystal capacitance;
One the 6th switch, there is a first end, one second end and a control end, the control end of described 6th switch is electrically coupled to the first end of described 3rd switch, the first end of described 6th switch is electrically coupled to pixel storage capacitor in parallel and the other end of liquid crystal capacitance, second end of described 6th switch is electrically coupled to one second predeterminated voltage, wherein, described first predeterminated voltage and described second predeterminated voltage is monotonically increasing step voltage and polarity is contrary.
An embodiment wherein, described first predeterminated voltage and the second predeterminated voltage initial voltage are separately common electric voltage.
According to another aspect of the invention, a kind of pixel-driving circuit for blue phase liquid crystal display device is provided, comprises:
One first switch, has a first end, one second end and a control end, and the control end of described first switch is in order to receive one first control signal, and the second end of described first switch is in order to receive one first data-signal;
One second switch, has a first end, one second end and a control end, and the control end of described second switch is in order to receive this first control signal, and the second end of described second switch is in order to receive one second data-signal;
One the 3rd switch, has a first end, one second end and a control end, and the control end of described 3rd switch is electrically coupled to the first end of described first switch and is electrically coupled to one first clock signal via one first electric capacity;
One the 4th switch, there is a first end, one second end and a control end, the control end of described 4th switch is electrically coupled to the first end of described second switch and is electrically coupled to a second clock signal via one second electric capacity, the first end of described 4th switch is electrically coupled to the second end of described 3rd switch, and the second end of described 4th switch is in order to receive one the 3rd control signal;
One the 5th switch, has a first end, one second end and a control end, and the first end of described 5th switch is electrically coupled to one first predeterminated voltage, and the second end of described 5th switch is electrically coupled to the pixel storage capacitor and a liquid crystal capacitance that are connected in parallel;
One the 6th switch, there is a first end, one second end and a control end, the control end of described 6th switch is electrically coupled to the first end of described 3rd switch, the first end of described 6th switch is electrically coupled to the second end of described 5th switch, and the second end of described 6th switch is electrically coupled to an earth terminal;
One the 7th switch, has a first end, one second end and a control end, and the control end of described 7th switch is electrically coupled to the control end of described 6th switch, and the second end of described 7th switch is electrically coupled to the control end of described 5th switch;
One the 8th switch, has a first end, one second end and a control end, and the first end of described 8th switch is electrically coupled to the control end of described 5th switch.
An embodiment wherein, the first clock signal and described second clock signal are step clock, wherein the amplitude of the first clock signal successively increase progressively and duration successively lengthen, the amplitude of described second clock signal successively increase progressively and duration successively lengthen.
An embodiment wherein, described first predeterminated voltage is a constant voltage or a step voltage with rising edge.
Adopt the pixel-driving circuit for blue phase liquid crystal display device of the present invention, comprise five switches and three electric capacity, the control end of its first switch receives one first control signal and the second termination receives one first data-signal, the control end of second switch receives this first control signal and the second termination receives one second data-signal, the control end of the 3rd switch is electrically coupled to the first end of the first switch and is electrically coupled to one first clock signal via one first electric capacity, the control end of the 4th switch is electrically coupled to the first end of second switch and is electrically coupled to a second clock signal via one second electric capacity, the first end of the 5th switch is electrically coupled to one first predeterminated voltage and the second end is electrically coupled to the pixel storage capacitor and a liquid crystal capacitance that are connected in parallel.Compared to prior art, the present invention utilizes the Ramp clock signal of analog data voltage collocation step change type carry out the write of pixel voltage or determine the time that pixel is opened, to carry out the switching of pixel gray level, this type of drive is because needing one period of precharge time thus the equivalent capacity that can overcome blue phase liquid crystal to make a variation violent caused undercharge problem in maintenance period (holdingtime) and scan period (scanningtime).In addition, operate with shutoff because above-mentioned switch all performs to open, the brightness irregularities phenomenon that the threshold voltage shift that therefore can improve thin film transistor (TFT) produces.
Accompanying drawing explanation
Reader, after having read the specific embodiment of the present invention with reference to accompanying drawing, will become apparent various aspects of the present invention.Wherein,
Fig. 1 illustrates the structural representation of a kind of pixel equivalent circuit of the prior art;
Fig. 2 illustrates according to the first embodiment of the present invention, for the structural representation of the pixel-driving circuit of blue phase liquid crystal display device;
Fig. 3 illustrates a preferred embodiment of the pixel-driving circuit of Fig. 2;
Fig. 4 A and Fig. 4 B illustrates the timing waveform of each key signal in the pixel-driving circuit of Fig. 3;
Fig. 5 illustrates the timing waveform of each key signal of another preferred embodiment of the pixel-driving circuit of Fig. 2;
Fig. 6 illustrates the timing waveform of each key signal of a preferred embodiment again of the pixel-driving circuit of Fig. 2;
Fig. 7 illustrates according to the second embodiment of the present invention, for the structural representation of the pixel-driving circuit of blue phase liquid crystal display device;
Fig. 8 illustrates according to the 3rd embodiment of the present invention, for the structural representation of the pixel-driving circuit of blue phase liquid crystal display device;
Fig. 9 illustrates the timing waveform of each key signal of a preferred embodiment of the pixel-driving circuit of Fig. 8;
Figure 10 illustrates the timing waveform of each key signal of another preferred embodiment of the pixel-driving circuit of Fig. 8;
Figure 11 illustrates according to the 4th embodiment of the present invention, for the structural representation of the pixel-driving circuit of blue phase liquid crystal display device; And
Figure 12 illustrates the timing waveform of each key signal of a preferred embodiment of the pixel-driving circuit of Figure 11.
Embodiment
The technology contents disclosed to make the application is more detailed and complete, and can refer to accompanying drawing and following various specific embodiment of the present invention, mark identical in accompanying drawing represents same or analogous assembly.But those of ordinary skill in the art should be appreciated that hereinafter provided embodiment is not used for limiting the scope that contains of the present invention.In addition, accompanying drawing, only for being schematically illustrated, is not drawn according to its life size.
With reference to the accompanying drawings, the embodiment of various aspects of the present invention is described in further detail.
Fig. 1 illustrates the structural representation of a kind of pixel equivalent circuit of prior art.With reference to Fig. 1, traditional pixel equivalent circuit comprises a thin film transistor (TFT) T, a liquid crystal capacitance Clc, a pixel storage capacitor Cst.Wherein, the grid of thin film transistor (TFT) T for receiving one scan signal, thus controls thin film transistor (TFT) T according to the noble potential of sweep signal or electronegative potential and opens or turn off; The source electrode of thin film transistor (TFT) T is for receiving data voltage Vdata; The drain electrode of thin film transistor (TFT) T is electrically coupled to one end of liquid crystal capacitance Clc and one end of pixel storage capacitor Cst.Liquid crystal capacitance Clc and pixel storage capacitor Cst is connected in parallel, and their other end is electrically coupled to common electric voltage.
As described in the background section, when the resolution of blue phase liquid crystal display is more and more higher, when frame frequency is more and more faster, the sweep signal Scan of thin film transistor (TFT) T duration also shorten gradually, thus the duration of charging of liquid crystal capacitance Clc is also shortened thereupon.After gate turn-off makes thin film transistor (TFT) T close, the electric field that the liquid crystal molecule in liquid crystal cell is corresponding gets back to stable state, and the dielectric coefficient of liquid crystal also can return to original larger state, but the two-end-point voltage of liquid crystal cell can decline, and causes luminance loss.Although prior art adopts some solutions to overcome dissipation effect, but the voltage put on liquid crystal in these circuit can be subject to threshold voltage (thresholdvoltage) drift effect of thin film transistor (TFT), causes picture to occur the situation of brightness irregularities.
In order to overcome above-mentioned defect of the prior art or deficiency, the application discloses a kind of pixel-driving circuit for blue phase liquid crystal display device of novelty.Wherein, Fig. 2 illustrates according to the first embodiment of the present invention, for the structural representation of the pixel-driving circuit of blue phase liquid crystal display device.
With reference to Fig. 2, in this embodiment, pixel-driving circuit of the present invention comprises five switches, that is, thin film transistor (TFT) T1 ~ T5.In fig. 2, the node that the drain electrode of the first switch T1 is connected with the grid of the 3rd switch T3 is d1, and corresponding node voltage is Vd1.The node that the drain electrode of second switch T2 is connected with the grid of the 4th switch T4 is d2, and corresponding node voltage is Vd2.
Specifically, the grid of the first switch T1 is in order to receive one first control signal S1, and the source electrode of the first switch T1 is in order to receive one first data-signal Vdata1.The grid of second switch T2 is in order to receive this first control signal S1, and the source electrode of second switch T2 is in order to receive one second data-signal Vdata2.The grid of the 3rd switch T3 is electrically coupled to the drain electrode of the first switch T1 and is electrically coupled to one first clock signal clk 1 via one first electric capacity C1.The grid of the 4th switch T4 is electrically coupled to the drain electrode of second switch T2 and is electrically coupled to a second clock signal CLK2 via one second electric capacity C2, the drain electrode of the 4th switch T4 is electrically coupled to the source electrode of the 3rd switch T3, and the source electrode of the 4th switch T4 is in order to receive one the 3rd control signal S3.The grid of the 5th switch T5 is electrically coupled to the drain electrode of the 3rd switch T3, and the drain electrode of the 5th switch T5 is electrically coupled to one first predeterminated voltage V1, and the source electrode of the 5th switch T5 is electrically coupled to the pixel storage capacitor Cst and a liquid crystal capacitance Clc that are connected in parallel.In addition, the grid of the 5th switch T5 is coupled to the 3rd electric capacity C3.
In fig. 2, the first clock signal clk 1 and second clock signal CLK2 are step clock.Such as, first clock signal clk 1 is eight rank, and the corresponding binary digit in every rank, if the amplitude of clock signal is 10V, then the threshold voltage shift of the thin film transistor (TFT) that 256L/10V is corresponding is 0.06V, significantly can improve thin film transistor (TFT) threshold voltage and to make a variation the brightness irregularities produced.By contrast, if the first clock signal clk 1 is three rank, the corresponding binary digit in every rank, when clock signal amplitude is 10V, then the threshold voltage shift of the thin film transistor (TFT) that 8L/10V is corresponding is up to 1V (adding about 16.7 times); If the first clock signal clk 1 is two rank, then the threshold voltage shift of the thin film transistor (TFT) that 4L/10V is corresponding increases 2.5V.Similarly, if the first clock signal clk 1 is three rank, when clock signal amplitude becomes 15V, then the threshold voltage shift that 8L/15V is corresponding is 1.5V.From relatively above-mentioned, the present invention at least can overcome brightness irregularities situation caused by threshold voltage shift by the signal waveform of the first clock signal.
Fig. 3 illustrates a preferred embodiment of the pixel-driving circuit of Fig. 2.Fig. 4 A and Fig. 4 B illustrates the timing waveform of each key signal in the pixel-driving circuit of Fig. 3.
Fig. 3 and Fig. 2 is compared, its key distinction is, the pixel-driving circuit of Fig. 3 also comprises one the 6th switch T6, and its grid is electrically coupled to the drain electrode of the 3rd switch T3, its drain electrode is electrically coupled to the grid of the 5th switch T5, and its source electrode is in order to receive one second control signal S2.
Composition graphs 4A and Fig. 4 B, the first control signal S1 comprise two time period t 1 and t2, and wherein, t1 represents reseting period, during t2 represents data input.In addition, Vth represents the threshold voltage of thin film transistor (TFT), and Vp represents pixel voltage.First clock signal clk 1 and second clock signal CLK2 are step clock signal, and the step cycle of second clock signal CLK2 is greater than the step cycle of the first clock signal clk 1.Further, the first predeterminated voltage V1 is the step signal on nine rank, therefore has the characteristic of the higher anti-threshold voltage shift of precision.
From the timing waveform of each key signal, after all pixels all input data voltage Vdata1 and Vdata2, more synchronously input the first predeterminated voltage V1 and clock signal clk 1, CLK2.Now, each pixel in panel just can complete corresponding gray scale voltage input according to its data voltage.
Fig. 5 illustrates the timing waveform of each key signal of another preferred embodiment of the pixel-driving circuit of Fig. 2.
With reference to Fig. 5, it is the schematic Control timing sequence of one of the pixel-driving circuit of Fig. 2.Specifically, first clock signal clk 1 and second clock signal CLK2 are step clock, wherein, the amplitude of the first clock signal clk 1 successively increase progressively and duration successively shorten, the amplitude of second clock signal CLK2 successively increase progressively and duration successively shorten.Further, the first predeterminated voltage V1 is a constant voltage (that is, continuing to keep same current potential).In this embodiment, pixel-driving circuit of the present invention can utilize the duration ratio of clock signal during each step to decide the bright dark degree of GTG.
Fig. 6 illustrates the timing waveform of each key signal of a preferred embodiment again of the pixel-driving circuit of Fig. 2.
Compared by Fig. 6 and Fig. 5, its key distinction is, the first predeterminated voltage V1 in Fig. 6 is for having a step voltage (as shown in dotted-line ellipse frame) of negative edge.Thus, this pixel-driving circuit can improve the low GTG control situation not easily of Fig. 5.In addition, also can find out from Fig. 6, node d1 is identical with CLK2 with clock signal clk 1 respectively with the voltage-phase of node d2.
Fig. 7 illustrates according to the second embodiment of the present invention, for the structural representation of the pixel-driving circuit of blue phase liquid crystal display device.
Compared by Fig. 7 and Fig. 2, its key distinction is, the pixel-driving circuit of Fig. 7 also comprises the 6th switch T6.Particularly, the grid of the 6th switch T6 is electrically coupled to the drain electrode of the 3rd switch T3, the drain electrode of the 6th switch T6 is electrically coupled to pixel storage capacitor Cst in parallel and one end of liquid crystal capacitance Clc, and the source electrode of the 6th switch T6 is electrically coupled to one second predeterminated voltage V2.Wherein, the first predeterminated voltage V1 and the second predeterminated voltage V2 is monotonically increasing step voltage and polarity is contrary.The grid of the 5th switch T5 is electrically coupled to the drain electrode of the 3rd switch T3, and the drain electrode of the 5th switch T5 is electrically coupled to one first predeterminated voltage V1, and the source electrode of the 5th switch T5 is electrically coupled to pixel storage capacitor in parallel and the other end of liquid crystal capacitance.Preferably, first predeterminated voltage V1 and the second predeterminated voltage V2 initial voltage are separately common electric voltage, due to both, all amplitude is identical and polarity contrary at any time, thus can solve feedthrough (feed-through) voltage problem that clock signal is brought.
Fig. 8 illustrates according to the 3rd embodiment of the present invention, for the structural representation of the pixel-driving circuit of blue phase liquid crystal display device.
Compared by Fig. 8 and Fig. 2, its key distinction is, the image element circuit of Fig. 8 also comprises extra three thin film transistor (TFT)s T6, T7 and T8.Particularly, the grid of the 6th switch T6 is electrically coupled to the drain electrode of the 3rd switch T3, and the drain electrode of the 6th switch T6 is electrically coupled to the source electrode of the 5th switch T5, and the source electrode of the 6th switch T6 is electrically coupled to an earth terminal.The grid of the 7th switch T7 is electrically coupled to the grid of the 6th switch T6, and the source electrode of the 7th switch T7 is electrically coupled to the grid of the 5th switch T5.The drain electrode of the 8th switch T8 is electrically coupled to the grid of the 5th switch T5.
Fig. 9 illustrates the timing waveform of each key signal of a preferred embodiment of the pixel-driving circuit of Fig. 8.
With reference to Fig. 9, it is the schematic Control timing sequence of one of the pixel-driving circuit of Fig. 8.Wherein, the first clock signal clk 1 and second clock signal CLK2 are step clock, the amplitude of the first clock signal clk 1 successively increase progressively and duration successively lengthen, the amplitude of second clock signal CLK2 successively increase progressively and duration successively lengthen.Further, the first predeterminated voltage V1 is a constant voltage.Similarly, this pixel-driving circuit can utilize the duration ratio of clock signal during each step (or being called the unevenness of counting) to decide the bright dark degree of GTG.
Figure 10 illustrates the timing waveform of each key signal of another preferred embodiment of the pixel-driving circuit of Fig. 8.
Compared by Figure 10 and Fig. 9, its key distinction is, the first predeterminated voltage V1 in Figure 10 is a step voltage with rising edge.Accordingly, when the low voltage of the first predeterminated voltage V1 before rising edge, pixel voltage Vp is also lower; When the high voltage of the first predeterminated voltage V2 after rising edge, pixel voltage Vp is also relatively high.
Figure 11 illustrates according to the 4th embodiment of the present invention, for the structural representation of the pixel-driving circuit of blue phase liquid crystal display device.Figure 12 illustrates the timing waveform of each key signal of a preferred embodiment of the pixel-driving circuit of Figure 11.
Compared by Figure 11 and Fig. 2, its key distinction is, the image element circuit of Figure 11 also comprises extra five thin film transistor (TFT)s T6, T7, T8, T9 and T10.
Specifically, the source electrode that the drain electrode of the 6th switch T6 is electrically coupled to pixel storage capacitor Cst in parallel and liquid crystal capacitance Clc, the 6th switch T6 is electrically coupled to one the 3rd predeterminated voltage V3.The grid of the 7th switch T7 is electrically coupled to the drain electrode of the 3rd switch T3, and the drain electrode of the 7th switch T7 is electrically coupled to the grid of the 5th switch T5.The grid of the 8th switch T8 is electrically coupled to the drain electrode of the 3rd switch T3, and the source electrode of the 8th switch T8 is electrically coupled to the grid of the 6th switch T6.The drain electrode of the 9th switch T9 is electrically coupled to the grid of the 5th switch T5, and the source electrode of the tenth switch T10 is electrically coupled to the grid of the 6th switch T6.In addition, the grid of the 5th switch T5 is also electrically coupled to one the 3rd electric capacity C3, and the grid of the 6th switch T6 is also electrically coupled to one the 4th electric capacity C4, and the grid of the 8th switch T8 is electrically coupled to one the 5th electric capacity C5.
As can be seen from the timing waveform of Figure 12, the first predeterminated voltage V1 and the 3rd predeterminated voltage V3 is step signal, and the amplitude of V3 is greater than the amplitude of V1.Further, all equal duration of each step of the first predeterminated voltage V1 and the 3rd predeterminated voltage V3.Meanwhile, the first clock signal clk 1 and second clock signal CLK2 are also step clock signal, and also equal duration of the two each step.In addition, the step cycle of second clock signal CLK2 is greater than the step cycle of the first clock signal clk 1.
From the above, apply to select signal through at the source electrode of thin film transistor (TFT) T9 or the drain electrode of thin film transistor (TFT) T10, the separation of odd even or height GTG can be realized.Such as, when selecting thin film transistor (TFT) T9 side, the first predeterminated voltage V1 charges to pixel capacitance Clc and corresponding with pixel voltage Vp, that is pixel voltage Vp now corresponds to the lower step voltage of current potential; When selecting thin film transistor (TFT) T10 side, 3rd predeterminated voltage V3 to pixel capacitance Clc charge and corresponding with pixel voltage Vp, that is, pixel voltage Vp now corresponds to the higher step voltage of current potential, and then realizes the separation of high gray (highgraylevel) or low GTG (lowgraylevel).
Adopt the pixel-driving circuit for blue phase liquid crystal display device of the present invention, comprise five switches and three electric capacity, the control end of its first switch receives one first control signal and the second termination receives one first data-signal, the control end of second switch receives this first control signal and the second termination receives one second data-signal, the control end of the 3rd switch is electrically coupled to the first end of the first switch and is electrically coupled to one first clock signal via one first electric capacity, the control end of the 4th switch is electrically coupled to the first end of second switch and is electrically coupled to a second clock signal via one second electric capacity, the first end of the 5th switch is electrically coupled to one first predeterminated voltage and the second end is electrically coupled to the pixel storage capacitor and a liquid crystal capacitance that are connected in parallel.Compared to prior art, the present invention utilizes the Ramp clock signal of analog data voltage collocation step change type carry out the write of pixel voltage or determine the time that pixel is opened, to carry out the switching of pixel gray level, this type of drive is because needing one period of precharge time thus the equivalent capacity that can overcome blue phase liquid crystal to make a variation violent caused undercharge problem in maintenance period (holdingtime) and scan period (scanningtime).In addition, operate with shutoff because above-mentioned switch all performs to open, the brightness irregularities phenomenon that the threshold voltage shift that therefore can improve thin film transistor (TFT) produces.
Above, the specific embodiment of the present invention is described with reference to the accompanying drawings.But those skilled in the art can understand, when without departing from the spirit and scope of the present invention, various change and replacement can also be done to the specific embodiment of the present invention.These change and replace and all drop in claims of the present invention limited range.
Claims (10)
1. for a pixel-driving circuit for blue phase liquid crystal display device, it is characterized in that, described pixel-driving circuit comprises:
One first switch, has a first end, one second end and a control end, and the control end of described first switch is in order to receive one first control signal, and the second end of described first switch is in order to receive one first data-signal;
One second switch, has a first end, one second end and a control end, and the control end of described second switch is in order to receive this first control signal, and the second end of described second switch is in order to receive one second data-signal;
One the 3rd switch, has a first end, one second end and a control end, and the control end of described 3rd switch is electrically coupled to the first end of described first switch and is electrically coupled to one first clock signal via one first electric capacity;
One the 4th switch, there is a first end, one second end and a control end, the control end of described 4th switch is electrically coupled to the first end of described second switch and is electrically coupled to a second clock signal via one second electric capacity, the first end of described 4th switch is electrically coupled to the second end of described 3rd switch, and the second end of described 4th switch is in order to receive one the 3rd control signal;
One the 5th switch, there is a first end, one second end and a control end, the control end of described 5th switch is electrically coupled to the first end of described 3rd switch, the first end of described 5th switch is electrically coupled to one first predeterminated voltage, and the second end of described 5th switch is electrically coupled to the pixel storage capacitor and a liquid crystal capacitance that are connected in parallel.
2. pixel-driving circuit according to claim 1, is characterized in that, described pixel-driving circuit also comprises:
One the 6th switch, there is a first end, one second end and a control end, the control end of described 6th switch is electrically coupled to the first end of described 3rd switch, the first end of described 6th switch is electrically coupled to the control end of described 5th switch, and the second end of described 6th switch is in order to receive one second control signal.
3. pixel-driving circuit according to claim 1, is characterized in that, described first clock signal and described second clock signal are step clock, and the step cycle of described second clock signal is greater than the step cycle of described first clock signal.
4. pixel-driving circuit according to claim 1, it is characterized in that, described first clock signal and described second clock signal are step clock, wherein, the amplitude of described first clock signal successively increase progressively and duration successively shorten, the amplitude of described second clock signal successively increase progressively and duration successively shorten.
5. pixel-driving circuit according to claim 4, is characterized in that, described first predeterminated voltage is a constant voltage or a step voltage with negative edge.
6. for a pixel-driving circuit for blue phase liquid crystal display device, it is characterized in that, described pixel-driving circuit comprises:
One first switch, has a first end, one second end and a control end, and the control end of described first switch is in order to receive one first control signal, and the second end of described first switch is in order to receive one first data-signal;
One second switch, has a first end, one second end and a control end, and the control end of described second switch is in order to receive this first control signal, and the second end of described second switch is in order to receive one second data-signal;
One the 3rd switch, has a first end, one second end and a control end, and the control end of described 3rd switch is electrically coupled to the first end of described first switch and is electrically coupled to one first clock signal via one first electric capacity;
One the 4th switch, there is a first end, one second end and a control end, the control end of described 4th switch is electrically coupled to the first end of described second switch and is electrically coupled to a second clock signal via one second electric capacity, the first end of described 4th switch is electrically coupled to the second end of described 3rd switch, and the second end of described 4th switch is in order to receive one the 3rd control signal;
One the 5th switch, there is a first end, one second end and a control end, the control end of described 5th switch is electrically coupled to the first end of described 3rd switch, the first end of described 5th switch is electrically coupled to one first predeterminated voltage, and the second end of described 5th switch is electrically coupled to pixel storage capacitor in parallel and one end of liquid crystal capacitance;
One the 6th switch, there is a first end, one second end and a control end, the control end of described 6th switch is electrically coupled to the first end of described 3rd switch, the first end of described 6th switch is electrically coupled to pixel storage capacitor in parallel and the other end of liquid crystal capacitance, second end of described 6th switch is electrically coupled to one second predeterminated voltage, wherein, described first predeterminated voltage and described second predeterminated voltage is monotonically increasing step voltage and polarity is contrary.
7. pixel-driving circuit according to claim 6, is characterized in that, described first predeterminated voltage and the second predeterminated voltage initial voltage are separately common electric voltage.
8. for a pixel-driving circuit for blue phase liquid crystal display device, it is characterized in that, described pixel-driving circuit comprises:
One first switch, has a first end, one second end and a control end, and the control end of described first switch is in order to receive one first control signal, and the second end of described first switch is in order to receive one first data-signal;
One second switch, has a first end, one second end and a control end, and the control end of described second switch is in order to receive this first control signal, and the second end of described second switch is in order to receive one second data-signal;
One the 3rd switch, has a first end, one second end and a control end, and the control end of described 3rd switch is electrically coupled to the first end of described first switch and is electrically coupled to one first clock signal via one first electric capacity;
One the 4th switch, there is a first end, one second end and a control end, the control end of described 4th switch is electrically coupled to the first end of described second switch and is electrically coupled to a second clock signal via one second electric capacity, the first end of described 4th switch is electrically coupled to the second end of described 3rd switch, and the second end of described 4th switch is in order to receive one the 3rd control signal;
One the 5th switch, has a first end, one second end and a control end, and the first end of described 5th switch is electrically coupled to one first predeterminated voltage, and the second end of described 5th switch is electrically coupled to the pixel storage capacitor and a liquid crystal capacitance that are connected in parallel;
One the 6th switch, there is a first end, one second end and a control end, the control end of described 6th switch is electrically coupled to the first end of described 3rd switch, the first end of described 6th switch is electrically coupled to the second end of described 5th switch, and the second end of described 6th switch is electrically coupled to an earth terminal;
One the 7th switch, has a first end, one second end and a control end, and the control end of described 7th switch is electrically coupled to the control end of described 6th switch, and the second end of described 7th switch is electrically coupled to the control end of described 5th switch;
One the 8th switch, has a first end, one second end and a control end, and the first end of described 8th switch is electrically coupled to the control end of described 5th switch.
9. pixel-driving circuit according to claim 8, it is characterized in that, described first clock signal and described second clock signal are step clock, wherein, the amplitude of described first clock signal successively increase progressively and duration successively lengthen, the amplitude of described second clock signal successively increase progressively and duration successively lengthen.
10. pixel-driving circuit according to claim 9, is characterized in that, described first predeterminated voltage is a constant voltage or a step voltage with rising edge.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201511003123.1A CN105425488A (en) | 2015-12-28 | 2015-12-28 | Pixel driving circuit for blue phase liquid crystal display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201511003123.1A CN105425488A (en) | 2015-12-28 | 2015-12-28 | Pixel driving circuit for blue phase liquid crystal display device |
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| CN105425488A true CN105425488A (en) | 2016-03-23 |
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| CN201511003123.1A Pending CN105425488A (en) | 2015-12-28 | 2015-12-28 | Pixel driving circuit for blue phase liquid crystal display device |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108597468A (en) * | 2018-04-26 | 2018-09-28 | 京东方科技集团股份有限公司 | Pixel circuit and its driving method, display panel, display device |
| CN108920007A (en) * | 2018-07-20 | 2018-11-30 | 京东方科技集团股份有限公司 | Touch-control report point threshold setting method and system |
| WO2022160469A1 (en) * | 2021-01-28 | 2022-08-04 | 上海树泉信息技术有限公司 | Liquid crystal pixel control circuit and control method |
| CN116543691A (en) * | 2023-05-19 | 2023-08-04 | 华南理工大学 | Gate driving circuit, active electroluminescent display and driving method |
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2015
- 2015-12-28 CN CN201511003123.1A patent/CN105425488A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108597468A (en) * | 2018-04-26 | 2018-09-28 | 京东方科技集团股份有限公司 | Pixel circuit and its driving method, display panel, display device |
| WO2019205481A1 (en) * | 2018-04-26 | 2019-10-31 | Boe Technology Group Co., Ltd. | Pixel circuit, driving method thereof, display panel, and display apparatus |
| US11238824B2 (en) | 2018-04-26 | 2022-02-01 | Boe Technology Group Co., Ltd. | Pixel circuit, driving method thereof, display panel, and display apparatus |
| CN108920007A (en) * | 2018-07-20 | 2018-11-30 | 京东方科技集团股份有限公司 | Touch-control report point threshold setting method and system |
| CN108920007B (en) * | 2018-07-20 | 2021-03-12 | 京东方科技集团股份有限公司 | Touch reporting threshold setting method and system |
| WO2022160469A1 (en) * | 2021-01-28 | 2022-08-04 | 上海树泉信息技术有限公司 | Liquid crystal pixel control circuit and control method |
| CN116543691A (en) * | 2023-05-19 | 2023-08-04 | 华南理工大学 | Gate driving circuit, active electroluminescent display and driving method |
| CN116543691B (en) * | 2023-05-19 | 2024-04-02 | 华南理工大学 | Gate driving circuit, active electroluminescent display and driving method |
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Application publication date: 20160323 |