CN105404065A - Film transistor array structure - Google Patents
Film transistor array structure Download PDFInfo
- Publication number
- CN105404065A CN105404065A CN201510887687.XA CN201510887687A CN105404065A CN 105404065 A CN105404065 A CN 105404065A CN 201510887687 A CN201510887687 A CN 201510887687A CN 105404065 A CN105404065 A CN 105404065A
- Authority
- CN
- China
- Prior art keywords
- film transistor
- channel metal
- thin film
- semiconductor switch
- oxide semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136254—Checking; Testing
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
A film transistor array structure comprises a first display zone, a first fan-out zone, and a second fan-out zone; at least a data line and at least a scan line mutually vertically extend in the display zone; the first fan-out zone comprises a first N channel metal oxidation semiconductor switch and a first measurement pad; the second fan-out zone comprises a second N channel metal oxidation semiconductor switch and a second measurement pad; a first measurement linear system extends between the display zone and the first fan-out zone; the first N channel metal oxidation semiconductor switch connects the end of the data line with the first measurement pad; a second measurement linear system extends between the display zone and the second fan-out zone; the second N channel metal oxidation semiconductor switch connects the end of the scan line with the second measurement pad. When the first and second N channel metal oxidation semiconductor switches are connected, voltage signal intensity of the signal line and scan line after linear attenuation can be directly obtained by measuring the first and second measurement pads.
Description
Technical field
This case relates to a display panel, particularly a kind of thin film transistor (TFT) array (ThinFilmTransistor (TFT) Array) structure being used for liquid crystal display, and the output signal of its sweep trace and data line can directly be measured.
Background technology
Thin Film Transistor-LCD (TFT-LCD, ThinFilmTransistorLiquidCrystalDisplay) is one of major product of current flat panel display, has become the important display platform of present information products and video product.
With reference to figure 1, the main drive principle of Thin Film Transistor-LCD 40 is that red/green/compressed signal of blue (R/G/B), control signal are connected with the connector 52 on printed circuit board (PCB) 50 by flat cable (not shown) with electric power by system board (not shown).Circuit board 50 is connected with thin film transistor (TFT) array (Array) 57 through gate chips (Gate-ChiponFilm, G-COF) 56 on source electrode chip (Source-ChiponFilm, S-COF) 54 on film and film.Then through the data line (Dataline) 58 in thin film transistor (TFT) array 57 and sweep trace (Scanline) 60 pairs of pixel electrode (not shown) chargings, thus the image displaying function of liquid crystal display 40 is realized.
Because the cabling of thin film transistor (TFT) array 57 exists certain electric capacity and resistance, so after the transmission of data line 58 and sweep trace 60, signal can produce distortion phenomenon.Therefore, in research and development of products and subsequent product analytic process, usually need to measure the voltage signal intensity after the data line 58 in thin film transistor (TFT) array 57 and sweep trace 60 transmission attenuation.But in actual applications because the end position of data line and sweep trace is at the edge of glass substrate, therefore only can glass substrate is carried out sliver get into the cave process after, just can measure.This method needs the time more of a specified duration, and after sliver boring, namely product is destroyed, and causes waste.Liquid crystal can be caused to volatilize after sliver boring simultaneously, after human body sucks, adverse influence can be caused to health.
Therefore, need to propose new thin film transistor array structure to solve the above problems.
Summary of the invention
The present invention is formed with the data line measured between pad with viewing area and is connected via the first and second N channel metal oxide semiconductor switch with sweep trace in the fanout area (fan-outarea) of the brilliant structure of arrays of a thin-film electro.Data line and the voltage signal intensity of scanning after line attenuation can be obtained by the voltage signal intensity measured on this measurement pad.
One embodiment of the invention propose a kind of thin film transistor array structure, are to be used in a liquid crystal display, and this thin film transistor array structure comprises: a viewing area; At least one fanout area; At least one data line and at least one signal wire extend in this viewing area orthogonally; One first and 1 second measures pad position in this at least one fanout area; One first and one second switch position is in this at least one fanout area; One first measures line connects this at least one data line and comes to be connected with this first measurement pad via this first switch; One second measures line connects this at least one sweep trace and comes to be connected with this second measurement pad via this second switch; Wherein, when this first and second switch is off, this liquid crystal display can normally act on, when this first switch is for being communicated with, voltage signal intensity after this at least one online data decay can be obtained by this first measurement pad of measurement, and when this second switch is for being communicated with, the voltage signal intensity on this at least one line sweep after decay can be obtained by this second measurement pad of measurement.
Preferably, described first and second open relation semiconductor switchs.
Preferably, described semiconductor switch is N channel metal-oxide semiconductor (MOS) (N-channelmetaloxidesemiconductor, N-MOS) switch.
Preferably, this first and second N channel metal oxide semiconductor switch, this first and second measure pad and this first and second measure line be when forming the assembly of this thin film transistor array structure together with formed simultaneously.
Preferably, this the first and second N channel metal oxide semiconductor switch controlled by the first and second signals respectively, when this first and second signal is low level, this the first and second N channel metal oxide semiconductor switch is off, when this first and second signal is high level, this first and second N channel metal oxide semiconductor switch is what be communicated with.
One embodiment of the invention also propose a kind of thin film transistor array structure, are to be used in a liquid crystal display, and this thin film transistor array structure comprises: a viewing area; One first fan-out position is above this viewing area; One second fan-out position is in the side of this viewing area; One first data line vertically extends on this viewing area; One first sweep trace flatly extends on this viewing area; One first N channel metal oxide semiconductor switch is formed in this first fanout area; One second N channel metal oxide semiconductor switch is formed in this second fanout area; One first measures pad is formed in this first fanout area; One second measures pad is formed in this second fanout area; One first measures line extends between this viewing area and this first fanout area, connects the end of this first data line, and is connected with this first measurement pad by this first N channel metal oxide semiconductor switch; And one second measures line extension between this viewing area and this second fanout area, connects the end of this first sweep trace, and be connected with this second measurement pad by this second N channel metal oxide semiconductor switch.
Preferably, this first and second N channel metal oxide semiconductor switch system controls by the first and second signals respectively.
Preferably, when this first and second signal is low level, this first and second N channel metal oxide semiconductor switch is off state, and now, this liquid crystal display can normally act on.
Preferably, when this first and second signal is high level, this the first and second N channel metal oxide semiconductor switch is connected state, now, measure this first and second voltage signal intensity measured on pad and can obtain this first data line and the voltage signal intensity of the first scanning after line attenuation.
Preferably, this first and second N channel metal oxide semiconductor switch, this first and second measure pad and this first and second measure line be when forming the assembly of this thin film transistor array structure together with formed simultaneously.
The present invention directly can directly obtain data line and the voltage signal intensity of scanning online after decay by the voltage signal intensity on the measurement pad measured in fanout area, it not only can simplify the destruction that measurement step also can avoid liquid crystal display, and reach fast, the advantage such as low cost and safety.
For making above-mentioned purpose of the present invention, feature and advantage become apparent, preferred embodiment cited below particularly also coordinates accompanying drawing to elaborate.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of conventional thin film transistor array;
Fig. 2 is the circuit diagram measured according to the thin film transistor (TFT) array associated data line of one embodiment of the invention; And
Fig. 3 is the circuit diagram measured according to the thin film transistor (TFT) array related scans line of embodiment of the present invention.
Embodiment
The explanation of following embodiment is graphic with reference to what add, can in order to the specific embodiment implemented in order to illustrate the present invention.The direction term that the present invention mentions, such as " on ", D score, "front", "rear", "left", "right", " interior ", " outward ", " side " etc., be only the direction with reference to annexed drawings.Therefore, the direction term of use is in order to illustrate and to understand the present invention, and is not used to limit the present invention.
The present invention is the problem that the data line in solution thin film transistor (TFT) array and the voltage signal after sweep trace transmission attenuation not easily measure, with reference to figure 2 and 3, its display is according to the thin film transistor (TFT) array 10 for a liquid crystal display 1 constructed by one embodiment of the invention.This thin film transistor (TFT) array 10 ties up to the end of the first data line (1stDataline) 12 and the first sweep trace (1stScanline) 14, increases by first and second and measures line 122,142 and first and second measurement pad 124,144.This thin film transistor (TFT) array 10 has viewing area 16 and first and second fanout areas 18,20.First 18, fanout area at viewing area 16 side, the second fanout area 20 then position above viewing area 16.
This first data line and the first sweep trace 12,14 tie up in this viewing area 16 and extend, and bearing of trend is mutually vertical: the first data line 12 extends for vertical, and the first sweep trace 14 is horizontal-extending.This first measurement line 122 extends between this viewing area 16 and this first fanout area 18, is horizontal-extending, and connects end and the one first switch M1 of this first data line 12.Preferably, this first switch M1 is semiconductor switch.More preferably this first switch M1 is n channel metal oxide semiconductor (NMOS, a N-channelmetaloxidesemiconductor) switch.This first n channel metal oxide semiconductor switch M1 system position is also connected with this first measurement pad 124 in this first fanout area 18.This second measurement line 142 extends between this viewing area 16 and this second fanout area 20, is vertical extension, and connects end and a second switch M2 of this first sweep trace 14.Preferably, this second switch M2 is semiconductor switch.More preferably this second switch M2 is n channel metal oxide semiconductor (NMOS, a N-channelmetaloxidesemiconductor) switch.This second n channel metal oxide semiconductor switch M2 system position between this second fanout area in 20 and and this second measurement pad 144 be connected.
This first n channel metal oxide semiconductor switch M1 is controlled by signal A, and this second n channel metal oxide semiconductor switch M2 is then by signal B is controlled.
When the liquid crystal display 1 with this thin film transistor (TFT) array 10 is for normally working, signal A and B is low level, and the first and second n channel metal oxide semiconductor switch M1 and M2 like this are in off-state, and this liquid crystal display 1 can normally show.On the other hand, when there being the intensity needing the voltage signal measured on this first data line 12 and/or this first sweep trace 14 after decay, then convert signal A and/or B to high level, like this first and/or second n channel metal oxide semiconductor switch M1 and M2 is at connected state, voltage signal after this decay can be sent to this measurement pad 124, on 144.Therefore, as long as directly measure this measurement pad 124, the voltage on 144 can obtain the voltage signal intensity after the decay on this first data line 12 and/or sweep trace 14.
Of the present invention first and second measure pad 124,144, first and second line 122 is measured, 142 and first and second n channel metal oxide semiconductor switch M1 with M2 can when forming the assembly in this thin film transistor (TFT) array 10 together with formed simultaneously, do not need extra equipment or operation.This person, the present invention can simplify the voltage signal intensity after measuring decay and must not have the structure destroying this liquid crystal display.Therefore the present invention can improve the shortcoming of located by prior art in fact greatly.
In sum; although the present invention discloses as above with preferred embodiment; but above preferred embodiment is also not used to limit the present invention; those of ordinary skill in the art; without departing from the spirit and scope of the present invention; all can do various change and retouching, the scope that therefore protection scope of the present invention defines with claim is as the criterion.
Claims (10)
1. a thin film transistor array structure, be used in a liquid crystal display, it is characterized in that, this thin film transistor array structure comprises:
One viewing area;
At least one fanout area;
At least one data line and at least one signal wire extend in this viewing area orthogonally;
One first and 1 second measures pad position in this at least one fanout area;
One first and one second switch position is in this at least one fanout area;
One first measures line connects the end of this at least one data line and comes to be connected with this first measurement pad via this first switch;
One second measures line connects the end of this at least one sweep trace and comes to be connected with this second measurement pad via this second switch;
Wherein, when this first and second switch is off, this liquid crystal display can normally act on, when this first switch is for being communicated with, voltage signal intensity after this at least one online data decay can be obtained by this first measurement pad of measurement, and when this second switch is for being communicated with, can be obtained by this second measurement pad of measurement at the voltage signal intensity of this at least one scanning after line attenuation.
2. thin film transistor array structure as claimed in claim 1, it is characterized in that, this first and second switch is semiconductor switch.
3. thin film transistor array structure as claimed in claim 2, it is characterized in that, this semiconductor switch is N channel metal-oxide semiconductor (MOS) (N-channelmetaloxidesemiconductor, N-MOS) switch.
4. thin film transistor array structure as claimed in claim 3, it is characterized in that, this first and second N channel metal oxide semiconductor switch, this first and second measure pad and this first and second measure line be when forming the assembly of this thin film transistor array structure together with formed simultaneously.
5. thin film transistor array structure as claimed in claim 3, it is characterized in that, this the first and second N channel metal-oxide semiconductor switch controlled by the first and second signals respectively, when this first and second signal is low level, this the first and second N channel metal oxide semiconductor switch is off, when this first and second signal is high level, this first and second N channel metal oxide semiconductor switch is what be communicated with.
6. a thin film transistor array structure, be used in a liquid crystal display, it is characterized in that, this thin film transistor array structure comprises:
One viewing area;
One first fan-out position is above this viewing area;
One second fan-out position is in the side of this viewing area;
One first data line vertically extends on this viewing area;
One first sweep trace flatly extends on this viewing area;
One first N channel metal oxide semiconductor switch is formed in this first fanout area;
One second N channel metal oxide semiconductor switch is formed in this second fanout area;
One first measures pad is formed in this first fanout area;
One second measures pad is formed in this second fanout area;
One first measures line extends between this viewing area and this first fanout area, connects the end of this first data line, and is connected with this first measurement pad by this first N channel metal oxide semiconductor switch; And
One second measures line extends between this viewing area and this second fanout area, connects the end of this first sweep trace, and is connected with this second measurement pad by this second N channel metal oxide semiconductor switch.
7. thin film transistor array structure as claimed in claim 6, it is characterized in that, this first and second N channel metal oxide semiconductor switch system controls by the first and second signals respectively.
8. thin film transistor array structure as claimed in claim 7, it is characterized in that, when this first and second signal is low level, this first and second N channel metal oxide semiconductor switch is off state, and now, this liquid crystal display can normally act on.
9. thin film transistor array structure as claimed in claim 8, it is characterized in that, when this first and second signal is high level, this the first and second N channel metal oxide semiconductor switch is connected state, now, measure this first and second voltage signal intensity measured on pad and can obtain this first data line and the voltage signal intensity of the first scanning after line attenuation.
10. thin film transistor array structure as claimed in claim 9, it is characterized in that, this first and second N channel metal-oxide semiconductor switch, this first and second measure pad and this first and second measure line be when forming the assembly of this thin film transistor array structure together with formed simultaneously.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510887687.XA CN105404065A (en) | 2015-12-04 | 2015-12-04 | Film transistor array structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510887687.XA CN105404065A (en) | 2015-12-04 | 2015-12-04 | Film transistor array structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105404065A true CN105404065A (en) | 2016-03-16 |
Family
ID=55469644
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510887687.XA Pending CN105404065A (en) | 2015-12-04 | 2015-12-04 | Film transistor array structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105404065A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109243348A (en) * | 2018-11-09 | 2019-01-18 | 惠科股份有限公司 | Measure signal circuit and its method for measurement |
| CN109243349A (en) * | 2018-11-09 | 2019-01-18 | 惠科股份有限公司 | Measure signal circuit and its method for measurement |
| CN109841181A (en) * | 2017-11-24 | 2019-06-04 | 上海和辉光电有限公司 | Array substrate, display panel and display device |
| CN111816120A (en) * | 2020-07-01 | 2020-10-23 | 深圳市华星光电半导体显示技术有限公司 | Display panel brightness compensation method and display panel |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0268522A (en) * | 1988-09-02 | 1990-03-08 | Matsushita Electric Ind Co Ltd | Active matrix substrate |
| US5428300A (en) * | 1993-04-26 | 1995-06-27 | Telenix Co., Ltd. | Method and apparatus for testing TFT-LCD |
| CN1412735A (en) * | 2001-10-11 | 2003-04-23 | 三星电子株式会社 | Film transistor array panel with visual checking device and its checking method |
| CN103293808A (en) * | 2013-05-28 | 2013-09-11 | 深圳市华星光电技术有限公司 | Display device and manufacturing method thereof |
| CN103956147A (en) * | 2014-05-12 | 2014-07-30 | 深圳市华星光电技术有限公司 | Grid electrode side fan-out area circuit structure |
-
2015
- 2015-12-04 CN CN201510887687.XA patent/CN105404065A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0268522A (en) * | 1988-09-02 | 1990-03-08 | Matsushita Electric Ind Co Ltd | Active matrix substrate |
| US5428300A (en) * | 1993-04-26 | 1995-06-27 | Telenix Co., Ltd. | Method and apparatus for testing TFT-LCD |
| CN1412735A (en) * | 2001-10-11 | 2003-04-23 | 三星电子株式会社 | Film transistor array panel with visual checking device and its checking method |
| CN103293808A (en) * | 2013-05-28 | 2013-09-11 | 深圳市华星光电技术有限公司 | Display device and manufacturing method thereof |
| CN103956147A (en) * | 2014-05-12 | 2014-07-30 | 深圳市华星光电技术有限公司 | Grid electrode side fan-out area circuit structure |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109841181A (en) * | 2017-11-24 | 2019-06-04 | 上海和辉光电有限公司 | Array substrate, display panel and display device |
| CN109841181B (en) * | 2017-11-24 | 2022-08-19 | 上海和辉光电股份有限公司 | Array substrate, display panel and display device |
| CN109243348A (en) * | 2018-11-09 | 2019-01-18 | 惠科股份有限公司 | Measure signal circuit and its method for measurement |
| CN109243349A (en) * | 2018-11-09 | 2019-01-18 | 惠科股份有限公司 | Measure signal circuit and its method for measurement |
| WO2020093450A1 (en) * | 2018-11-09 | 2020-05-14 | 惠科股份有限公司 | Signal measurement circuit and measurement method thereof |
| CN109243348B (en) * | 2018-11-09 | 2021-09-14 | 惠科股份有限公司 | Signal measuring circuit and measuring method thereof |
| CN111816120A (en) * | 2020-07-01 | 2020-10-23 | 深圳市华星光电半导体显示技术有限公司 | Display panel brightness compensation method and display panel |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7532265B2 (en) | Integrated circuit with the cell test function for the electrostatic discharge protection | |
| JP4006304B2 (en) | Image display device | |
| US20150077681A1 (en) | Liquid crystal display panel | |
| CN105404065A (en) | Film transistor array structure | |
| US9835917B2 (en) | Baseplate circuit and display panel | |
| CN102621721A (en) | Liquid crystal panel, liquid crystal module and method for clarifying reasons resulting in poor screen images thereof | |
| JP2004310026A (en) | Liquid crystal display device | |
| EP3131088A1 (en) | Liquid crystal drive circuit, backlight circuit, terminal, device and method | |
| CN102073159B (en) | Repair circuit of display panel and repair method thereof | |
| US20180286296A1 (en) | Array Substrate, Display Panel and Test Method Thereof and Display Device | |
| CN101097673A (en) | Electrostatic discharge protection integrated circuit with single-sided board function testing | |
| CN101539700B (en) | Liquid crystal display | |
| CN110211517A (en) | Display base plate and its detection method, display device | |
| CN109215577B (en) | Driving circuit, driving method and display panel | |
| CN100592371C (en) | Liquid crystal display device and its driving method | |
| CN108267878B (en) | Liquid crystal display device having a plurality of pixel electrodes | |
| WO2017063232A1 (en) | Touch-screen wiring circuit, display panel and display device | |
| TWI345751B (en) | Control-device with improved test-properties | |
| JP2005122209A (en) | Active-matrix-type liquid crystal display panel and method of inspecting same | |
| CN103336397B (en) | A kind of array base palte, display panel and display device | |
| US11644723B2 (en) | Electrostatic discharge (ESD) protection structure and display panel | |
| JP4637868B2 (en) | Image display device | |
| US11715398B2 (en) | Measurement signal circuit and measurement method thereof | |
| CN101192383A (en) | LCD device and its drive circuit and driving method | |
| CN108010475B (en) | Display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160316 |
|
| RJ01 | Rejection of invention patent application after publication |