CN105391539B - QPSK carrier synchronization lock detectors - Google Patents
QPSK carrier synchronization lock detectors Download PDFInfo
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- CN105391539B CN105391539B CN201510677343.6A CN201510677343A CN105391539B CN 105391539 B CN105391539 B CN 105391539B CN 201510677343 A CN201510677343 A CN 201510677343A CN 105391539 B CN105391539 B CN 105391539B
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- lock
- carrier
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/06—Speed or phase control by synchronisation signals the synchronisation signals differing from the information signals in amplitude, polarity or frequency or length
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- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
A kind of a kind of QPSK carrier locks detector proposed by the present invention, it is desirable to provide device being capable of providing the locking instruction of QPSK carrier synchronization rings.The technical scheme is that：Carrier synchronization ring NCO circuit outputs control pulse, integrate-dump filter makees integrate-dump operation under the action of controlling pulse to the zero intermediate frequency tributary signal of input, integrate-dump operation result pass through respectively absolute value circuit and two interval statistics circuits obtain signal two sections amplitude distribution statistical result, the statistical result of first interval obtains the operation result of first interval with lock-in threshold multiplication, operation result of the statistical result of second interval directly as second interval, the operation result while input comparator in two sections, operation result from two sections is compared, instruction whether output judgement QPSK carrier synchronization rings locking.The present invention is wider compared to the adaptation of the SNR ranges of existing QPSK carrier synchronizations lock detecting method, can provide False Rate lower locking instruction.
Description
Technical field
The present invention relates to utilize distribution probability to judge quadrature phase shift keying QPSK carrier waves in a kind of digital coherent communication system
Synchronous lock detector.
Background technology
In the down going channel of digital communication system, due to being influenced by the characteristic of channel and oscillator are unstable, system
The modulated signal that receives can have certain frequency deviation and phase error with local carrier, need carrier synchronization extract one with connect
Modulation carrier wave in the collection of letters number realizes coherent demodulation with frequency with the coherent carrier of phase, the signal eliminated local carrier and received
Frequency, phase error, with ensure demodulation correctness.The performance of carrier synchronization directly influences the performance of entire receiver,
Therefore Carrier Synchronization is one of key technology of receiver.In the realization of carrier synchronization, generally require by capturing carrier
With two stages of carrier track.The capturing carrier stage wishes there is wider bandwidth, the letter of the energy larger frequency departure of fast Acquisition
Number；The carrier track stage wishes the bandwidth for having relatively narrow, to reduce the variance of carrier phase estimation.Carrier lock judgement is exactly to be
Receiver provides the module that carrier recovery loop is in tracking mode or trapped state.Realize the side of QPSK carrier locks judgement
Method includes two kinds of statistic law and threshold method.To judge the state of current carrier synchronization, it includes second order that statistic law, which usually requires to calculate,
The statistic of square and quadravalence away from equal signals, thresholding rule by comparing signal and fixed threshold Jing Guo carrier synchronization loop phase
To size.In the above conventional process, statistic law realizes that more complex and under low signal-to-noise ratio False Rate is higher, and threshold method also has
Easily false the shortcomings that locking under low signal-to-noise ratio, and in the engineer application in the fields such as space flight measurement and control, satellite application, high-speed digital transmission, user
Generally require the carrier synchronization lock-out state of accurately understanding present receiving machine.
Invention content
In order to overcome the drawbacks described above that QPSK carrier locks are adjudicated in conventional process, the present invention to provide a kind of to coherent communication
In carrier synchronization ring lock-out state be detected the device of judgement, which can adapt to broader SNR ranges, detect
Judge that result is more acurrate reliable.
The technical solution adopted by the present invention to solve the technical problems is：A kind of QPSK carrier synchronizations lock detector, packet
It includes carrier synchronization ring NCO circuits, count electricity for realizing the quadrature phase shift keying QPSK signal distributions of output signal probability nature
Road and for realizing to carrier loop carry out locking decision Dynamic comparison circuit, it is characterised in that：QPSK signal distributions count
Circuit is separately connected Dynamic comparison circuit and carrier synchronization ring NCO circuits, QPSK signal distributions statistical circuit and Dynamic comparison electricity
The connected QPSK carrier synchronization locking decision circuits in road control pulse by carrier synchronization ring NCO circuit outputs, and control is to input
The integrate-dump operation of baseband signal；In QPSK signal distributions statistical circuits, integrate-dump filter is sequentially connected in series absolute value
Circuit and two parallel interval statistics circuits, carrier synchronization ring NCO circuit outputs control pulse, and integrate-dump filter is being controlled
Integrate-dump operation is made to the zero intermediate frequency tributary signal of input under the action of pulse processed, integrate-dump operation result passes through absolute value
Circuit obtains integrated absolute, and integrated absolute is divided two-way to give an interval statistics circuit, Liang Gequ parallel by absolute value circuit
Between statistical circuit calculate separately agreement statistical signal points in signal fall in two sections signal points, obtain signal two
The amplitude distribution statistical result in a section, wherein the statistics interval range in two statistical circuits is by 3 dynamically configurable doors
Limit and its signal points determine that points statistical result and the lock-in threshold multiplication of first interval obtain the operation of first interval
As a result, the signal of second interval is counted, statistical result is directly as the operation result of second interval, the operation result in two sections
Dynamic comparer is inputted simultaneously, dynamic comparer is compared the operation result from two sections, and output judgement QPSK is carried
Wave synchronizes instruction whether ring locking, and signal meets the characteristic of rayleigh distributed when entering lock-out state according to carrier synchronization ring, has
Extract to effect substantive characteristics when reflection carrier synchronization ring locking.
The present invention has the advantages that compared with the prior art：
Detection judgement result is more acurrate reliable.The present invention uses QPSK signal distributions statistical circuit and Dynamic comparison circuit phase
QPSK carrier synchronization locking decision circuits even control pulse by carrier synchronization ring NCO circuit outputs, and control is to inputting base
The integrate-dump operation of band signal, integrate-dump operation result passes through absolute value circuit respectively and two interval statistics circuits obtain
For signal in the amplitude distribution statistical result in two sections, dynamic comparer is compared the operation result from two sections,
Instruction whether output judgement QPSK carrier synchronization rings locking.The processing method is believed when entering lock-out state according to carrier synchronization ring
The characteristic for number meeting rayleigh distributed efficiently extracts out the substantive characteristics when locking of reflection carrier synchronization ring, therefore detects judgement knot
Fruit is more acurrate reliable.
It can adapt to broader SNR ranges.The lock-in threshold coefficient of Dynamic comparison circuit can be according to noise in the present invention
It is adjusted than dynamic, therefore can adapt to broader SNR ranges.
Description of the drawings
This patent is further illustrated with reference to the accompanying drawings and examples.
Fig. 1 is the circuit theory schematic diagram of QPSK carrier locks detector of the present invention.
Fig. 2 is locked out signal amplitude probability distribution and statistics interval diagram under state.
Specific implementation mode
In a most preferred embodiment of Fig. 1 descriptions, QPSK carrier lock detectors include mainly：Carrier synchronization ring NCO
Circuit is locked for realizing the QPSK signal distributions statistical circuit of output signal probability nature and for realizing to carrier loop
Surely the Dynamic comparison circuit adjudicated.In other words, the carrier synchronization lock detector by an integrate-dump filter, one
Absolute value circuit, two interval statistics circuits, a multiplier, a comparator and a carrier synchronization ring NCO circuits composition.
Wherein, QPSK signal distributions statistical circuit is separately connected Dynamic comparison circuit and carrier synchronization ring NCO circuits, in QPSK signals point
In cloth statistical circuit, integrate-dump filter is sequentially connected in series absolute value circuit and two parallel interval statistics circuits, and carrier wave is same
It walks ring NCO circuit outputs and controls pulse, integrate-dump filter believes the zero intermediate frequency branch of input under the action of controlling pulse
Number make integrate-dump operation, integrate-dump operation result passes through absolute value circuit respectively and two interval statistics circuits obtain signal
Amplitude distribution statistical result in two sections, wherein the signal points statistical result and lock-in threshold coefficient phase of first interval
The multiplied operation result to first interval, second interval signal points statistical result directly as second interval operation knot
Fruit, the operation result while input comparator in two sections, comparator is compared the operation result from two sections, defeated
Go out to adjudicate the instruction whether locking of QPSK carrier synchronization rings.
Carrier synchronization ring NCO circuits realize that accumulator to phase control words produce in cumulative process using accumulator
Control pulse of the raw carry pulse as integrate-dump filter.
QPSK signal distributions statistical circuit makees integrate-dump operation, the result of integrate-dump operation in the case where controlling impulse action
Integrated absolute is obtained by absolute value circuit, the above results give two interval statistics circuits parallel, obtain signal at two
Amplitude distribution statistical result in section.
Statistics interval range in two statistical circuits determines by 3 dynamically configurable thresholdings, as shown in Figure 2.Wherein
The signal that first interval statistical signal amplitude is less than thresholding 1 is counted, and second interval statistical signal amplitude is more than thresholding 2 and is less than door
The signal points of limit 3, two interval statistics circuits calculate separately signal in agreement statistical signal points and fall in two sections
Signal is counted, and counter is counted, while accumulator counts to the signal for meeting section condition and adds up, and works as counting
The count value of device reaches the result that the value of output accumulator after agreement statistical signal points is counted as this and empties accumulator,
So cycle.The value of agreement statistical signal points can be set according to emulation or debugging result, can also be run in circuit
Dynamic configuration in journey.
Dynamic comparison circuit is made of the multiplier and comparator of participation first interval operation, the statistical circuit in two sections
The comparator of the common output locking instruction that is connected.The operation result while input comparator in two sections of statistical circuit, than
Compared with the size that device compares the operation result of first interval and the operation result of second interval, if the operation result of second interval is big
In the operation result of first interval, then judgement is that QPSK carrier synchronization rings lock, and otherwise judgement is that QPSK carrier synchronization rings are not locked
It is fixed.
If carrier synchronization ring NCO circuits enter lock-out state, signal amplitude is distributed in Rayleigh distributed on probability,
Signal amplitude falls the probability in second interval and is more than the probability fallen in first interval, that is, the signal points of second interval are more than
The signal of first interval is counted, and the operation result that second interval is met under suitable lock-in threshold coefficient is more than first interval
Operation result, comparator decision lock for carrier synchronization ring；If carrier synchronization ring NCO circuits do not enter into lock-out state,
Signal amplitude, which is distributed on probability, disobeys rayleigh distributed, and the operation of second interval is unsatisfactory under suitable lock-in threshold coefficient
As a result it is more than the operation result of first interval, comparator decision is that carrier synchronization ring does not lock.
Lock-in threshold coefficient can in QPSK carrier lock decision circuit operational process dynamic configuration, the numerical value of coefficient according to
Different signal-to-noise ratio dynamics adjust.
Fig. 2 describes signal amplitude probability distribution and counts the relativeness in section.The in-phase branch of QPSK signals and just
Hand over branch mutually orthogonal, and the envelope Rayleigh distributed of the sum of two orthogonal Gaussian noise signals.
Claims (10)
1. a kind of QPSK carrier synchronizations lock detector, including it is carrier synchronization ring NCO circuits, special for realizing output signal probability
Property quadrature phase shift keying QPSK signal distributions statistical circuit and for realizing to carrier loop carry out locking decision dynamic ratio
Compared with circuit, it is characterised in that：QPSK signal distributions statistical circuits are separately connected Dynamic comparison circuit and carrier synchronization ring NCO electricity
Road, QPSK signal distributions statistical circuit and Dynamic comparison circuit are connected QPSK carrier synchronization locking decision circuits, same by carrier wave
It walks ring NCO circuit outputs and controls pulse, control the integrate-dump operation to inputting baseband signal；Electricity is counted in QPSK signal distributions
Lu Zhong, integrate-dump filter are sequentially connected in series absolute value circuit and two parallel interval statistics circuits, carrier synchronization ring NCO electricity
Road output control pulse, it is clear that integrate-dump filter makees integral under the action of controlling pulse to the zero intermediate frequency tributary signal of input
Zero operation, integrate-dump operation result obtain integrated absolute by absolute value circuit, and absolute value circuit divides integrated absolute
Two-way gives an interval statistics circuit parallel, and two interval statistics circuits calculate separately signal in agreement statistical signal points and fall
In two sections signal points, obtain signal two sections amplitude distribution statistical result, wherein in two statistical circuits
Statistics interval range by 3 dynamically configurable thresholdings and its signal points determine, the points statistical result of first interval with
Lock-in threshold multiplication obtains the operation result of first interval, and the signal of second interval counts statistical result directly as second
The operation result of the operation result in section, two sections inputs dynamic comparer simultaneously, and dynamic comparer is to coming from two sections
Operation result be compared, output judgement QPSK carrier synchronization rings locking whether instruction, lock is entered according to carrier synchronization ring
Signal meets the characteristic of rayleigh distributed when determining state, efficiently extracts out the substantive characteristics when locking of reflection carrier synchronization ring.
2. QPSK carrier synchronizations lock detector as described in claim 1, it is characterised in that：Carrier synchronization ring NCO circuits are adopted
It is realized with accumulator, accumulator is carrying out the carry pulse generated in cumulative process as integrate-dump filtering to phase control words
The control pulse of device.
3. QPSK carrier synchronizations lock detector as described in claim 1 or 2, it is characterised in that：Carrier synchronization ring NCO circuits
Control pulse be that the carry pulse that generates in cumulative process is carried out to phase control words by accumulator.
4. QPSK carrier synchronizations lock detector as described in claim 1 or 2, it is characterised in that：Agreement statistics points take
Value is set according to emulation or debugging result, or the dynamic configuration in circuit operational process.
5. QPSK carrier synchronizations lock detector as described in claim 1, it is characterised in that：First interval statistical signal amplitude
Signal less than thresholding 1 is counted, and second interval statistical signal amplitude is more than thresholding 2 and counts less than the signal of thresholding 3, Liang Gequ
Between statistical circuit counted respectively by counter, while by accumulator to meet section condition signal count tire out
Add, the result that the value of output accumulator is counted as this after the count value of counter reaches agreement statistics points simultaneously empties tired
Add device, so recycles.
6. QPSK carrier synchronizations lock detector as described in claim 5, it is characterised in that：Lock-in threshold coefficient is carried in QPSK
The numerical value of dynamic configuration in wave locking decision circuit operational process, lock-in threshold coefficient is adjusted according to different signal-to-noise ratio dynamics.
7. QPSK carrier synchronizations lock detector as described in claim 1, it is characterised in that：Dynamic comparison circuit is by participating in the
The multiplier and comparator of one interval arithmetic form, and the statistical circuit in two sections is connected one jointly exports the ratio for locking instruction
Compared with device.
8. QPSK carrier synchronizations lock detector as described in claim 1, it is characterised in that：Carrier synchronization ring NCO circuits into
Enter lock-out state, then signal amplitude is distributed in Rayleigh distributed on probability, and signal amplitude falls the probability in second interval and is more than
The probability in first interval is fallen, that is, counting for second interval is more than the points of first interval, in suitable lock-in threshold system
Several lower operation results for meeting second interval are more than the operation result of first interval, and comparator decision locks for carrier synchronization ring.
9. QPSK carrier synchronizations lock detector as described in claim 1, it is characterised in that：Carrier synchronization ring NCO circuits do not have
Have and enter lock-out state, then signal amplitude, which is distributed on probability, disobeys rayleigh distributed, under suitable lock-in threshold coefficient not
The operation result for meeting second interval is more than the operation result of first interval, and comparator decision is that carrier synchronization ring does not lock.
10. QPSK carrier synchronizations lock detector as described in claim 1, it is characterised in that：The operation result in two sections
Input comparator, comparator compare the size of the operation result of first interval and the operation result of second interval simultaneously, if the
The operation result in two sections is more than the operation result of first interval, then judgement is that QPSK carrier synchronization rings lock, and otherwise judgement is
QPSK carrier synchronization rings do not lock.
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| CN201510677343.6A CN105391539B (en) | 2015-10-18 | 2015-10-18 | QPSK carrier synchronization lock detectors |
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| CN201510677343.6A CN105391539B (en) | 2015-10-18 | 2015-10-18 | QPSK carrier synchronization lock detectors |
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| CN105391539B true CN105391539B (en) | 2018-08-10 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US10200163B1 (en) * | 2017-08-22 | 2019-02-05 | Texas Instruments Incorporated | Small and seamless carrier detector |
| CN108055224B (en) * | 2017-12-07 | 2020-07-21 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Synchronous locking detection method for 16QAM carrier synchronization loop |
| CN110311878B (en) * | 2019-05-28 | 2021-11-19 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Synchronous detection method for locking state of 16QAM carrier demodulation loop |
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| CN1260092A (en) * | 1997-06-13 | 2000-07-12 | 株式会社建伍 | Clock regeneration circuit |
| CN101800540A (en) * | 2010-03-15 | 2010-08-11 | 中国电子科技集团公司第十研究所 | Locking and false locking judging circuit |
| EP1913747B1 (en) * | 2005-07-28 | 2010-12-15 | ITT Manufacturing Enterprises, Inc. | Fast carrier frequency error estimation algorithm using sychronization sequence |
| CN103812505A (en) * | 2014-01-27 | 2014-05-21 | 中国电子科技集团公司第十研究所 | Bit synchronization lock detector |
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2015
- 2015-10-18 CN CN201510677343.6A patent/CN105391539B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1260092A (en) * | 1997-06-13 | 2000-07-12 | 株式会社建伍 | Clock regeneration circuit |
| EP1913747B1 (en) * | 2005-07-28 | 2010-12-15 | ITT Manufacturing Enterprises, Inc. | Fast carrier frequency error estimation algorithm using sychronization sequence |
| CN101800540A (en) * | 2010-03-15 | 2010-08-11 | 中国电子科技集团公司第十研究所 | Locking and false locking judging circuit |
| CN103812505A (en) * | 2014-01-27 | 2014-05-21 | 中国电子科技集团公司第十研究所 | Bit synchronization lock detector |
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