CN105372852B - 集成电光调制器及通过衬底挖空提高其3dB带宽的方法 - Google Patents
集成电光调制器及通过衬底挖空提高其3dB带宽的方法 Download PDFInfo
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Abstract
本发明公开了一种集成电光调制器及通过衬底挖空提高其3dB带宽的方法,该方法包括以下步骤:计算出集成电光调制器调制区域的横截面上的电场强度分布区域;将电场强度分布区域与衬底材料的重叠部分作为挖空区域;在电极两侧的挖空区域上方的掩埋二氧化硅层确定需要打开的挖空窗口大小及位置,并刻蚀出挖空窗口;通过挖空窗口对挖空区域进行挖空操作。本发明将计算出的集成电光调制器调制区域横截面上的电场强度分布区域与衬底材料的重叠部分作为挖空区域,在掩埋二氧化硅层打开挖空窗口,通过挖空窗口对挖空区域进行挖空操作,将衬底材料对电极上信号的损耗降到了极低的程度,大幅度的提高了集成电光调制器的3dB带宽。
Description
技术领域
本发明涉及光通信集成器件领域,具体涉及集成电光调制器及通过衬底挖空提高其3dB带宽的方法。
背景技术
随着社会的不断进步和发展,人类对信息的需求量越来越大,造成信息数据量呈现指数式的爆发增长,光通信网络技术的迅猛发展为这一难题的解决提供了可靠有效的方案,电光调制器是整个光通信网络的核心器件之一,负责将电信号转换为可在光通信网络中传输的光信号。传统基于铌酸锂材料的电光高速调制器往往外形尺寸较大,在5-10厘米的量级,同时功耗也较大,这些缺点明显不利于通信系统的小型化和节能化,因此研究高调制带宽、高消光比、低功耗、易集成及低成本的光调制器具有重要现实意义。
目前,集成电光调制器一般基于硅基或者三五族半导体两个材料体系加工,对于集成电光调制器,为了使光通信网络可以有更大的容量,需要不断地提高它的3dB带宽。对于目前普遍采用的行波电极结构集成电光调制器,在电极微波阻抗匹配和电光折射率匹配的情况下,其3dB带宽主要受到以下几个方面的因素所制约:
(1)集成电光调制器的电光调制相互作用区的电光作用介质自身的电容电阻等特性所带来的微波信号的损耗;
(2)集成电光调制器行波电极本身的寄生参数带来的微波损耗;
(3)整个集成电光调制器衬底电介质材料带来的微波吸收损耗。
在上述三种带来损耗进而引起集成电光调制器的3dB带宽下降的因素当中,因素(1)由于受到本身调制机理和集成电光调制器性能参数权衡的限制很难进一步限制和减小,要想获得较大的改善需要对有源区进行有效的改进和设计;因素(2)可以通过采用更为先进的电极结构和优化的电极参数来进一步改善;因素(3)目前主要通过提高衬底材料的电阻率来改善,如采用高阻衬底来替代原来的衬底材料,对于衬底的损耗如果可以通过一定的方案进一步降低,则可以使得集成电光调制器的3dB带宽获得进一步的提升。
有鉴于此,急需提供一种新的制作集成电光调制器的方法,降低现有集成电光调制器采用高阻衬底带来的微波吸收损耗,提高现有集成电光调制器的3dB带宽。
发明内容
本发明所要解决的技术问题是如何降低集成电光调制器采用高阻衬底带来的微波吸收损耗,从而提高集成电光调制器的3dB带宽的问题。
为了解决上述技术问题,本发明所采用的技术方案是提供一种集成电光调制器,包括衬底材料、掩埋二氧化硅层、有源区、覆盖二氧化硅层和两个电极,
所述衬底材料位于最底层,所述衬底材料上覆盖一层所述掩埋二氧化硅层,所述掩埋二氧化硅层的中心设置所述有源区,所述覆盖二氧化硅层将所述有源区覆盖在所述掩埋二氧化硅层上,所述掩埋二氧化硅层上设置两个所述电极,所述有源区呈中间凸出的台阶状,所述掩埋二氧化硅层上刻蚀有多个挖空窗口,两个所述电极分别通过两个通孔与所述有源区的台阶面连接;
所述衬底材料包括挖空区域和未挖空区域,所述挖空区域为所述集成电光调制器调制区域的横截面上的电场强度分布区域与所述衬底材料的重叠部分,剩余的所述衬底材料即为所述未挖空区域。
在上述技术方案中,采用各向异性刻蚀工艺刻蚀所述挖空窗口,通过所述挖空窗口对所述挖空区域进行挖空操作。
在上述技术方案中,所述挖空窗口之间留有未刻蚀部分,作为支撑梁。
在上述技术方案中,采用各向同性刻蚀工艺或湿法腐蚀工艺对所述挖空区域进行挖空操作。
在上述技术方案中,所述挖空窗口的形状包括但不限于方形、圆形、椭圆形、梯形和三角形。
本发明还提供了一种通过衬底挖空提高集成电光调制器的3dB带宽的方法,包括以下步骤:
通过电磁场仿真分析软件计算出集成电光调制器调制区域的横截面上的电场强度分布区域;
将电场强度分布区域与衬底材料的重叠部分作为挖空区域;
在电极两侧的挖空区域上方的掩埋二氧化硅层确定需要打开的挖空窗口大小及位置,并刻蚀出挖空窗口;
通过挖空窗口对挖空区域进行挖空操作。
在上述技术方案中,采用各向异性刻蚀工艺刻蚀所述挖空窗口。
在上述技术方案中,所述挖空窗口之间留有未刻蚀部分,作为支撑梁。
在上述技术方案中,采用各向同性刻蚀工艺或湿法腐蚀工艺对所述挖空区域进行挖空操作。
在上述技术方案中,所述挖空窗口的形状包括但不限于方形、圆形、椭圆形、梯形和三角形。
本发明,通过计算出集成电光调制器调制区域的横截面上的电场强度分布区域,将电场强度分布区域与衬底材料的重叠部分作为挖空区域,并在电极两侧的挖空区域上方的掩埋二氧化硅层打开挖空窗口,通过挖空窗口对挖空区域进行挖空操作,将衬底材料对电极上信号的损耗降到了极低的程度,大幅度的提高了集成电光调制器的3dB带宽。
附图说明
图1为本发明实施例提供的一种通过衬底挖空提高集成电光调制器的3dB带宽的方法流程图;
图2为本发明实施例提供的硅基集成电光调制器的结构示意图;
图3为本发明实施例提供的硅基集成电光调制器调制区域横截面上的电场强度在绝缘体上硅横截面上的分布计算结果图;
图4为本发明实施例提供的硅基集成电光调制器调制区域横截面上的电场强度与硅衬底的重叠部分示意图;
图5为本发明实施例提供的未挖空硅衬底的硅基集成电光调制器的横截面结构示意图;
图6为本发明实施例提供的在掩埋二氧化硅层上打开的挖空窗口的俯视图;
图7为本发明实施例提供的在掩埋二氧化硅层上打开的挖空窗口部分的横截面结构示意图。
具体实施方式
对于集成电光调制器采用高阻衬底带来的损耗,其损耗物理机制如下:
当高频微波信号在电极上传播时,其电磁场主要束缚在电极中间的金属介质区域中形成传播电磁场向前传播,对于一般的集成电光调制器,电极上传输信号的微波电磁场主要和电极表面覆盖层、有源调制区域和衬底材料层三层材料发生相互作用。对于电极表面覆盖的一层材料一般都是空气、二氧化硅或者其他电导率很低的材料,所以这一层材料对信号的衰减作用有限;位于中间一层的有源区,由于受到材料体系和调制结构的限制,虽然有一定的损耗,但是很难降低其电导率进而降低信号的损耗;位于整个集成电光调制器最下层的衬底材料,一般都有500微米左右厚,其一般由半导体材料构成,衬底材料一般电导率相对于二氧化硅等绝缘体较高,所以衬底材料会对电极上的信号带来较大的损耗,从而降低集成电光调制器的带宽,因此将上述损耗因素消除或者大幅度降低即可提高集成电光调制器的3dB带宽。本发明通过对衬底材料进行挖空处理,可以将衬底材料对电极上信号的损耗降到极低的程度,进而大幅度提高具有衬底材料的集成电光调制器的3dB带宽。
下面结合说明书附图和具体实施方式对本发明做出详细的说明。
本发明实施例提供了一种通过衬底挖空提高集成电光调制器的3dB带宽的方法,如图1所示,该方法包括以下步骤:
步骤S101、通过电磁场仿真分析软件计算出集成电光调制器调制区域的横截面上的电场强度分布区域。
步骤S102、将电场强度分布区域与衬底材料的重叠部分作为挖空区域。
步骤S103、在电极两侧的挖空区域上方的掩埋二氧化硅层确定需要打开的挖空窗口大小及位置,在不破坏有源区和电极结构的前提下确定需要打开的挖空窗口大小及位置,并刻蚀出挖空窗口。
步骤S104、在不破坏其他层结构的前提下通过挖空窗口对挖空区域进行挖空操作。
如图2所示,本发明实施例还提供了一种集成电光调制器,以硅基集成电光调制器为例,包括硅衬底10、掩埋二氧化硅层20、有源区30、覆盖二氧化硅层40和两个电极50。
硅衬底10位于最底层,其上覆盖一层掩埋二氧化硅层20,掩埋二氧化硅层20的中心设置有源区30,覆盖二氧化硅层40将有源区30覆盖在掩埋二氧化硅层20上,掩埋二氧化硅层20上设置两个电极50,有源区30呈中间凸出的台阶状,掩埋二氧化硅层20上刻蚀有多个挖空窗口60,两个电极50分别通过两个通孔70与有源区30的台阶面连接。
通过挖空窗口60对硅衬底10进行挖空,从而在硅衬底10上形成挖空区域80,挖空区域80为硅基集成电光调制器调制区域的横截面上的电场强度分布区域与硅衬底10的重叠部分。
下面以硅基集成电光调制器为例,对本发明方法的具体实施流程进行解释说明:
本发明,首先通过数值模拟计算的方法计算出整个硅基集成电光调制器调制区域的横截面上的电场强度分布数据。一般而言,整个硅基集成电光调制器的有源区域在横截面上的分布是均匀的,电场强度的分布可以通过电磁场仿真分析软件计算获得。
在获得硅基集成电光调制器横截面上的电场强度分布结果后,将电场强度分布和加工该硅基集成电光调制器的绝缘体上硅(SOI)的横截面结构绘制在相同的坐标系下,可以得到如图3所示的横截面上电场强度在绝缘体上硅上的分布情况,该分布情况也是硅基集成电光调制器在工作状态下电场强度在整个硅基集成电光调制器横截面上的实际分布情况。
获得了电场强度的分布范围后,需要与硅基集成电光调制器中的硅衬底10进行比对,得到硅衬底10和电极50上电磁场两者的重叠部分,重叠部分示意图如图4所示,虚线框中的重叠部分即为带来信号在硅衬底10中损耗的部分,因此,将该重叠部分作为挖空区域80,只需要将挖空区域80中的损耗介质去除即可降低损耗,进而提高硅基集成电光调制器的3dB带宽。
如图5所示,为未挖空硅衬底10的硅基集成电光调制器的横截面结构示意图,这里需要在这一结构的基础上将图4所示的虚线框中的重叠部分挖掉。由于硅基集成电光调制器在硅衬底上10有一层掩埋二氧化硅层20,因此在挖空硅衬底10时需要将这一层先打开,由于硅基集成电光调制器的有源区30又位于掩埋二氧化硅层20的上方,所以在打开掩埋二氧化硅层20时需要注意保护有源区30,同时又要保证足够的机械强度。
如图6所示,为在掩埋二氧化硅层20上打开的挖空窗口60的俯视图,挖空窗口60的中间留有未刻蚀部分,作为支撑梁90起到支撑固定的作用,以防止硅基集成电光调制器在外力震动的作用下损坏。挖空窗口60的大小以保证不损坏有源区30和电极50的结构,同时又有足够大的空间来挖空衬底硅10为标准。
如图7所示,为打开的挖空窗口60部分的横截面结构示意图,挖空窗口60的深度要求将全部的掩埋二氧化硅层20刻透即可,挖空窗口60的深度可以进入硅衬底10中。在完成挖空窗口60的刻蚀后,再通过挖空窗口60对挖空区域80进行挖空处理,挖空处理过程中需要对硅衬底10进行选择性刻蚀,可以保证在不破坏其他层结构的同时对硅衬底10进行最有效的挖空,这样就完成了对硅衬底10的挖空。
本方案中,在掩埋二氧化硅层20上采用各向异性刻蚀工艺对挖空窗口60进行加工,从而在打开挖空窗口60的过程中可以保护硅基集成电光调制器有源区30不受到破坏,同时,挖空窗口60需要刻蚀到硅衬底10部分,可以超过但不可以未达到硅衬底10部分,即挖空窗口60需连通挖空区域80,挖空窗口60的形状和尺寸可以自由选择,如方形、圆形、椭圆形、梯形和三角形等,只要保证有足够的空间可以挖空硅衬底10,同时又有足够的机械支撑强度即可;在挖空衬底硅10部分时,采用各向同性刻蚀工艺或湿法腐蚀工艺。
挖空硅衬底10的范围要求不小于通过前期计算获得的挖空区域80,这样可以获得最佳效果,挖空区域80即使是部分挖空也可以起到提高3dB带宽的作用,同时,挖空硅衬底10的范围也不可以太大,否则影响整个硅基集成电光调制器的机械可靠性。
上述硅基集成电光调制器仅为本发明的一个实施例,本方案不仅可以应用于硅基集成电光调制器,对于其他具有衬底材料的集成电光调制器同样适用,在此不再赘述。
本发明不局限于上述最佳实施方式,任何人应该得知在本发明的启示下作出的结构变化,凡是与本发明具有相同或相近的技术方案,均落入本发明的保护范围之内。
Claims (10)
1.集成电光调制器,包括衬底材料、掩埋二氧化硅层、有源区、覆盖二氧化硅层和两个电极,
所述衬底材料位于最底层,所述衬底材料上覆盖一层所述掩埋二氧化硅层,所述掩埋二氧化硅层的中心设置所述有源区,所述覆盖二氧化硅层将所述有源区覆盖在所述掩埋二氧化硅层上,所述掩埋二氧化硅层上设置两个所述电极,所述有源区呈中间凸出的台阶状,所述掩埋二氧化硅层上刻蚀有多个挖空窗口,两个所述电极分别通过两个通孔与所述有源区的台阶面连接;
其特征在于,
所述衬底材料包括挖空区域和未挖空区域,所述挖空区域为所述集成电光调制器调制区域的横截面上的电场强度分布区域与所述衬底材料的重叠部分,剩余的所述衬底材料即为所述未挖空区域。
2.如权利要求1所述的集成电光调制器,其特征在于,采用各向异性刻蚀工艺刻蚀所述挖空窗口,通过所述挖空窗口对所述挖空区域进行挖空操作。
3.如权利要求1所述的集成电光调制器,其特征在于,所述挖空窗口之间留有未刻蚀部分,作为支撑梁。
4.如权利要求1所述的集成电光调制器,其特征在于,采用各向同性刻蚀工艺或湿法腐蚀工艺对所述挖空区域进行挖空操作。
5.如权利要求1所述的集成电光调制器,其特征在于,所述挖空窗口的形状包括但不限于方形、圆形、椭圆形、梯形和三角形。
6.通过衬底挖空提高集成电光调制器的3dB带宽的方法,其特征在于,包括以下步骤:
通过电磁场仿真分析软件计算出集成电光调制器调制区域的横截面上的电场强度分布区域;
将电场强度分布区域与衬底材料的重叠部分作为挖空区域;
在电极两侧的挖空区域上方的掩埋二氧化硅层确定需要打开的挖空窗口大小及位置,并刻蚀出挖空窗口;
通过挖空窗口对挖空区域进行挖空操作。
7.如权利要求6所述的通过衬底挖空提高集成电光调制器的3dB带宽的方法,其特征在于,采用各向异性刻蚀工艺刻蚀所述挖空窗口。
8.如权利要求6所述的通过衬底挖空提高集成电光调制器的3dB带宽的方法,其特征在于,所述挖空窗口之间留有未刻蚀部分,作为支撑梁。
9.如权利要求6所述的通过衬底挖空提高集成电光调制器的3dB带宽的方法,其特征在于,采用各向同性刻蚀工艺或湿法腐蚀工艺对所述挖空区域进行挖空操作。
10.如权利要求6所述的通过衬底挖空提高集成电光调制器的3dB带宽的方法,其特征在于,所述挖空窗口的形状包括但不限于方形、圆形、椭圆形、梯形和三角形。
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