CN105355615A - On-chip wire direct lead-out structure of chip and making method thereof - Google Patents
On-chip wire direct lead-out structure of chip and making method thereof Download PDFInfo
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- CN105355615A CN105355615A CN201510736310.4A CN201510736310A CN105355615A CN 105355615 A CN105355615 A CN 105355615A CN 201510736310 A CN201510736310 A CN 201510736310A CN 105355615 A CN105355615 A CN 105355615A
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- groove
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Micromachines (AREA)
Abstract
The invention relates to an on-chip wire direct lead-out structure of a chip and a making method thereof, and belongs to the field of electronic devices. The making method is characterized by comprising the following steps: using a micro machining method to form a wire accommodating slot on the surface of a silicon wafer, wherein the slot is V-shaped, trapezoidal, U-shaped, arc or square or the slot is a combined groove, pit or through hole; and then, making a metal electrode on the slot, thus obtaining a direct lead-out structure for wires from hundred microns to millimeter level. A direct lead-out structure for wires from hundred microns to millimeter level realized on a chip is provided. Therefore, the connection strength of a wire and a chip is improved significantly, and the problem of circuit breaking caused by damage to the connection of a wire and a chip due to the change in the external environment such as temperature or pressure and personnel operation is avoided.
Description
Technical field
The present invention relates to a kind of direct deriving structure of sheet upper conductor and manufacture method of chip, belong to electronic device class.
Background technology
In the process that IC chip or MEMS chip encapsulate, in order to keep product, there is certain flexibility or the degree of freedom, or meet the application requirement under specific volume and temperature, sometimes shell or Plastic Package can not be adopted to be electrically connected, wire directly can only to be adopted on chip to draw and realize electrical signal collection or to chip power supply.Like this, in the process of operation and use after encapsulation or encapsulation, due to the factor such as high temperature, vibration, the junction of wire and chip often can be caused to bear huge stress.Because the caliber opposite chip of wire is comparatively thick, chip surface evenness is better, generally adopts the method such as thermal weld, laser welding to realize the direct extraction of wire at present.Although but adopt these methods temporarily may realize the electrical connection of wire and device, because welding contact area is too small, after at high temperature using a period of time, scolding tin is very easy to degenerate and softens; Or because the actions such as bending cause pad stressed, thus occur that the adhesion of metallic film on chip and substrate declines, comes off, occur rosin joint.
The present invention intends proposing a kind of deriving structure, increases bonding area dexterously when not increasing chip size, improves the firm welding degree of chip and wire, reduces the probability that wire bonds lost efficacy, thus improves the reliability of device use.
Summary of the invention
An object of the present invention is the direct deriving structure of sheet upper conductor providing a kind of chip, specifically the present invention proposes use micro-processing method, the groove that one is held wire is formed at silicon chip surface, the shape of groove is can be the groove of V-arrangement, trapezoidal, U-shaped, arc, square or its combination, pit or through hole, then make metal electrode thereon, thus realize hundred microns of direct deriving structures to millimeter magnitude wire.Owing to increasing chips welding region area, the integral thickness that the rear silicon wafer thickness of chip connection and thickness of electrode and diameter of wire are formed can be reduced, the stress of effective dispersion carrying, significantly improves chip and arrives the electrical connection fastnesses of millimeter magnitude wire and reliability with hundred microns.
Two of object of the present invention is manufacture methods of the direct deriving structure of sheet upper conductor of described chip,
The invention is characterized in, adopt thickness to be greater than the silicon chip of (100) or (110) crystal face of wire radius, utilize the wet etch techniques of silicon, etch groove or pit from front side of silicon wafer or reverse side, or in conjunction with via design, for the wire that permanent circuit connects.The V-arrangement that pit and groove can obtain for silicon chip anisotropic etch, trapezoidal, U-shaped, arc or square groove or pit, the V-arrangement that also can obtain for silicon wafer dry etching, trapezoidal, U-shaped, arc or square groove or pit, or other means obtain V-arrangement, trapezoidal, U-shaped, arc or square groove or pit.Through hole can be that the two-way corrosion of unidirectional corrosion or tow sides makes, or dry etching obtains, or other means such as laser drilling obtain.Welding region generally covers the chip plane and groove and the pit partly or completely that are not less than the area that diameter of wire is formed by the length of side.The double-edged relevant range of chip can simultaneously fluted or bowl configurations, and have metallic film as electrode, be connected by the metal level of through-hole wall, thus reach both as the electric interconnecting channels between tow sides device architecture, again simultaneously as the location hole of drawing wire.Through-hole wall can not have metal level yet, is only welded respectively at tow sides by the wire through through hole, reaches and connects both sides and the object of simultaneously drawing, or when only having side to have circuit, only plays the effect of reinforcing and drawing weld strength.
The making concrete steps of structure of the present invention are:
Step 1, in the front of silicon chip, utilizes wet method respectively to tool anisotropic etch method, groove of corrosion V-arrangement, trapezoidal, U-shaped, arc, square or other combination;
Step 2 in two kinds of situation
A (), by sputtering or evaporation technology, forms uniform metallic film in the groove that step 1 makes;
B () or the other end of groove made in step 1 by the technique such as dry etch process or laser etch the circular hole that a diameter is not less than diameter of wire, or layer of metal film is all formed in the groove at chip front side or the back side, guarantee that groove sidewall is covered by metallic film completely;
Step 3 point two kinds of situations
During (a) welding, diameter be not more than the wire of the width of described groove or multiply metallized metal skein silk or be inlaid in the etching tank described in step 1, then adopting manual welding to make to fill up scolding tin in whole groove, forming firmly Welding Structure;
During (b) welding, the wire or the strands of metal wire line that first diameter are not more than the difformity well width described in step 1 pierce into hole from front, and reserve a bit of overleaf, then wire is bent, make it along difform groove move towards extend, be embedded in groove, adopt manual welding or reflow method, formed and firmly weld;
In step 2, (a) is corresponding with (a) in step 3; In step 2, (b) is corresponding with step 3 (b).
In a word, the invention provides and a kind ofly on chip, realize hundred microns of direct deriving structures to millimeter magnitude wire, the bonding strength of wire and chip can be significantly improved, avoid the connection due to the change of the external environment such as temperature or pressure and the chip that causes of human users and wire to damage and the problems such as the open circuit that causes.
Accompanying drawing explanation
Fig. 1 is the basic structure profile of V-arrangement, trapezoidal, U-shaped, arc or square groove or pit; A) V-arrangement, b) trapezoidal, c) U-shaped, d) arc.
Fig. 2 is V-arrangement, trapezoidal, U-shaped, arc or square groove, pit combination and groove, bowl configurations profile example.A) be wherein the combination of two V-shaped groove, b) be the combination of double trapezoid groove, c) be two square groove combinations, d) be the combination of dual U-shaped groove, e) be the sectional view that two V-shaped groove and through hole combine, f) being the sectional view that double trapezoid groove and through hole combine, g) is the sectional view that two square groove and through hole combine, and h) is sectional view that dual U-shaped groove and through hole combine.
Fig. 3 is based on the groove of V-arrangement (a), trapezoidal (b), U-shaped (c), arc (d) or the metal electrode of pit and hundred microns of direct deriving structure examples to millimeter magnitude wire
Fig. 4 is the implementation result figure of (b) after metal electrode structure (a) and wire bonds thereof on one-sided V-type slotted vane.
Fig. 5 be single side trapezoidal groove and through hole compounded plate on implementation result figure after metal electrode structure and wire bonds thereof, wherein a) for there is no situation during conducting wire, b) be the situation after conducting wire, the cross section after c) and d) being respectively conducting wire and longitudinal section.
In figure, the implication of each number designation representative is:
1 ?the V-type groove that obtains of anisotropic etch
2 ?circuit leads for connecting
3 ?chips welding region
4 ?the dovetail groove that obtains of anisotropic etch
5 ?through hole
Embodiment
Embodiment 1:
At front side of silicon wafer, wet anisotropic is utilized to corrode, such as KOH erodes away V-type groove, again by sputtering or evaporation technology, formed in groove one deck uniform 0.1 ?the metallic film of 3 micron thickness, guarantee that groove sidewall is covered by metallic film completely, photoetching process erodes away V-type groove figure, as the interface of electrical connection.
During welding, the wire or the strands of metal wire twisted wire that diameter are not more than V-shaped groove width are inlaid in above-mentioned V-type groove, adopt manual welding to make to fill up scolding tin in whole groove, form firmly Welding Structure.So far reach and directly the wire of wire on chip is directly drawn.
When wire is subject to the effect of external force, wanting of the surface area ratio plane-welding infiltrated by scolding tin due to the wire be in V-type groove is large, and therefore the probability of wire rosin joint is much smaller, and its tensile strength is greatly improved.Meanwhile, due to the existence of V-type groove, take the welding region of same chip area, actual metal film size increases, and when metallic film is identical with the bond strength of substrate unit are below, also improves the resistance to tension of whole metallic film.
Embodiment 2
At front side of silicon wafer, utilize wet anisotropic to corrode, such as KOH erodes away ladder-type trough, and recycling dry etching, such as DRIE, etch at the other end of the groove deviating from exit the circular hole that a diameter is not less than diameter of wire.Use sputtering or evaporation technology at chip back according to the actual requirements, or in the groove of chip front side, or chip front side and the back side all form layer of metal film, guarantee that groove sidewall is covered by metallic film completely, photoetching corrosion goes out electrode pattern, as the interface of electrical connection.
During welding, the wire or the strands of metal wire twisted wire that first diameter are not more than V-shaped groove width pierce into hole from front, and reserve a bit of overleaf, then wire is bent, make it along dovetail groove move towards extend, be embedded in dovetail groove, manual welding or Reflow Soldering as far as possible, make to fill up scolding tin in whole hole and groove, form firmly Welding Structure.
Wire lead-out mode in this structural rate embodiment 1 is more solid and reliable.Except having advantage that in embodiment 1, V-shaped groove brings, when wire receives the effect of external force, due to the existence of through hole, originally the shearing force that transfer is subject to for that section of wire be in through hole by a big chunk in the active force on metal film was directly acted on, and much larger than the adhesion of film and substrate of the shearing force that wire can bear, therefore significantly can improve the tensile strength of wire, thus increase the reliability of electrical connection.
Although embodiment 1 and 2 describes V-shaped groove and dovetail groove respectively, in fact completely applicable to the structure of other shapes described in summary of the invention and combination thereof.
Claims (9)
1. the direct deriving structure of sheet upper conductor of a chip, it is characterized in that using micro-processing method, the groove that one is held wire is formed at silicon chip surface, the shape of groove is V-arrangement, trapezoidal, U-shaped, arc, the groove of square or its combination, pit or through hole, and then make metal electrode thereon, thus realize hundred microns of direct deriving structures to millimeter magnitude wire.
2., by the structure described in claim 1 or 2, it is characterized in that described silicon chip refers to that thickness is greater than the silicon chip of (100) or (110) crystal face of wire radius.
3., by structure according to claim 1, it is characterized in that described through hole is that the two-way caustic solution of unidirectional corrosion or tow sides makes, or dry etching or laser drilling.
4., by structure described in claim 1 or 3, it is characterized in that the groove of described combination, pit or through hole to have in following eight kinds any one:
A) be two V-shaped groove combinations, b) be the combination of double trapezoid groove, c) be two square groove combinations, d) be the combination of dual U-shaped groove, e) be that two V-shaped groove and through hole combine, f) for double trapezoid groove and through hole combine, be g) that two square groove and through hole combine, h) for dual U-shaped groove and through hole combine.
5. by structure according to claim 1, it is characterized in that the tow sides fluted or pit simultaneously of chip, and have metallic film as electrode, be communicated with by the Metal Phase of through-hole wall, as the electric interconnecting channels between tow sides device architecture and the location hole of drawing wire.
6. by the structure described in claim 1 or 5, it is characterized in that through-hole wall can not have metal level yet, welded respectively double-edged by the wire through through hole, reach and connect both sides and the object of simultaneously drawing, or when only having side to have circuit, only play the effect of reinforcing and drawing weld strength.
7. make as claim 1 ?the method of structure according to any one of 3 or 5, it is characterized in that concrete steps are:
Step 1, in the front of silicon chip, utilizes wet method respectively to tool anisotropic etch method, groove of corrosion V-arrangement, trapezoidal, U-shaped, arc, square or its combination;
Step 2 in two kinds of situation
A (), by sputtering or evaporation technology, forms uniform metallic film in the groove that step 1 makes;
B () or the other end of groove made in step 1 by the technique such as dry etch process or laser etch the circular hole that a diameter is not less than diameter of wire, or layer of metal film is all formed in the groove at chip front side or the back side, guarantee that groove sidewall is covered by metallic film completely;
Step 3 point two kinds of situations
A, during () welding, the wire or the strands of metal wire twisted wire that diameter are not more than the width of described groove are inlaid in described etching tank, then adopt manual welding to make to fill up scolding tin in whole groove, form firmly Welding Structure;
During (b) welding, the wire or the strands of metal wire line that first diameter are not more than the difformity well width described in step 1 pierce into hole from front, and reserve a bit of overleaf, then wire is bent, make it along difform groove move towards extend, be embedded in groove, adopt manual welding or reflow method, formed and firmly weld;
In step 2, (a) is corresponding with (a) in step 3; In step 2, (b) is corresponding with step 3 (b).
8., by method according to claim 7, it is characterized in that the thickness of metal film in step 2 described in (a) is 0.1 ~ 3 micron.
9., by method according to claim 6, when it is characterized in that welding, welding region covers the chip plane and groove or the pit partly or completely that are not less than the area that diameter of wire is formed by the length of side.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510736310.4A CN105355615B (en) | 2015-11-02 | 2015-11-02 | A kind of on piece conducting wire of chip directly leads out structure and production method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510736310.4A CN105355615B (en) | 2015-11-02 | 2015-11-02 | A kind of on piece conducting wire of chip directly leads out structure and production method |
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| Publication Number | Publication Date |
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| CN105355615A true CN105355615A (en) | 2016-02-24 |
| CN105355615B CN105355615B (en) | 2019-03-08 |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB802262A (en) * | 1954-11-02 | 1958-10-01 | Pye Ltd | Improvements in or relating to transistors and to methods of producing the same |
| US20080029845A1 (en) * | 2006-08-07 | 2008-02-07 | University Of Central Florida Research Foundation | On-Chip Magnetic Components |
| US20080050267A1 (en) * | 2004-09-30 | 2008-02-28 | Hiroshi Murai | Au Alloy Bonding Wire |
| CN101250482A (en) * | 2008-03-28 | 2008-08-27 | 重庆大学 | Microelectrode array chip for cell electrofusion |
| CN103500729A (en) * | 2013-10-18 | 2014-01-08 | 中国科学院上海微系统与信息技术研究所 | Silicon pinboard structure and wafer level manufacturing method of silicon pinboard structure |
| CN205140951U (en) * | 2015-11-02 | 2016-04-06 | 上海芯敏微系统技术有限公司 | Structure is directly drawn forth to piece upper conductor of chip |
-
2015
- 2015-11-02 CN CN201510736310.4A patent/CN105355615B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB802262A (en) * | 1954-11-02 | 1958-10-01 | Pye Ltd | Improvements in or relating to transistors and to methods of producing the same |
| US20080050267A1 (en) * | 2004-09-30 | 2008-02-28 | Hiroshi Murai | Au Alloy Bonding Wire |
| US20080029845A1 (en) * | 2006-08-07 | 2008-02-07 | University Of Central Florida Research Foundation | On-Chip Magnetic Components |
| CN101250482A (en) * | 2008-03-28 | 2008-08-27 | 重庆大学 | Microelectrode array chip for cell electrofusion |
| CN103500729A (en) * | 2013-10-18 | 2014-01-08 | 中国科学院上海微系统与信息技术研究所 | Silicon pinboard structure and wafer level manufacturing method of silicon pinboard structure |
| CN205140951U (en) * | 2015-11-02 | 2016-04-06 | 上海芯敏微系统技术有限公司 | Structure is directly drawn forth to piece upper conductor of chip |
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| CN105355615B (en) | 2019-03-08 |
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Effective date of registration: 20170523 Address after: 215000 Jiangsu, Suzhou Industrial Park Jinji Lake Road, Suzhou, No. 99, northwest of the city of Suzhou, building 401, room 07 Applicant after: SUZHOU GANXIN MICRO SYSTEMS TECHNOLOGY CO., LTD. Address before: 201210 room 1, building 608, No. 206-207, midsummer Road, Shanghai, Pudong New Area Applicant before: Shanghai Simst Microsystem Technology Co., Ltd. |
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