CN105337913B - A kind of orthogonal phaselocked loop direct current biasing self-adapting regulation method - Google Patents
A kind of orthogonal phaselocked loop direct current biasing self-adapting regulation method Download PDFInfo
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- CN105337913B CN105337913B CN201510793499.0A CN201510793499A CN105337913B CN 105337913 B CN105337913 B CN 105337913B CN 201510793499 A CN201510793499 A CN 201510793499A CN 105337913 B CN105337913 B CN 105337913B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03878—Line equalisers; line build-out devices
- H04L25/03885—Line equalisers; line build-out devices adaptive
Abstract
The present invention proposes a kind of orthogonal phaselocked loop direct current biasing self-adapting regulation method, first start a K value to measure, if there are one reached amplitude peak range in the K values maximum value or minimum value measured, then it is considered compressed signal, carry out compressed signal set-up procedure, otherwise, into the quick set-up procedure of direct current biasing.The present invention utilizes direct current biasing sensitivity evaluation method, the sensitivity of setting gain is utilized in measurement process, the quick adjustment direct current biasing of automatic adaptive while improving efficiency, solves the problems, such as the signal adjustment by orthogonal locking phase and after increasing gain under different measured signal frequencies；Compressed signal is handled simultaneously, the mean value of adjusted amplitude max min is not only adjusted to zero, while ensuring that positive amplitude time and negative amplitude time are essentially identical, to ensure that the accuracy and sensitivity when phase noise measurement.
Description
Technical field
The present invention relates to phaselocked loop field, more particularly to a kind of orthogonal phaselocked loop direct current biasing self-adapting regulation method.
Background technology
When digital phase-locked loop phase detecting method measures electromagnetic signal phase noise, measured source (DUT) output signal and inside
For reference source through the orthogonal phase demodulation of frequency mixer, the phase noise of reference source and measured source is converted into noise voltage through phase demodulation, passes through filtering
Device filters out the leakage with frequency component and radio frequency and local oscillator after mixing, and ADC is sent to by the low noise amplification of controllable gain
Sampling, controllable gain is divided into multiple gears, to meet the testing requirement of different noise objective signal sources；Amplifier setting gain is got over
Big measurement sensitivity is higher, and the signal source of corresponding test is purer.
But as gain increases, noiselike signal can shift, and be adjusted to signal by direct current biasing, meanwhile,
Because the signal beyond amplitude range can compress, that is, the electricity of an amplitude peak can be become by exceeding the signal of measurement range
It is flat, to make subsequently to measure current saturation, to obtain better measurement result, need signal being adjusted to average amplitude to be zero,
And solve by compressed signal after zeroing, it is ensured that positive amplitude time and negative amplitude time are essentially identical.
The Rule of judgment of adjustment direct current biasing is amplitude measurement function when surveying phase noise：K values measure, and are surveyed using K values
Maximum value, the minimum value of amount result represent corresponding amplitude, adjust the mean value for requiring the maxima and minima to measure K values
It is adjusted to meet in the zero bias region of index request, when the maxima and minima of K value measurement results is respectively measurement range
When max min, representation signal amplitude is excessive, is arranged by compression, therefore, to assure that the signal after arrangement, average amplitude zero
And positive amplitude time and negative amplitude time are essentially identical.
Prior art is broadly divided into following two：
1, calibration data method
To different frequency, calibration test is carried out, measured source is pressed into certain stepping, frequency is set, by direct current biasing shelves
Position with the adjustment of corresponding DAC, measured by K values, find the case where K value mean values are zero, record current direct current biasing gear and
Corresponding DAC；Thereafter it repeats the above steps to each gain shift, and stores whole direct current gears and DAC.In measurement process
In, by searching for the method for calibration data, find direct current gear and corresponding DAC where frequency point then needs if not being calibration frequency point
Corresponding gear and DAC are calculated using linear difference, be adjusted.
2, least square method
In measurement process, using least square method, to direct current biasing DAC elder generations coarse adjustment fine tuning again, until K value measurement results
In, position that the average value of K values minimum value and maximum value is zero.
Calibration data method individually calibrates each frequency, while being also required to calibrate to every grade of gain, different frequencies
The biasing gear and DAC that rate needs under different gains, using difference arithmetic, the direct current biasing and incessantly accurate, meeting shadow that find
Ring the measurement accuracy that most last phase is made an uproar.
Least square method is only applicable to a gear and is adjusted with DAC, is adjusted in mostly gear direct current biasing, Wu Faman
Foot requires.When the gain increases, signal can compress, although the method may be adjusted to the state that average amplitude is zero,
It is unable to ensure that average amplitude is zero and positive amplitude time and negative amplitude time are essentially identical.
Invention content
To solve above-mentioned the deficiencies in the prior art, the present invention proposes a kind of orthogonal phaselocked loop direct current biasing and adaptively adjusts
Method.
The technical proposal of the invention is realized in this way：
A kind of orthogonal phaselocked loop direct current biasing self-adapting regulation method first starts a K value and measures, if measure
There are one reached amplitude peak range in K values maximum value or minimum value, then it is assumed that is compressed signal, carries out compressed signal tune
Synchronizing is rapid, otherwise, into the quick set-up procedure of direct current biasing.
Optionally, compressed signal set-up procedure is as follows：
Direct current biasing gear is transferred to minimum and is denoted as Level1 by step 11, and DAC is also adjusted to minimum and is denoted as DAC1；
Step 12 measures K values, according to the mean value of K value max mins × current gain sensitivity, obtains DAC adjustment
Amount is denoted as Δ DAC；
Gear Level1=current gear+(Δ DAC-DAC1)/3071 after step 13, adjustment；
DAC1=Δ DAC+ originals DAC1+3071 × (gear-current gear after adjustment) after step 14, adjustment；
Gear and biasing is arranged by gear Level1 and DAC setting direct current biasings DAC1 after adjustment in step 15；
Step 16 measures K values, if maximum value minimum mean presses index close to zero, continues to execute step 17, otherwise holds
Row step 12；
Direct current biasing gear Level1, DAC value DAC1 after adjustment after step 17, record adjustment；
Direct current gear is transferred to maximum and is denoted as Level2 by step 18, and DAC is also adjusted to maximum and is denoted as DAC2；
Step 19 measures K values, according to the mean value of K value max mins × current gain sensitivity, obtains DAC adjustment
Measure Δ DAC；
Gear Level2=current gear+(Δ DAC-DAC2)/3071 after step 110, adjustment；
DAC2=Δ DAC+ originals DAC2+3071 × (gear-current gear after adjustment) after step 111, adjustment；
Direct current biasing is arranged by gear after adjustment and DAC in step 112；
Step 113 measures K values, if maximum value minimum mean presses index close to zero, adjustment terminates, and otherwise executes step
Rapid 18；
Direct current biasing gear Level2, DAC value DAC2 after adjustment after step 114, record adjustment；
Step 115 will be used as final gear, setting to arrive hardware after (Level1+Level2)/2 downward rounding；
Step 116 will be used as final DAC, setting to arrive hardware after (DAC1+DAC2)/2 downward rounding.
Optionally, the quick set-up procedure of direct current biasing specifically includes direct current biasing sensitivity measure step and biasing gear turns
Change quick set-up procedure.
Optionally, direct current biasing sensitivity measure step specifically includes：
Direct current biasing gear is adjusted to minimum by step 21, and DAC is also adjusted to minimum；
Step 22 constantly adjusts DAC, is measured by K values, until the Amplitude maxima of K value results is less than amplitude peak
1/2, when DAC be maximum value 4095 when, be turned up a gear；
Step 23, when measuring current DAC respectively and increasing by 500 and reduce 500, maximum amplitude value K1, K2 of K value results；
Step 24, then sensitivity=(K1-K2)/1000；
Step 25, storage current gain sensitivity, and adjust gain gear, repeat step 21~step 24, until measuring
And preserve the direct current biasing sensitivity of whole gain shifts.
Optionally, in step 23, if be more than 0~4095 range when DAC plus-minuss 500, integral translation accommodation.
Optionally, it is specific as follows to convert quick set-up procedure for biasing gear：
Current gear and DAC are configured to hardware plank by step 31, are denoted as DAC1；
Step 32 measures K values, according to the mean value of K value max mins × current gain sensitivity, obtains DAC adjustment
Amount is denoted as DAC2；
Gear=current gear+(nDAC2-DAC1)/3071 after step 33, adjustment；
DAC=nDAC2+DAC1+3071 × (gear-current gear after adjustment) after step 34, adjustment；
Direct current biasing is arranged by gear after adjustment and DAC in step 35.
The beneficial effects of the invention are as follows：
(1) direct current biasing sensitivity evaluation method is utilized, using the sensitivity of setting gain in measurement process, automatically certainly
The quick adjustment direct current biasing adapted to while improving efficiency, solves and passes through orthogonal locking phase simultaneously under different measured signal frequencies
Increase the signal after gain and adjusts problem；
(2) while to compressed signal it handles, the mean value of adjusted amplitude max min is not only adjusted to zero,
Simultaneously ensure that positive amplitude time and negative amplitude time are essentially identical, to ensure that accuracy when phase noise measurement with it is sensitive
Degree.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention without having to pay creative labor, may be used also for those of ordinary skill in the art
With obtain other attached drawings according to these attached drawings.
Fig. 1 is a kind of flow chart of orthogonal phaselocked loop direct current biasing self-adapting regulation method of the present invention.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation describes, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other without creative efforts
Embodiment shall fall within the protection scope of the present invention.
The present invention takes direct current biasing sensitivity measure, biasing gear and DAC to convert quickly adjustment, compressed signal adjustment phase
In conjunction with technical solution, quick self-adapted adjustment direct current biasing and its DAC value before measuring every time, quickly and effectively adjustment direct current is inclined
It sets, it is ensured that signal averaging amplitude is zero after adjustment, and is solved by compressed signal after zeroing, it is ensured that positive amplitude time and negative amplitude
Time is essentially identical, reaches measurement result of preferably mutually making an uproar.
The flow relationship of the orthogonal phaselocked loop direct current biasing self-adapting regulation method of the present invention is as shown in Figure 1, first start one
Secondary K values measure, if having reached amplitude peak range there are one in the amplitude K values maximum value or minimum value measured,
It is considered compressed signal, compressed signal set-up procedure is carried out, otherwise, into the quick set-up procedure of direct current biasing.
If recognized there are one amplitude peak range has been reached in the amplitude K values maximum value or minimum value measured
To be compressed signal, compressed signal set-up procedure is specific as follows：
Direct current biasing gear is transferred to minimum and is denoted as Level1 by step 11, and DAC is also adjusted to minimum and is denoted as DAC1；
Step 12 measures K values, according to the mean value of K value max mins × current gain sensitivity, obtains DAC adjustment
Amount is denoted as Δ DAC；
Gear Level1=current gear+(Δ DAC-DAC1)/3071 after step 13, adjustment；
DAC1=Δ DAC+ originals DAC1+3071 × (gear-current gear after adjustment) after step 14, adjustment；
Gear and biasing is arranged by gear Level1 and DAC setting direct current biasings DAC1 after adjustment in step 15；
Step 16 measures K values, if maximum value minimum mean presses index close to zero, continues to execute step 17, otherwise holds
Row step 12；
Direct current biasing gear Level1, DAC value DAC1 after adjustment after step 17, record adjustment；
Direct current gear is transferred to maximum and is denoted as Level2 by step 18, and DAC is also adjusted to maximum and is denoted as DAC2；
Step 19 measures K values, according to the mean value of K value max mins × current gain sensitivity, obtains DAC adjustment
Measure Δ DAC；
Gear Level2=current gear+(Δ DAC-DAC2)/3071 after step 110, adjustment；
DAC2=Δ DAC+ originals DAC2+3071 × (gear-current gear after adjustment) after step 111, adjustment；
Direct current biasing is arranged by gear after adjustment and DAC in step 112；
Step 113 measures K values, if maximum value minimum mean presses index close to zero, adjustment terminates, and otherwise executes step
Rapid 18；
Direct current biasing gear Level2, DAC value DAC2 after adjustment after step 114, record adjustment；
Step 115 will be used as final gear, setting to arrive hardware after (Level1+Level2)/2 downward rounding；
Step 116 will be used as final DAC, setting to arrive hardware after (DAC1+DAC2)/2 downward rounding.
The quick set-up procedure of direct current biasing specifically includes direct current biasing sensitivity measure step and biasing gear conversion is quick
Set-up procedure.
Because for different gain shifts, each unit quantity of direct current biasing DAC corresponds to adjustable amplitude amount not phase
Together, so direct current biasing measurement should be carried out to each gain shift, while the case where need to take into account Signal Compression.Direct current biasing spirit
Sensitivity measuring process specifically includes：
Direct current biasing gear is adjusted to minimum by step 21, and DAC is also adjusted to minimum；
Step 22 constantly adjusts DAC, is measured by K values, until the Amplitude maxima of K value results is less than amplitude peak
1/2, when DAC be maximum value 4095 when, be turned up a gear；
Step 23, when measuring current DAC respectively and increasing by 500 and reduce 500, maximum amplitude value K1, K2 of K value results；Such as
When being more than 0~4095 range when plus-minus 500 fruit DAC, integral translation accommodation；
Step 24, then sensitivity=(K1-K2)/1000；
Step 25, storage current gain sensitivity, and adjust gain gear, repeat step 1~step 4, until measuring simultaneously
Preserve the direct current biasing sensitivity of whole gain shifts.
Direct current biasing is designed in the form of gear+DAC, gear is adjusted for great-leap-forward, and DAC is used for the fine tuning in gear,
The adjustable range for designing each gear has overlapping.In adjustment, according to original speed position, automatically generates every grade of DAC and corresponds to range,
Every grade of DAC adjustable range of the present invention is 0~4095, and each gear is 512 with adjacent gear positions intersection.It is fast to bias gear conversion
Fast set-up procedure is specific as follows：
Current gear and DAC (being denoted as DAC1) are configured to hardware plank by step 31；
Step 32 measures K values, according to the mean value of K value max mins × current gain sensitivity, obtains DAC adjustment
Amount is denoted as DAC2；
Gear=current gear+(nDAC2-DAC1)/3071 after step 33, adjustment；
DAC=nDAC2+DAC1+3071 × (gear-current gear after adjustment) after step 34, adjustment；
Direct current biasing is arranged by gear after adjustment and DAC in step 35.
For uncompressed signal, the above process repeats one to the zeroing that signal can be completed twice.
The present invention utilizes direct current biasing sensitivity evaluation method, using the sensitivity of setting gain in measurement process, certainly
Adaptive quick adjustment direct current biasing is moved, while improving efficiency, solves and passes through positive interlocking under different measured signal frequencies
Mutually and increase the adjustment problem of the signal after gain；Compressed signal is handled simultaneously, not only most by adjusted amplitude maximum value
The mean value of small value is adjusted to zero, while ensuring that positive amplitude time and negative amplitude time are essentially identical, to ensure that phase noise
Accuracy when measurement and sensitivity.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
With within principle, any modification, equivalent replacement, improvement and so on should all be included in the protection scope of the present invention god.
Claims (2)
1. a kind of orthogonal phaselocked loop direct current biasing self-adapting regulation method, which is characterized in that first start a K value and measures, if
There are one reached amplitude peak range in the K values maximum value or minimum value measured, then it is assumed that is compressed signal, carries out
Compressed signal set-up procedure, otherwise, into the quick set-up procedure of direct current biasing；
Compressed signal set-up procedure is as follows：
Direct current biasing gear is transferred to minimum and is denoted as Level1 by step 11, and DAC is also adjusted to minimum and is denoted as DAC1；
Step 12 measures K values, according to the mean value of K value max mins × current gain sensitivity, obtains DAC adjustment amounts note
For Δ DAC；
Gear Level1=current gear+(Δ DAC-DAC1)/3071 after step 13, adjustment；
DAC1=Δ DAC+ originals DAC1+3071 × (gear-current gear after adjustment) after step 14, adjustment；
Gear and biasing is arranged by gear Level1 and DAC setting direct current biasings DAC1 after adjustment in step 15；
Step 16 measures K values, if maximum value minimum mean presses index close to zero, continues to execute step 17, otherwise executes step
Rapid 12；
Direct current biasing gear Level1, DAC value DAC1 after adjustment after step 17, record adjustment；
Direct current gear is transferred to maximum and is denoted as Level2 by step 18, and DAC is also adjusted to maximum and is denoted as DAC2；
Step 19, measurement K values obtain DAC adjustment amount Δs according to the mean value of K value max mins × current gain sensitivity
DAC；
Gear Level2=current gear+(Δ DAC-DAC2)/3071 after step 110, adjustment；
DAC2=Δ DAC+ originals DAC2+3071 × (gear-current gear after adjustment) after step 111, adjustment；
Direct current biasing is arranged by gear after adjustment and DAC in step 112；
Step 113 measures K values, if maximum value minimum mean presses index close to zero, adjustment terminates, no to then follow the steps 18；
Direct current biasing gear Level2, DAC value DAC2 after adjustment after step 114, record adjustment；
Step 115 will be used as final gear, setting to arrive hardware after (Level1+Level2)/2 downward rounding；
Step 116 will be used as final DAC, setting to arrive hardware after (DAC1+DAC2)/2 downward rounding；
The quick set-up procedure of direct current biasing specifically includes direct current biasing sensitivity measure step and biasing gear conversion quickly adjustment
Step；
Direct current biasing sensitivity measure step specifically includes：
Direct current biasing gear is adjusted to minimum by step 21, and DAC is also adjusted to minimum；
Step 22 constantly adjusts DAC, is measured by K values, until the Amplitude maxima of K value results is less than the 1/ of amplitude peak
2, when DAC is maximum value 4095, a gear is turned up；
Step 23, when measuring current DAC respectively and increasing by 500 and reduce 500, maximum amplitude value K1, K2 of K value results；
Step 24, then sensitivity=(K1-K2)/1000；
Step 25, storage current gain sensitivity, and adjust gain gear, repeat step 21~step 24, until measuring and protecting
Deposit the direct current biasing sensitivity of whole gain shifts；
It is specific as follows to bias the quick set-up procedure of gear conversion：
Current gear and DAC are configured to hardware plank by step 31, are denoted as DAC1 '；
Step 32 measures K values, according to the mean value of K value max mins × current gain sensitivity, obtains DAC adjustment amounts note
For nDAC2 '；
Gear=current gear+(nDAC2 '-DAC1 ')/3071 after step 33, adjustment；
DAC=nDAC2 '+DAC1 '+3071 × (gear-current gear after adjustment) after step 34, adjustment；
Direct current biasing is arranged by gear after adjustment and DAC in step 35.
2. orthogonal phaselocked loop direct current biasing self-adapting regulation method as described in claim 1, which is characterized in that
In step 23, if be more than 0~4095 range when DAC plus-minuss 500, integral translation accommodation.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101076008A (en) * | 2007-07-17 | 2007-11-21 | 华为技术有限公司 | Method and apparatus for processing clipped wave |
| CN103414435A (en) * | 2013-06-24 | 2013-11-27 | 中国电子科技集团公司第十研究所 | Predistortion linearization device of millimeter wave power amplifier |
| CN103986681A (en) * | 2014-05-15 | 2014-08-13 | 东南大学 | Low peak-to-average ratio wireless light transmission method with clipping moving |
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| US8638249B2 (en) * | 2012-04-16 | 2014-01-28 | Infineon Technologies Ag | System and method for high input capacitive signal amplifier |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101076008A (en) * | 2007-07-17 | 2007-11-21 | 华为技术有限公司 | Method and apparatus for processing clipped wave |
| CN103414435A (en) * | 2013-06-24 | 2013-11-27 | 中国电子科技集团公司第十研究所 | Predistortion linearization device of millimeter wave power amplifier |
| CN103986681A (en) * | 2014-05-15 | 2014-08-13 | 东南大学 | Low peak-to-average ratio wireless light transmission method with clipping moving |
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