CN105336634B - A kind of detection method of semiconductor structure - Google Patents
A kind of detection method of semiconductor structure Download PDFInfo
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- CN105336634B CN105336634B CN201410294223.3A CN201410294223A CN105336634B CN 105336634 B CN105336634 B CN 105336634B CN 201410294223 A CN201410294223 A CN 201410294223A CN 105336634 B CN105336634 B CN 105336634B
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Abstract
The present invention provides a kind of detection method of semiconductor structure, it will be in all typical structures of metal connecting line the technique respectively Cutting Road that wafer is set of circulating repetition in the present invention, and the size in each circulating repetition region meet ultrasound examination needed for size, then the typical structure is detected using ultrasonic wave, it can timely find the cavity blemish inside the typical structure of metal connecting line technique or in the presence of bottom, avoid the generation for causing more low yield product problems；Meanwhile various typical structures being all disposed in Cutting Road, it may be implemented to be used for quickly detecting all typical structures, substantially increase the efficiency of detection.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors more particularly to the detection method fields of semiconductor structure.
Background technique
During chip manufacturing process, Metal Bonding Technology is indispensable technique.Either physical deposition or chemical-electrical
Plating, is likely to form cavity blemish in metal interconnection structure.When cavity blemish is in metal surface, pass through conventional light
Learn defects detection instrument, such as BFI (Bright Field Inspection, bright field Defect Scanning machine) or DFI (Dark
Field Inspection, dark field Defect Scanning machine), it is easy to detect discovery.But when as shown in Figure 1, this cavity blemish 10
Inside typical structure 11 in metal connecting line technique or when bottom, conventional optical detecting instrument can not detect shown cavity
Defect 10 has generally required just to find the problem when the verifying of last yield.But at this moment, problematic equipment or technique have been run
Long period causes a large amount of low yield product.
In consideration of it, it is necessary to design the new method of one kind to solve the above technical problems.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of detection sides of semiconductor structure
Method since cavity blemish is located at metal connecting line inside or bottom, uses conventional optical detector in the prior art for solving
Device can not detect in time, when finally carrying out yield verifying and finding the problem, problematic equipment or technique have been running for compared with
Long time, the problem of causing a large amount of low yield product.
In order to achieve the above objects and other related objects, the present invention provides a kind of detection method of semiconductor structure, at least
The following steps are included:
1) wafer is provided, the typical structure of metal connecting line technique is prepared in the Cutting Road of the wafer；
2) wafer for obtaining step 1) is placed on detection board, is detected using ultrasonic wave to the typical structure,
And obtain corresponding echo signal；
3) typical structure of ultrasound examination in step 2) is sliced sample preparation, carries out TEM sample detection；If not detecting
Echo signal obtained in step 2) is stored in database, is denoted as the first echo signal by cavity blemish；If detecting, cavity is lacked
It falls into, repeats step 1) to step 3)；
4) step 1) is repeated to step 2), and the obtained echo signal of step 2) is denoted as the second echo signal, it will be described
The first echo signal deposited in second echo signal and database is compared, and the waveform according to second echo signal is
It is no to be had differences with the first echo signal waveform to judge in typical structure to be detected with the presence or absence of cavity blemish.
Preferably, at least further comprising the steps of in step 1):
A) it is concluded to obtain the typical structure in metal connecting line technique according to chip design rule；
B) photoetching, etching, dielectric deposition, CMP and metal connecting line technique are successively carried out, by typical case obtained in step a)
Structure is prepared in the Cutting Road of wafer.
Preferably, typical structure described in step a) includes all typical structures in metal connecting line technique.
Preferably, the identical typical structure is arranged in array region in the Cutting Road of wafer in step 1).
Preferably, the side length for the array region that typical structure described in step 1) is formed is all larger than 10 microns.
Preferably, the array region that typical structure described in step 1) is formed includes at least two different typical structure shapes
At array region.
Optionally, in the array region that typical structure described in step 1) is formed, the spacing of adjacent two typical structure and institute
Stating the ratio between size of typical structure is 1:5~5:1.
Preferably, in the array region that typical structure described in step 1) is formed, the spacing of adjacent two typical structure and institute
Stating the ratio between size of typical structure is 1:1.
Preferably, the spacing between array region that adjacent two typical structure is formed in step 1) is greater than 10 microns.
Preferably, the typical structure is detected using ultrasonic wave method are as follows: use ultrasonic instrument
Probe successively carries out 100% scanning to the circulating repetition region of typical structure described in every kind.
As described above, the detection method of semiconductor structure of the invention, has the advantages that metal connects in the present invention
Circulating repetition is arranged in the Cutting Road of wafer all typical structures of Wiring technology respectively, and the ruler in each circulating repetition region
It is very little meet ultrasound examination needed for size, then the typical structure is detected using ultrasonic wave, can timely be sent out
Cavity blemish inside the typical structure of cash category connecting line technics or in the presence of bottom avoids and causes more low yield products
The generation of problem；Meanwhile various typical structures being all disposed in Cutting Road, it may be implemented to carry out all typical structures quick
Detection, substantially increases the efficiency of detection.
Detailed description of the invention
Fig. 1 is shown as inside or bottom in metal connecting line technique in the prior art, and there are the typical structures of cavity blemish
Schematic diagram.
Fig. 2 is shown as the flow chart of the detection method of semiconductor structure of the invention.
Fig. 3 is shown as three kinds of typical structures of cylindrical tungsten Joining Technology in the detection method of semiconductor structure of the invention
Schematic diagram.
Fig. 4 is shown as in the detection method of semiconductor structure of the invention using ultrasonic wave to internal in metal connecting line technique
The schematic diagram for not having the typical structure of cavity blemish to be detected.
Fig. 5 is shown as in the detection method of semiconductor structure of the invention using ultrasonic wave to internal in metal connecting line technique
The schematic diagram for thering is the typical structure of cavity blemish to be detected.
Component label instructions
10,20 cavity blemish
11,21 typical structure
22 ultrasonic waves
The width of typical structure in d cylinder tungsten Joining Technology
The height of typical structure in L cylinder tungsten Joining Technology
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
Fig. 2 is please referred to Fig. 5, it should be noted that diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, though only show in schema with related component in the present invention rather than package count when according to actual implementation
Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its
Assembly layout kenel may also be increasingly complex.
Fig. 2 to Fig. 5 is please referred to, the present invention provides a kind of detection method of semiconductor structure, at least includes the following steps:
1) wafer is provided, the typical structure 21 of metal connecting line technique is prepared in the Cutting Road of the wafer；
2) wafer for obtaining step 1) is placed on detection board, is examined using ultrasonic wave 22 to the typical structure 21
It surveys, and obtains corresponding echo signal；
3) typical structure 21 for detecting ultrasonic wave 22 in step 2) is sliced sample preparation, carries out TEM sample detection；If not examining
Cavity blemish 20 is measured, echo signal obtained in step 2) is stored in database, the first echo signal is denoted as；If detecting
Cavity blemish 20 repeats step 1) to step 3)；
4) step 1) is repeated to step 2), and the obtained echo signal of step 2) is denoted as the second echo signal, it will be described
The first echo signal deposited in second echo signal and database is compared, and the waveform according to second echo signal is
It is no to be had differences with the first echo signal waveform to judge in typical structure 21 to be detected with the presence or absence of cavity blemish 20.
In step 1), the S1 step and Fig. 3 of Fig. 2 are please referred to, a wafer is provided, is prepared in the Cutting Road of the wafer
The typical structure 21 of metal connecting line technique.
Specifically, at least further comprising the steps of in step 1):
A) conclude to obtain the typical structure 21 in metal connecting line technique according to chip design rule；
B) photoetching, etching, dielectric deposition, CMP and metal connecting line technique are successively carried out, by typical case obtained in step a)
Structure 21 is prepared in the Cutting Road of wafer.
Specifically, being directed to any metal connecting line technique, the type of corresponding typical structure 21 is all limited, all may be used
Change all typical structures 21 of institute in metal connecting line technique to conclude to obtain according to the corresponding design rule of metal connecting line process query
Type and feature.By taking cylindrical contact hole carries out the technique of tungsten connection as an example, Fig. 3 is all in cylindrical tungsten Joining Technology
Typical structure includes three kinds: the width d of the typical structure length L for being less than typical structure, in Fig. 3 shown in (a) altogether；It is typical
The width d of structure is equal to the length L of typical structure, in Fig. 3 shown in (b)；The width d of typical structure is greater than the length of typical structure
L is spent, in Fig. 3 shown in (c).For copper wiring technique, by contact hole and metallic combination at structure be likely more complexity, but still
Limited kind of typical structure out can so be summarized, will not enumerate here.
Specifically, typical structure 21 described in step a) should include all typical structures in metal connecting line technique.
Specifically, the identical typical structure is arranged in array region in the Cutting Road of wafer in step 1), so as to
All typical structures 21 are detected respectively during detection.Simultaneously as being examined using ultrasonic wave to sample
When survey, since the ultrasonic wave that board end is launched is the ultrasound beamformer with certain size, for the accuracy of detection,
There is corresponding requirement to the area to be tested area of sample, that is, the array region for requiring typical structure 21 described in step 1) to be formed
Side length be all larger than 10 microns.If the array region has on one side or the side length on multiple sides is less than 10 microns, cannot guarantee
Ultrasonic listening point is fallen completely in array region, the material structure of other performances on array region periphery, it will to ultrasonic wave
The result of detection has an impact, the accuracy of interference detection results.
It should be noted that in order under the premise of meeting the design rule in corresponding process node, so that the array
21 quantity of typical structure for including in region is most, to increase the accuracy of testing result, typical structure shape described in step 1)
At array region in, the spacing of adjacent two typical structure 21 and the ratio between the size of the typical structure should be set as 1:5~5:
1, it is preferable that in the present embodiment, the ratio between spacing and the size of the typical structure of adjacent two typical structure 21 are 1:1.
It should be further noted that the array region that typical structure described in step 1) is formed includes at least two differences
Typical structure 21 formed array region, to a kind of typical structure carry out ultrasound examination when, in order to avoid adjacent
Typical structure 21 impacts it, and the spacing between array region that adjacent two typical structure 21 is formed in step 1) is answered
At least more than 10 microns.
In step 2), the S2 step of Fig. 2 is please referred to, the wafer that step 1) is obtained is placed on detection board, using super
Sound wave 22 detects the typical structure 21, and obtains corresponding echo signal.
Specifically, the wafer that step 1) is obtained is placed on detection board, using ultrasonic wave 22 in the Cutting Road
Each typical structure detected one by one, specific method are as follows: using the probe of ultrasonic instrument successively to described in every kind
The circulating repetition region of typical structure carries out 100% scanning, to ensure the comprehensive and accuracy detected.Meanwhile it detecting
During, detection machine end receives the echo signal of the reflected ultrasonic wave from typical structure to be detected in real time, and
The echo signal is recorded.
In step 3), the S3 step and Fig. 4 of Fig. 2 are please referred to, the typical structure 21 that ultrasonic wave 22 in step 2) is detected
It is sliced sample preparation, carries out TEM sample detection；If not detecting cavity blemish 20, echo signal obtained in step 2) is stored in
In database, it is denoted as the first echo signal；If detecting cavity blemish 20, step 1) is repeated to step 3).
Specifically, needing to carry out ultrasound to the typical structure 21 of no cavity blemish 20 first in entire detection process
Wave detection, and the echo signal that will test establishes a standard database as normal echo signal, in case subsequent right
When being detected with typical structure in other typical structures or other techniques as a comparison.In order to ensure collected ultrasonic wave returns
Normal echo signal when acoustical signal needs the typical structure 21 to detection after the echo signal for being collected into step 2) detection
It is sliced sample preparation, carries out TEM sample detection；If not detecting cavity blemish 20, as shown in figure 4, determining obtained echo
Signal is normal echo signal, and is denoted as the first echo signal.If TEM, which is detected in shown typical structure 21, has cavity
Defect 20 then needs to repeat step 1) to step 3), until obtaining the characteristic feature 21 of no cavity blemish 20, and is collected into just
Normal echo signal, until setting up normal echo Signals Data Base.
In step 4), S4 step and Fig. 5 in Fig. 2 are please referred to, repeat step 1) to step 2), it will be obtained by step 2)
Echo signal be denoted as the second echo signal, the first echo signal deposited in second echo signal and database is carried out
It compares, judges typical case to be detected according to whether the waveform of second echo signal has differences with the first echo signal waveform
It whether there is cavity blemish 20 in structure 21.
Specifically, preparation is golden in the Cutting Road of the wafer specifically, repeating step 1) to step 2) provides a wafer
Belong to the typical structure 21 of connecting line technics, the wafer that step 1) is obtained is placed on detection board, using ultrasonic wave 22 to the allusion quotation
Type structure 21 is detected, and obtains corresponding echo signal, and the echo signal is denoted as the second echo signal, such as Fig. 5 institute
Show.
After being collected into the second echo signal, the first echo in second echo signal and the database is believed
It number is compared, if the waveform of the second echo signal is consistent with the first echo signal waveform, then it represents that metal detected connects
There is no cavity blemish in typical structure in Wiring technology, board can continue the production of the technique；If the second echo is believed
Number waveform had differences with the first echo signal waveform, then it represents that deposited in the typical structure in metal connecting line technique detected
There is cavity blemish, is at this moment just needing to stop the work of board end in time, respective metal connecting line technics is checked, is avoided in time
The generation for the product problem for causing more yields low.
It is that ultrasound is utilized specifically, being checked using ultrasonic wave the typical structure in the metal connecting line technique
Wave can generate the principle of different echo signals in different medium interfaces, i.e., when in the typical structure of metal connecting line technique not
There are when cavity blemish, when ultrasonic wave reaches the interface of typical structure and underlying dielectric layer, an echo signal can be generated, and is worked as
There are when cavity blemish in the typical structure of metal connecting line technique, these cavity blemish will change in typical structure metal under
The state of interface of layer dielectric layer, at this time when echo signal caused by ultrasonic wave reaches the interface will be with not having cavity blemish
Difference, according to the similarities and differences of echo signal, so that it may judge in typical structure with the presence or absence of cavity blemish.
It should be noted that the second echo signal that detection obtains, should be same with the first echo signal in database
The echo signal of same typical structure in road metal connecting line technique, to increase its accuracy for comparing structure.
In conclusion the detection method of semiconductor structure of the invention, has the advantages that metal connects in the present invention
Circulating repetition is arranged in the Cutting Road of wafer all typical structures of Wiring technology respectively, and the ruler in each circulating repetition region
It is very little meet ultrasound examination needed for size, then the typical structure is detected using ultrasonic wave, can timely be sent out
Cavity blemish inside the typical structure of cash category connecting line technics or in the presence of bottom avoids and causes more low yield products
The generation of problem；Meanwhile various typical structures being all disposed in Cutting Road, it may be implemented to carry out all typical structures quick
Detection, substantially increases the efficiency of detection.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (7)
1. a kind of detection method of semiconductor structure, which is characterized in that at least include the following steps:
1) wafer is provided, the typical structure of metal connecting line technique is prepared in the Cutting Road of the wafer；The identical allusion quotation
Type structure is arranged in array region in the Cutting Road of wafer, and it is micro- that the side length for the array region that the typical structure is formed is greater than 10
Rice, and the spacing between the array region of the adjacent two typical structure formation is greater than 10 microns；
2) wafer for obtaining step 1) is placed on detection board, is detected using ultrasonic wave to the typical structure, and
To corresponding echo signal；
3) typical structure of ultrasound examination in step 2) is sliced sample preparation, carries out TEM sample detection；If not detecting cavity
Echo signal obtained in step 2) is stored in database, is denoted as the first echo signal by defect；If detecting cavity blemish,
Step 1) is repeated to step 3)；
4) step 1) is repeated to step 2), the obtained echo signal of step 2) is denoted as the second echo signal, by described second
The first echo signal deposited in echo signal and database is compared, according to the waveform of second echo signal whether with
First echo signal waveform has differences to judge in typical structure to be detected with the presence or absence of cavity blemish.
2. the detection method of semiconductor structure according to claim 1, it is characterised in that: at least further include in step 1) with
Lower step:
A) it is concluded to obtain the typical structure in metal connecting line technique according to chip design rule；
B) photoetching, etching, dielectric deposition, CMP and metal connecting line technique are successively carried out, by typical structure obtained in step a)
It is prepared in the Cutting Road of wafer.
3. the detection method of semiconductor structure according to claim 2, it is characterised in that: typical structure described in step a)
Include all typical structures in metal connecting line technique.
4. the detection method of semiconductor structure according to claim 1, it is characterised in that: typical structure described in step 1)
The array region of formation includes at least the array region that two different typical structures are formed.
5. the detection method of semiconductor structure according to claim 1, it is characterised in that: typical structure described in step 1)
In the array region of formation, the ratio between spacing and the size of the typical structure of adjacent two typical structure are 1:5~5:1.
6. the detection method of semiconductor structure according to claim 5, it is characterised in that: typical structure described in step 1)
In the array region of formation, the ratio between spacing and the size of the typical structure of adjacent two typical structure are 1:1.
7. the detection method of semiconductor structure according to claim 1, it is characterised in that: using ultrasonic wave to the typical case
The method that structure is detected are as follows: using the probe of ultrasonic instrument successively to the circulating repetition region of typical structure described in every kind
Carry out 100% scanning.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060021438A1 (en) * | 2004-07-29 | 2006-02-02 | Lasson Technologies, Inc. | Laser-ultrasonic detection of flip chip attachment defects |
| CN103837607A (en) * | 2014-01-21 | 2014-06-04 | 湖南大学 | Finite element simulation analysis method for ultrasonic wave welding spot detection |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060021438A1 (en) * | 2004-07-29 | 2006-02-02 | Lasson Technologies, Inc. | Laser-ultrasonic detection of flip chip attachment defects |
| CN103837607A (en) * | 2014-01-21 | 2014-06-04 | 湖南大学 | Finite element simulation analysis method for ultrasonic wave welding spot detection |
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