CN105329848A - MEMS sandwich accelerometer sensitive chip wet etching processing method - Google Patents

MEMS sandwich accelerometer sensitive chip wet etching processing method Download PDF

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Publication number
CN105329848A
CN105329848A CN201510632791.4A CN201510632791A CN105329848A CN 105329848 A CN105329848 A CN 105329848A CN 201510632791 A CN201510632791 A CN 201510632791A CN 105329848 A CN105329848 A CN 105329848A
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China
Prior art keywords
layer
silicon
wet etching
film layer
oxide
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CN201510632791.4A
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Chinese (zh)
Inventor
刘宇
刘福民
邢朝洋
徐宇新
李昌政
刘国文
梁德春
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China Aerospace Times Electronics Corp
Beijing Aerospace Control Instrument Institute
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China Aerospace Times Electronics Corp
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Priority to CN201510632791.4A priority Critical patent/CN105329848A/en
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
    • B81C1/00523—Etching material
    • B81C1/00539—Wet etching
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P15/0802—Details

Abstract

The present invention discloses a MEMS sandwich accelerometer sensitive chip wet etching processing method, a single-layer oxide layer is grown on a silicon wafer, double-sided lithographic etching the single-layer oxide film layer is performed for 3 times, the depth of each tie of etching is precisely controlled, and the single-layer oxide film layer is divided into three layers of different structures of oxide film layers. At a temperature of 60-80 DEG C, the silicon wafer is wet-etched, the first silicon etching time is 20 to 30 minutes, the first layer oxide film layer is etched; the second silicon etching time is 150 to 160 minutes, the second layer oxide film layer is etched; the silicon wafer is wet-etched at a temperature of 30-40 DEG C in the third etching, the etching time is 30 to 40 minutes, and the third layer oxide film layer is etched. A sensitive chip with smooth surface and accurate dimension can be processed by the method, and by improvement of the method, the quality and rate of finished products of the sensitive chip can be greatly improved.

Description

The wet etching processing method of MEMS sandwich accelerometer sensitive chip
Technical field
The present invention relates to microelectromechanical systems manufacture field, particularly relate to a kind of wet etching processing method of MEMS sandwich accelerometer sensitive chip.
Background technology
Mems accelerometer is low with its cost, volume is little, low in energy consumption, the feature such as to can be mass-produced obtains a wide range of applications in the various fields such as national defence, inertial navigation, seismic survey, industry, medical treatment, automation and consumer electronics.
MEMS sandwich accelerometer adopts bulk silicon micromachining fabrication techniques, technique relative complex but the high accuracy of detection that is more easy to get.Sensitive chip is the critical component of MEMS sandwich accelerometer, and its corrosion processing technique is the most key.
Silicon etching process is divided into dry etching and wet etching.
Dry etching utilizes gas molecule under highfield effect, produces glow discharge.In discharge process, gas molecule is energized and produces active group, these active groups can with Silicon Wafer generation chemical reaction, generate escaping gas and being pulled away.But apparatus expensive, processing cost are high, technological parameter is difficult to control, working depth is limited, be not suitable for batch production.Mems accelerometer sensitive chip groove for processing corrosion hundreds of micron is difficult to realize, and the method is inapplicable.
Wet etching is exactly wafer is placed in liquid corrosive liquid to corrode, in corrosion process, the material that corrosive liquid touches it by chemical reaction progressively etch dissolve.Conventional etching process carries out under etching mask regulation, the aspect that once generation one is new or shoulder height.In many microelectronic mechanical devices, need to make the structure containing multilayer steps, the photoetching method utilizing some special can operate on darker erosional surface, and once mask corrosion is had after photoetching each time, so repeated multiple timesly also sandwich construction can be made, but the very complicated and very difficult guarantee yield rate of such technique, the equipment of needs is also very expensive.
Summary of the invention
Technical problem to be solved by this invention is: overcome the deficiencies in the prior art, provides the wet etching processing method of MEMS sandwich accelerometer sensitive chip, and the method can be avoided repeatedly being oxidized; And the problem that deep trouth rubberization thickness inequality causes lithographic results not good can be prevented.
Technical scheme of the present invention is: the wet etching processing method of MEMS sandwich accelerometer sensitive chip, and step is as follows:
1) Silicon Wafer oxide-film is generated;
2) on oxide-film, carry out 3 secondary clearing processing
As shown in Figure 1, oxide-film carries out 3 conventional dual surface lithography corrosion, structure is formed by 3 different positive glue pattern transfer printings, the visuals of each exposure includes the visuals of exposure last time, corrode under glue protection at every turn, control each corrosion depth, mono-layer oxidized rete is divided into 3 layers of oxidation film layer of different structure, the degree of depth is respectively t1, t2, t3;
3) as shown in Figure 2, respectively carry out 3 wet etchings to silicon and oxidation film layer, the silicon etch solution that wherein the 1st, 2 silicon corrosion adopts is the first corrosive liquid, and the corrosive liquid that the 3rd silicon corrosion adopts is the second corrosive liquid; Described silicon etch solution is mixed by potassium hydroxide, deionized water, there are 2 kinds of proportionings and forms of corrosion, the first silicon etch solution proportioning is potassium hydroxide, deionized water quality ratio is 1:1 ~ 2, temperature 60 ~ 80 DEG C, corrosion rate Selection radio s1 is 90 ~ 100, the second corrosive liquid proportioning is potassium hydroxide, deionized water quality ratio is 1:2 ~ 3, temperature 30 ~ 40 DEG C, and corrosion rate Selection radio s2 is 40 ~ 60;
31) the 1st silicon wet etching is protected by the 1st layer of oxidation film layer t1, and obtain the 1st layer of step d1 of silicon structure, wherein d1 chooses 20 μm ~ 30 μm, and t1 >=d1/s1;
32) the 1st oxidation film layer wet etching erodes the 1st layer of oxidation film layer by oxide-film corrosive liquid, and thickness is t1-d1/s1;
33) the 2nd wet etching is protected by the 2nd layer of oxidation film layer t2, and obtain the 2nd layer of step d2 of silicon structure, wherein d2 chooses 150 μm ~ 160 μm, and t2 >=d2/s1;
34) the 2nd oxidation film layer wet etching erodes the 2nd layer of oxidation film layer by oxide-film corrosive liquid, and thickness is t2-d2/s1;
35) the 3rd wet etching protects t3 by the 3rd layer of oxidation film layer, and obtain the 3rd layer of step d3 of silicon structure, wherein d3 chooses 2 μm ~ 3 μm, and t3 >=d3/s2;
36) the 3rd oxidation film layer wet etching erodes the 3rd layer of oxidation film layer by oxide-film corrosive liquid, and thickness is t3-d3/s2, obtains final silicon structure.
Described step 1) at 1000 ~ 1100 DEG C, wet-oxygen oxidation is carried out to Silicon Wafer, generate oxide-film; Oxygen flow 0.6 ~ 1.0l/min, oxidization time is greater than 20 hours, and film forming thickness is 3 μm ~ 3.2 μm at t;
Described oxide-film corrosive liquid is mixed by ammonium fluoride, hydrogen fluoride, deionized water, and ammonium fluoride, hydrogen fluoride, deionized water quality ratio are 0.4 ~ 0.6:0.4 ~ 0.6:1, temperature 18 ~ 22 DEG C.
The present invention's beneficial effect is compared with prior art:
(1) utilize dual surface lithography technology, in the present invention, the mono-layer oxidized film of Silicon Wafer both sides is divided into 3 layers of oxide-film and uses, avoid the trouble of carrying out once oxidation when Silicon Wafer corrodes after photoetching each time;
(2) the multilayer oxide-film technology in the present invention is utilized, replace up to a hundred microns of deep trouth photoetching forms in bulk silicon micromachining in the past, due to the thickness only several microns of oxide-film, each processing corrosion size is below 3 microns, can by Silicon Wafer oxide-film surface when to make comparisons smooth plane treatment during photoetching, avoid that irregular bottom reflection, the exposure imaging caused of Silicon Wafer deep trouth photoetching gluing is improper, the trouble of standing wave effect etc.;
(3) utilize the silicon etch solution of different ratio in the present invention to corrode Silicon Wafer, the first silicon etch solution can corrode Silicon Wafer fast, and corrosion rate is 1 ~ 1.2 μm/min, and corrosion surface is smooth; The second silicon etch solution can the accurate control corrosion rate degree of depth, and corrosion rate is 0.08 ~ 0.1 μm/min;
(4) the oxide-film corrosive liquid in the present invention is utilized, can the corrosion rate of controlled oxidization film accurately, be 0.06 ~ 0.08 μm/min; Invention increases MEMS sandwich accelerometer sensitive chip corrosion processing quality, and technique is simple, reliability is high, can Long-Time Service.
Accompanying drawing explanation
Fig. 1 is oxidation film layer structural representation of the present invention.
Fig. 2 is silicon corrosion structure schematic diagram of the present invention.
Detailed description of the invention
Lower mask body introduces detailed process of the present invention:
1) generate Silicon Wafer oxide-film, carry out wet-oxygen oxidation at 1000 ~ 1100 DEG C to Silicon Wafer, oxygen flow 0.6 ~ 1.0l/min, oxidization time is greater than 20 hours, and film forming thickness is 3 μm ~ 3.2 μm at t;
The chemical equation that wet oxidation layer generates is:
Si+2H 2O＝SiO 2+2H 2
2) on oxide-film, 3 secondary clearing processing are carried out, 3 conventional dual surface lithography corrosion are carried out to oxide-film, structure is formed by 3 different positive glue pattern transfer printings, the visuals of each exposure includes the visuals of exposure last time, processing corrosion size is below 3 microns, can by Silicon Wafer oxide-film surface when making comparisons smooth plane treatment during photoetching, corrode under glue protection at every turn, corrosive liquid is oxide-film corrosive liquid, by ammonium fluoride, hydrogen fluoride, deionized water mixes, ammonium fluoride, hydrogen fluoride, deionized water quality ratio is 0.4 ~ 0.6:0.4 ~ 0.6:1, temperature 18 ~ 22 DEG C, corrosion rate is 0.06 ~ 0.08 μm/min, 1st corrosion depth t1, 2nd corrosion depth t2, 3rd corrosion depth t3, t=t1+t2+t3, the each corrosion depth of accurate control, mono-layer oxidized rete is divided into 3 layers of oxidation film layer of different structure,
In the corrosive liquid that oxide-film forms at hydrogen fluoride and ammonium fluoride, chemical reaction equation occurring is:
SiO 2+4HF+2NH 4F＝(NH 4) 2SiF 6+H 2O
The main process of reaction:
3) the 1st silicon wet etching is protected by the 1st layer of oxidation film layer t1, under 60 ~ 80 DEG C of temperature conditions, wet etching is carried out to Silicon Wafer, silicon etch solution is by potassium hydroxide, deionized water mixes, 2 kinds of proportionings and forms of corrosion is had in the present invention, what the 1st silicon wet etching was selected is the first silicon etch solution, the first silicon etch solution proportioning is potassium hydroxide, deionized water quality is than being 1:1 ~ 2, temperature 60 ~ 80 DEG C, corrosion rate Selection radio s1 is 90 ~ 100, corrosion silicon time first time is 20 ~ 30 minutes, obtain the 1st layer of step d1 of silicon structure, wherein d1 chooses 20 μm ~ 30 μm, and t1 >=d1/s1,
Chemical reaction equation is there is in silicon in potassium hydroxide corrosive liquid:
KOH+H 2O＝K ++2OH -+H +；
Have the side of mask wet etching for 111}, the corrosion area that design is greater than 150 μm, would not because of { 111} face is intersected and formed V-shaped groove and etch-stop;
4) the 1st oxidation film layer wet etching erodes the 1st layer of remaining oxidation film layer by oxide-film corrosive liquid, and thickness is t1-d1/s1, and the time is 2 ~ 3 minutes;
5) the 2nd wet etching is protected by the 2nd layer of oxidation film layer t2, under 60 ~ 80 DEG C of temperature conditions, wet etching is carried out to Silicon Wafer, silicon etch solution chooses the first silicon etch solution in the present invention, corrode 150 ~ 160 minutes, obtain the 2nd layer of step d2 of silicon structure, wherein d2 chooses 150 μm ~ 160 μm, and t2 >=d2/s1;
6) the 2nd oxidation film layer wet etching erodes the 2nd layer of remaining oxidation film layer by oxide-film corrosive liquid, and thickness is t2-d2/s1, and the time is 5 ~ 7 minutes;
7) the 3rd wet etching is protected by the 3rd layer of oxidation film layer t3, under 30 ~ 40 DEG C of temperature conditions, wet etching is carried out to Silicon Wafer, silicon etch solution chooses the second silicon etch solution in the present invention, the second corrosive liquid proportioning is potassium hydroxide, deionized water quality ratio is 1:2 ~ 3, temperature 30 ~ 40 DEG C, and corrosion rate Selection radio s2 is 40 ~ 60, corrode 30 ~ 40 minutes, obtain the 3rd layer of step d3 of silicon structure, wherein d3 chooses 2 μm ~ 3 μm, and t3 >=d3/s2;
8) the 3rd oxidation film layer wet etching erodes the 3rd layer of remaining oxidation film layer by oxide-film corrosive liquid, and thickness is t3-d3/s2, and the time is 3 ~ 4 minutes, obtains final silicon structure.

Claims (3)

  1. The wet etching processing method of 1.MEMS sandwich accelerometer sensitive chip, is characterized in that step is as follows:
    1) Silicon Wafer oxide-film is generated;
    2) on oxide-film, carry out 3 secondary clearing processing
    Oxide-film carries out 3 conventional dual surface lithography corrosion, structure is formed by 3 different positive glue pattern transfer printings, the visuals of each exposure includes the visuals of exposure last time, corrode under glue protection at every turn, control each corrosion depth, mono-layer oxidized rete is divided into 3 layers of oxidation film layer of different structure, the degree of depth is respectively t1, t2, t3;
    3) respectively carry out 3 wet etchings to silicon and oxidation film layer, the silicon etch solution that wherein the 1st, 2 silicon corrosion adopts is the first corrosive liquid, and the corrosive liquid that the 3rd silicon corrosion adopts is the second corrosive liquid; Described silicon etch solution is mixed by potassium hydroxide, deionized water, there are 2 kinds of proportionings and forms of corrosion, the first silicon etch solution proportioning is potassium hydroxide, deionized water quality ratio is 1:1 ~ 2, temperature 60 ~ 80 DEG C, corrosion rate Selection radio s1 is 90 ~ 100, the second corrosive liquid proportioning is potassium hydroxide, deionized water quality ratio is 1:2 ~ 3, temperature 30 ~ 40 DEG C, and corrosion rate Selection radio s2 is 40 ~ 60;
    31) the 1st silicon wet etching is protected by the 1st layer of oxidation film layer t1, and obtain the 1st layer of step d1 of silicon structure, wherein d1 chooses 20 μm ~ 30 μm, and t1 >=d1/s1;
    32) the 1st oxidation film layer wet etching erodes the 1st layer of oxidation film layer by oxide-film corrosive liquid, and thickness is t1-d1/s1;
    33) the 2nd wet etching is protected by the 2nd layer of oxidation film layer t2, and obtain the 2nd layer of step d2 of silicon structure, wherein d2 chooses 150 μm ~ 160 μm, and t2 >=d2/s1;
    34) the 2nd oxidation film layer wet etching erodes the 2nd layer of oxidation film layer by oxide-film corrosive liquid, and thickness is t2-d2/s1;
    35) the 3rd wet etching protects t3 by the 3rd layer of oxidation film layer, and obtain the 3rd layer of step d3 of silicon structure, wherein d3 chooses 2 μm ~ 3 μm, and t3 >=d3/s2;
    36) the 3rd oxidation film layer wet etching erodes the 3rd layer of oxidation film layer by oxide-film corrosive liquid, and thickness is t3-d3/s2, obtains final silicon structure.
  2. 2. the wet etching processing method of MEMS sandwich accelerometer sensitive chip according to claim 1, is characterized in that: described step 1) at 1000 ~ 1100 DEG C, wet-oxygen oxidation is carried out to Silicon Wafer, generate oxide-film; Oxygen flow 0.6 ~ 1.0l/min, oxidization time is greater than 20 hours, and film forming thickness is 3 μm ~ 3.2 μm at t.
  3. 3. the wet etching processing method of MEMS sandwich accelerometer sensitive chip according to claim 1, it is characterized in that: described oxide-film corrosive liquid is mixed by ammonium fluoride, hydrogen fluoride, deionized water, ammonium fluoride, hydrogen fluoride, deionized water quality ratio are 0.4 ~ 0.6:0.4 ~ 0.6:1, temperature 18 ~ 22 DEG C.
CN201510632791.4A 2015-09-29 2015-09-29 MEMS sandwich accelerometer sensitive chip wet etching processing method Pending CN105329848A (en)

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Publication number Priority date Publication date Assignee Title
CN111044757A (en) * 2019-12-25 2020-04-21 北京航天控制仪器研究所 Three-layer bonded capacitive micro-accelerometer structure electrode leading-out method
CN111122904A (en) * 2019-12-20 2020-05-08 北京航天控制仪器研究所 Method for manufacturing sandwich accelerometer microstructure
CN113916255A (en) * 2021-08-31 2022-01-11 北京航天控制仪器研究所 Manufacturing method of MEMS inertial device accurate positioning structure for irradiation test

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111122904A (en) * 2019-12-20 2020-05-08 北京航天控制仪器研究所 Method for manufacturing sandwich accelerometer microstructure
CN111122904B (en) * 2019-12-20 2022-05-24 北京航天控制仪器研究所 Method for manufacturing sandwich accelerometer microstructure
CN111044757A (en) * 2019-12-25 2020-04-21 北京航天控制仪器研究所 Three-layer bonded capacitive micro-accelerometer structure electrode leading-out method
CN113916255A (en) * 2021-08-31 2022-01-11 北京航天控制仪器研究所 Manufacturing method of MEMS inertial device accurate positioning structure for irradiation test
CN113916255B (en) * 2021-08-31 2024-02-09 北京航天控制仪器研究所 Manufacturing method of MEMS inertial device accurate positioning structure for irradiation test

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Application publication date: 20160217