CN105322903A - Implementation method of digital lock-in amplifier based on FPGA - Google Patents

Abstract

The invention relates to a realization method of an FPGA-based digital lock-in amplifier, comprising: an orthogonal reference signal generation module, a carrier signal synthesis module, a CIC comb filter module, an FIR low-pass filter module, and a CORDIC vector operation module. The orthogonal reference signal generating module generates orthogonal trigonometric function SIN and COS waves of unit amplitude with the same frequency as the target signal. The original signal and the orthogonal reference signal SIN, COS are multiplied by the carrier synthesis module to generate two carrier signals. The two carrier signals are frequency-reduced respectively through the CIC comb filter module, and then filtered through the FIR low-pass filter module, and then demodulated and vectorized by the CORDIC vector operation module to obtain the amplitude and phase. The invention overcomes the requirement that the phase of the single reference signal and the target signal must be in the same phase in the conventional digital lock-in amplifier.

Description

A Realization Method of Digital Lock-in Amplifier Based on FPGA

technical field

The invention relates to the field of signal processing, in particular to an implementation method of an FPGA-based digital lock-in amplifier in the detection and processing of weak signals.

Background technique

Compared with other weak signal detection methods, the lock-in amplifier has higher stability and flexibility. The lock-in amplifier uses the correlation of the signal to extract the signal, and the correlation detection can compress the bandwidth to the maximum extent and suppress the noise. Traditional lock-in amplifiers are implemented using analog components, but this introduces more noise. Currently, digital lock-in amplifiers are being used more and more.

However, the phase requirement of the reference signal of the conventional digital lock-in amplifier is consistent with the target signal, which not only increases the complexity of the system to a certain extent, but also reduces the detection accuracy of the digital lock-in amplifier.

FPGA, that is, field programmable gate array, is composed of a large number of gate arrays, which can perform various complex digital signal processing operations. The hardware structure of data parallel processing is its advantage in the field of digital signal processing.

Applying FPGA to digital lock-in amplifier fully exploits the advantages of FPGA in digital signal processing and further improves the performance of digital lock-in amplifier.

Contents of the invention

The purpose of the present invention is to solve the deficiency that the reference signal phase of the conventional digital lock-in amplifier must be in phase with the target signal, and propose a method based on FPGA technology, low power consumption, low cost, and high detection accuracy digital lock-in amplifier .

The technical solution that the present invention adopts for realizing the above object is: a kind of realization method based on the digital lock-in amplifier of FPGA, realizes in the mode of functional module in FPGA, specifically comprises:

Generate quadrature trigonometric function SIN wave and COS wave with the same frequency and phase-independent unit amplitude as the target signal, as the quadrature reference signal of the digital lock-in amplifier;

According to the principle of correlation detection, the signal to be detected at the input end of the digital lock-in amplifier is multiplied by two orthogonal reference signals to generate two carrier signals;

Perform low-pass filter processing on each carrier signal to achieve the purpose of eliminating the AC component and retaining the DC component;

The filtered signal is demodulated by CORDIC algorithm, and the vector operation is performed to obtain the amplitude and phase of the target signal.

The said low-pass filter processing is carried out on each carrier signal, so as to achieve the purpose of eliminating the AC component and retaining the DC component. filter.

The order of the CIC comb filter depends on the relationship between the target signal frequency and the system sampling rate, specifically:

The present invention has the following advantages and beneficial effects:

1. two-way reference signal among the present invention has overcome single-way reference signal phase and this requirement of target signal must be in phase in conventional digital lock-in amplifier;

2. The combination of CIC comb filter and FIR low-pass filter improves the quality factor of the filter and further improves the detection accuracy of the digital lock-in amplifier.

Description of drawings

Fig. 1 is a structural block diagram of the present invention.

detailed description

The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

The realization method of a digital lock-in amplifier based on FPGA involved in the present invention is to perform CIC comb filter frequency reduction and FIR low-pass filter filtering on the carrier signal obtained by multiplying the original signal and the quadrature reference signal. Then through the CORDIC vector operation, the amplitude and phase of the target signal are obtained.

As shown in Figure 1, the implementation of FPGA-based digital lock-in amplifier mainly includes quadrature reference signal generation module, carrier synthesis module, CIC comb filter module, FIR low-pass filter module and CORDIC vector operation module.

The quadrature reference signal generation module generates quadrature trigonometric function SIN and COS waves with the same frequency and unit amplitude as the target signal, as the quadrature reference signal of the digital lock-in amplifier, and the reference signal has phase independence with the target signal. The two quadrature reference signals effectively solve the problem that the phase of the single reference signal and the target signal must be in the same phase in conventional digital lock-in amplifiers.

The carrier synthesis module, based on the principle of correlation detection, performs multiplication operations on the original signal and two orthogonal reference signals to achieve the effect of weakening the strength of non-correlation signals and generate two carrier signals.

The CIC filter module performs down-frequency processing on the two carrier signals respectively. The order of the filter depends on the relationship between the frequency of the target signal and the sampling rate of the system; for the case where the frequency of the target signal is much higher than the sampling frequency of the system, this module enables the FIR low-pass filter to pass fewer orders, reducing While shortening the waveform establishment time, the filtering performance of the FIR low-pass filter is effectively improved.

The FIR low-pass filter module performs low-pass filtering on the carrier signal, eliminates the AC component and retains the DC component. Its low-pass filter performance is a key index of digital lock-in amplifiers, which determines the high precision of lock-in amplifier detection.

The CORDIC vector operation module uses the CORDIC algorithm to demodulate the filtered signal and perform vector operation to obtain the amplitude and phase of the target signal. The CORDIC algorithm is an existing algorithm. For details, please refer to "FPGA Implementation of Digital Signal Processing" (by Beyer (US), translated by Liu Ling, 2011-3-1).

Claims (3)

1. an implementation method of a digital lock-in amplifier based on FPGA, is characterized in that, realizes in the mode of functional module in FPGA, specifically comprises: Generate quadrature trigonometric function SIN wave and COS wave with the same frequency and phase-independent unit amplitude as the target signal, as the quadrature reference signal of the digital lock-in amplifier; According to the principle of correlation detection, the signal to be detected at the input terminal of the digital lock-in amplifier is multiplied by two orthogonal reference signals to generate two carrier signals; Perform low-pass filter processing on each carrier signal to achieve the purpose of eliminating the AC component and retaining the DC component; The filtered signal is demodulated by CORDIC algorithm, and the vector operation is performed to obtain the amplitude and phase of the target signal. 2. the realization method of a kind of digital lock-in amplifier based on FPGA according to claim 1, it is characterized in that, described every carrier signal is carried out low-pass filter processing, thereby reaches eliminating AC component, retains the purpose of DC component , specifically: each carrier signal is subjected to frequency reduction processing by a CIC comb filter, and then filtered by an FIR low-pass filter. 3. the realization method of a kind of digital lock-in amplifier based on FPGA according to claim 2, is characterized in that, the order number of described CIC comb filter depends on the relation between target signal frequency and system sampling rate, Specifically: .