CN105321553A - Static random memory unit having anti-single event effect - Google Patents
Static random memory unit having anti-single event effect Download PDFInfo
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- CN105321553A CN105321553A CN201410276164.7A CN201410276164A CN105321553A CN 105321553 A CN105321553 A CN 105321553A CN 201410276164 A CN201410276164 A CN 201410276164A CN 105321553 A CN105321553 A CN 105321553A
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Abstract
The invention provides a static random memory unit having an anti-single event effect. The memory unit at least comprises: a first cross-coupling phase inverter being composed of a first pull-up transistor and a second pull-up transistor; a second cross-coupling phase inverter being composed of a first pull-down transistor and a second pull-down transistor; and a pass transistor which is composed of a first access transistor, a second access transistor, a third access transistor and a fourth access transistor. The static random memory unit can effectively prolong the feedback time required of turning the memory unit, so that the anti-single event upset capability of the memory unit can be improved in the situation that recovery time is not changed. The processes of the static random memory unit are completely compatible with digital logic process. The static random memory unit is less in parasitic capacitance, is low in power consumption, has a natural anti-single event latch-up capability and is free of increase of extra process cost.
Description
Technical field
The invention belongs to reservoir designs technical field, relate to a kind of static random access memory cell, particularly relate to a kind of static random access memory cell of anti-single particle effect.
Background technology
Traditional 6T static random access memory cell as shown in Figure 1, is be made up of two upper trombone slides, lower trombone slide and access pipe; Due to the bad environments of avionics equipment work, memory cell endures the radiation of various high energy particle to the fullest extent; But storer is comparatively responsive to high particle radiation.Traditional memory cell is generally difficult to meet anti-radiation requirement; So deviser is usually improved on the basis of conventional elements, to improve the capability of resistance to radiation of unit.
Single particle effect and total dose effect are the most common in radiation effect is also most important two kinds.
So-called single particle effect, as shown in Figure 2, refers to and incides sensitive volume by high energy particle (for body silicon device, sensitive volume refers to the reverse biased pn junction of its drain terminal; And for SOI device, refer to tagma during device closed condition) time, the energy of particle is absorbed by silicon materials, according to band theory of solid, the electronics being in valence band can obtain energy jump to conduction band, the hole of its correspondence then transits to more high-octane position downwards in valence band, and such electronics and hole have all become the charge carrier moved freely; Because surrounding voltages applies the existence of electric field, make the charge carrier moved freely do displacement, form electric current, but the restricted lifetime of charge carrier, so the final electric current formed is transient current; Transient current causes voltage drop in the loop in unit, and stored data are changed, and thisly causes the effect of storage unit occurrence logic mistake to be called single particle effect due to single particle.
The method that single-particle is reinforced is a lot, and most thinking is exactly the time extending backfeed loop, reduces the impact that single-particle causes; As added resistance in the loop or adding electric capacity, also has the RC loop of adding resistance and electric capacity formation, illustrate with the schematic diagram adding resistance in loop below, as shown in Figure 2, suppose that Q memory node stores high level, now trombone slide (PU1) and second time trombone slide (PD2) are conductings on first; Second time trombone slide (PU2) and first time trombone slide (PD1) are cut-offs; When there is High energy particles Radiation, Q point current potential declines; In one side first, the grid of trombone slide is low level, so VDD charges to Q, current potential is raised; Q point current potential declines on the other hand, trombone slide slowly conducting on second, so VDD charges to QB, QB current potential raises; It can be coupled to again the grid of first time trombone slide, and Q point current potential is reduced further; So the former makes Q point current potential raise, and recover original current potential, this rejuvenation is referred to as release time; The latter makes Q point current potential reduce, and reduce Q point current potential further, form positive feedback, this feedback procedure is referred to as feedback time; Add resistance in the feedback loop, namely extend feedback time, Q point current potential is declined slack-off, make great efforts to maintain high level, make memory node keep legacy data not change.
So-called total dose effect, refer to that high energy particle incides in insulation course, ionize out electronics and hole, due to the existence of electric field, electronics is easy to float to VDD and carries out compound, comparatively speaking, movement of hole speed is slow, can accumulate in a insulating layer and go out corresponding electronics in metal-oxide-semiconductor induced inside, cause the electric leakage of pipe, and these electric leakages not controlled by metal-oxide-semiconductor grid, this is the most unfavorable on the metal-oxide-semiconductor impact of closing, and it may cause it normally to close thus to affect circuit performance.On insulator in silicon technology, the reinforcement means of accumulated dose is a lot, and reinforcement means common on device is extracted in the tagma of metal-oxide-semiconductor, receives on set potential, thus reduces total dose effect.
Although introduce the passive device such as resistance or electric capacity in the memory unit, can improve anti-single particle effect, the resistance of resistance and the capacitance order of magnitude of electric capacity are comparatively large, and it must adopt extra technique to produce resistance and electric capacity; And even if produced these passive devices, but its area is also that storage unit is intolerable, for sram cell, it is fatal impact.
Given this, in order to strengthen the anti-single particle ability of static random access memory cell, the present invention intends proposing a kind of mode extending feedback time, improves anti-single particle ability; In addition, adopt soi process and body lead-out process, also can improve resistant to total dose ability; This process embodies one design of the present invention.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of static random access memory cell of anti-single particle effect, for solve introduce resistance and electric capacity in static random access memory of the prior art after cause complex manufacturing technology and the large problem of device area.
For achieving the above object and other relevant objects, the invention provides a kind of static random access memory cell of anti-single particle effect, described memory cell at least comprises:
First cross-couplings type phase inverter, is made up of trombone slide on trombone slide and second on first;
Second cross-couplings type phase inverter, is made up of first time trombone slide and second time trombone slide;
Transfer tube, is made up of the first access pipe, the second access pipe, the 3rd access pipe and the 4th access pipe.
Preferably, on described first, the grid of trombone slide is connected with the drain electrode of trombone slide on described second, and on described first, the drain electrode of trombone slide is connected with the grid of trombone slide on described second, on described first trombone slide source electrode and second on the source electrode of trombone slide all connect high level;
The grid and the 3rd of described first time trombone slide accesses the source electrode of pipe, the 4th drain electrode accessing pipe is connected, the drain electrode of first time trombone slide is connected with the drain electrode of trombone slide on described first, the grid and described first of described second time trombone slide accesses the source electrode of pipe, the second drain electrode accessing pipe is connected, the drain electrode of described second time trombone slide is connected with the drain electrode of trombone slide on described second, and the source electrode of described first time trombone slide and the source electrode of second time trombone slide all connect low level;
The source electrode of described first access pipe is connected with the second drain electrode accessing pipe, the drain electrode of described first access pipe connects the bit line of storage unit, the source electrode of described second access pipe is connected with the drain electrode of trombone slide on first, the drain electrode of first time trombone slide formation first memory node, and the grid of described first access pipe and the grid of the second access pipe all control by wordline;
The source electrode of described 3rd access pipe is connected with the 4th drain electrode accessing pipe, the drain electrode of described 3rd access pipe connects the antiposition line of storage unit, the source electrode of described 4th access pipe is connected with the drain electrode of trombone slide on second, the drain electrode of second time trombone slide formation second memory node, and the grid of described 3rd access pipe and the grid of the 4th access pipe all control by wordline.
Preferably, on described first, the grid of trombone slide is connected with the drain electrode of trombone slide on described second, and on described first, the drain electrode of trombone slide is connected with the grid of trombone slide on described second, on described first trombone slide source electrode and second on the source electrode of trombone slide all connect high level;
The grid of described first time trombone slide is connected with described 4th drain electrode accessing pipe, the drain electrode of described first time trombone slide and the drain electrode of trombone slide on first, first access the source electrode of pipe and the second source electrode accessing pipe and to be connected formation first memory node, the grid of second time trombone slide is connected with the described second drain electrode accessing pipe, the drain electrode of described second time trombone slide and the drain electrode of trombone slide on second, the 3rd access the source electrode of pipe and the 4th source electrode accessing pipe and to be connected formation second memory node, and the source electrode of described first time trombone slide and the source electrode of second time trombone slide all connect low level;
The drain electrode of described first access pipe connects the bit line of storage unit, and the described grid of the first access pipe and the grid of the second access pipe all control by wordline;
The drain electrode of described 3rd access pipe connects the antiposition line of storage unit, and the described grid of the 3rd access pipe and the grid of the 4th access pipe all control by wordline.
Preferably, on described first, on trombone slide and second, trombone slide is PMOS, and two pipe sizings strictly mate, to increase cell stability.
Preferably, described first time trombone slide and second time trombone slide are NMOS tube, and two pipe sizings strictly mate, to increase cell stability.
Preferably, on described first, on trombone slide, second, trombone slide, first time trombone slide and second time trombone slide all adopt body lead-out process, and set potential is received in tagma.
Preferably, on described first, on trombone slide and second, high level is received in the tagma of trombone slide, and low level is received in the tagma of described first time trombone slide and second time trombone slide.
Preferably, described first access pipe, the second access pipe, the 3rd access pipe and the 4th access pipe are NMOS tube.
Preferably, the making substrate of the static random access memory cell of described anti-single particle effect is silicon-on-insulator substrate SOI.
Also providing a kind of utilizes described static ram cell to improve the purposes of anti-single particle effect.
As mentioned above, the static random access memory cell of anti-single particle effect of the present invention, described memory cell at least comprises the first cross-couplings type phase inverter, is made up of trombone slide on trombone slide and second on first; Second cross-couplings type phase inverter, is made up of first time trombone slide and second time trombone slide; Transfer tube, is made up of the first access pipe, the second access pipe, the 3rd access pipe and the 4th access pipe.The present invention effectively can extend the feedback time required for storage unit upset, can improve the anti-single particle overturn ability of storage unit when release time is constant; The technique that anti-single particle static random access memory cell of the present invention is taked and Digital Logic technique completely compatible, while there are little, low in energy consumption, natural these advantages of anti-single particle breech lock ability of stray capacitance, can not additional technology cost be increased.
Accompanying drawing explanation
Fig. 1 is the circuit theory diagrams of traditional SRAM6T unit.
Fig. 2 is the circuit theory diagrams of the SRAM6T unit of the anti-single particle effect adding resistance in prior art.
Fig. 3 is the circuit theory diagrams of the anti-single particle effect sram cell in the embodiment of the present invention one.
Fig. 4 is the circuit theory diagrams of the anti-single particle effect sram cell in the embodiment of the present invention two.
Element numbers explanation
10 first cross-couplings type phase inverters
20 second cross-couplings type phase inverters
Embodiment
Below by way of specific instantiation, embodiments of the present invention are described, those skilled in the art the content disclosed by this instructions can understand other advantages of the present invention and effect easily.The present invention can also be implemented or be applied by embodiments different in addition, and the every details in this instructions also can based on different viewpoints and application, carries out various modification or change not deviating under spirit of the present invention.
Refer to accompanying drawing.It should be noted that, the diagram provided in the present embodiment only illustrates basic conception of the present invention in a schematic way, then only the assembly relevant with the present invention is shown in graphic but not component count, shape and size when implementing according to reality is drawn, it is actual when implementing, and the kenel of each assembly, quantity and ratio can be a kind of change arbitrarily, and its assembly layout kenel also may be more complicated.
Embodiment one
As shown in Figure 3, the invention provides a kind of static random access memory cell of anti-single particle effect, described memory cell at least comprises: the first cross-couplings phase inverter 10, second cross-couplings type phase inverter 20 and transfer tube.
Described first cross-couplings type phase inverter 10 is made up of trombone slide on trombone slide and second on first.Exemplarily, on described first, on trombone slide and second, trombone slide is PMOS transistor, is designated as PU1 and PU2 respectively.The size of these two upper trombone slides is strictly mated, to increase the stability of storage unit.
Described second cross-couplings type phase inverter 20 first times trombone slides and second time trombone slide composition.Exemplarily, described first time trombone slide and second time trombone slide are nmos pass transistor, are designated as PD1 and PD2 respectively.The size of these two lower trombone slides is strictly mated, to increase the stability of storage unit.
Described transfer tube is controlled by wordline, and is made up of the first access pipe, the second access pipe, the 3rd access pipe and the 4th access pipe.Exemplarily, described first access pipe, the second access pipe, the 3rd access pipe and the 4th access pipe are nmos pass transistor, are designated as AC1, AC2, AC3, AC4 respectively.
In the present embodiment, on first, the grid of trombone slide PU1 is connected to the drain electrode of trombone slide PU2 on described second; On described first, the source electrode of trombone slide PU1 connects high level; On described first, the drain electrode of trombone slide PU1 is connected to the grid of trombone slide PU2 on described second;
On described second, the grid of trombone slide PU2 is connected to the drain electrode of trombone slide PU1 on described first; On described second, the source electrode of trombone slide PU2 connects high level; On described second, the drain electrode of trombone slide PU2 is connected to the grid of trombone slide PU1 on described first.
The grid of described first time trombone slide PD1 is connected to the source electrode QB ' (or drain electrode) of described 3rd access pipe AC3, the drain electrode QB ' (or source electrode) of described 4th access pipe AC4; The drain electrode of described first time trombone slide PD1 is connected to the drain electrode of trombone slide PU1 on described first, the source electrode (or drain electrode) of described second access pipe AC2; The source electrode of described first time trombone slide PD1 connects low level;
The grid of described second time trombone slide PD2 is connected to the source electrode Q ' (or drain electrode) of described first access pipe AC1, the drain electrode Q ' (or source electrode) of described second access pipe AC2; The drain electrode of described second time trombone slide PD2 is connected to the drain electrode of trombone slide PU2 on described second, the source electrode (or drain electrode) of described 4th access pipe AC4; The source electrode of described second time trombone slide PD2 connects low level.
For the transfer tube that wordline controls, the first access pipe AC1 and second access pipe AC2 forms the series loop of bit line BL and the first memory node Q; The grid of the first access pipe AC1 and second access pipe AC2 is all controlled by wordline WL; The source electrode Q ' (or drain electrode) of the first access pipe AC1, the drain electrode Q ' (or source electrode) of the second access pipe AC2 control the grid of second time trombone slide PD2; 3rd access pipe AC3 and the 4th access pipe AC4 forms the series loop of antiposition line BLB and the second memory node QB; The grid of the 3rd access pipe AC3 and the 4th access pipe AC4 is all controlled by wordline WL; The source electrode QB ' (or drain electrode) of the 3rd access pipe AC3, the drain electrode QB ' (or source electrode) of the 4th access pipe AC4 control the grid of first time trombone slide PD2.
Below the specific works mode of the memory cell of embodiment one correspondence is described in detail:
Storage unit has three kinds of duties: when storage unit be operated in write state time, such as write " 0 " data: first dragged down by bit line BL, antiposition line BLB is raised, and then wordline WL is raised, first access pipe AC1 and second access pipe AC2 is operated in linear zone, and the 3rd access pipe AC3 is operated in saturation region, and the 4th access pipe AC4 is operated in linear zone, by discharge and recharge, finally make the first memory node Q pull into low level, the second memory node QB lifts into high level; When being operated in read states, such as save as " 0 " data, first by pre-charge circuit, bit line BL is lifted into high level with antiposition line BLB, again wordline is raised, first access pipe AC1 and second access pipe AC2 conducting, is discharged by bit line BL, bit line BL current potential is declined, by sense amplifier, the potential difference (PD) between antiposition line BLB and bit line BL is amplified again, with judge the data that store as " 0 " data; When storage unit is operated in hold mode, only need wordline WL to drag down, the first access pipe, the 3rd access pipe cut-off, so bit line BL, antiposition line BLB data can not have influence on Q ' and QB '.
Supposing that the data that storage unit is deposited are " 1 " data, be namely the first memory node Q is high level, and the second memory node QB is low level; Wordline WL is low level (for single storage unit, the overwhelming majority time is in hold mode); The metal-oxide-semiconductor tagma that high-energy particle bombardment is in cut-off state is most harsh conditions, so the tagma of hypothesis high-energy particle bombardment first time trombone slide PD1: now on first time trombone slide PD1 and second, trombone slide PU2 is in cut-off state, and on second time trombone slide PD2 and first, trombone slide PU1 is in conducting state; After high-energy particle bombardment, form Transient Currents in the tagma of first time trombone slide PD1, now one part of current can flow to low spot position VSS by the body deriving structure in tagma and holds; Another part electric current causes the first memory node Q current potential to reduce.Now, on the one hand, the second memory node QB is still electronegative potential, and on first, trombone slide PU1 is conducting, is charged to the first memory node Q by noble potential VDD, prevents its current potential from reducing; On the other hand, the metal-oxide-semiconductor source electrode be connected with the first memory node Q or drain electrode, because the second access pipe is cut-off, its equivalent resistance is in megohm level, again due to second access that pipe is connected first to access pipe be end, what be connected with second time trombone slide is its grid, and equivalent resistance is than megohm rank also high several magnitude, so this just substantially prolongs its feedback time, thus improve anti-single particle effect.
Embodiment two
As shown in Figure 4, the invention provides the static random access memory cell of another kind of anti-single particle effect, described memory cell at least comprises: the first cross-couplings phase inverter 10, second cross-couplings type phase inverter 20 and transfer tube.
Described first cross-couplings type phase inverter 10 is made up of trombone slide on trombone slide and second on first.Exemplarily, on described first, on trombone slide and second, trombone slide is PMOS transistor, is designated as PU1 and PU2 respectively.The size of these two upper trombone slides is strictly mated, to increase the stability of storage unit.
Described second cross-couplings type phase inverter 20 first times trombone slides and second time trombone slide composition.Exemplarily, described first time trombone slide and second time trombone slide are nmos pass transistor, are designated as PD1 and PD2 respectively.The size of these two lower trombone slides is strictly mated, to increase the stability of storage unit.
Described transfer tube is controlled by wordline, is made up of the first access pipe, the second access pipe, the 3rd access pipe and the 4th access pipe.Exemplarily, described first access pipe, the second access pipe, the 3rd access pipe and the 4th access pipe are nmos pass transistor, are designated as AC1, AC2, AC3, AC4 respectively.
In the present embodiment, on described first, the grid of trombone slide PU1 is connected to the drain electrode of trombone slide PU2 on described second; On described first, the source electrode of trombone slide PU1 connects high level; On described first, the drain electrode of trombone slide PU1 is connected to the grid of trombone slide PU2 on described second;
On described second, the grid of trombone slide PU2 is connected to the drain electrode of trombone slide PU1 on described first; On described second, the source electrode of trombone slide PU2 connects high level; On described second, the drain electrode of trombone slide PU2 is connected to the grid of trombone slide PU1 on described first.
The grid of described first time trombone slide PD1 is connected to the drain electrode (or source electrode) of described 4th access pipe AC4; The drain electrode of described first time trombone slide PD1 is connected to the drain electrode of trombone slide PU1 on described first, the source electrode (or drain electrode) and described second of described first access pipe AC1 accesses the source electrode (or drain electrode) of pipe AC2, forms the first memory node Q; The source electrode of described first time trombone slide PD1 connects low level;
The grid of described second time trombone slide PD2 is connected to the drain electrode (or source electrode) of described second access pipe AC2; The drain electrode of described second time trombone slide PD2 is connected to the drain electrode of trombone slide PU2 on described second, the source electrode (or drain electrode) and the described 4th of described 3rd access pipe AC3 accesses the source electrode (or drain electrode) of pipe AC4, forms the second memory node QB; The source electrode of described second time trombone slide PD2 connects low level.
For the transfer tube that wordline controls, the drain electrode (or source electrode) of described first access pipe AC1 connects the bit line of storage unit, and the grid of described first access pipe AC1 and the grid of the second access pipe AC2 all control by wordline; The drain electrode (or source electrode) of described 3rd access pipe AC3 connects the antiposition line of storage unit, and the described grid of the 3rd access pipe AC3 and the grid of the 4th access pipe AC4 all control by wordline.
Wordline WL controls the conducting of bit line BL and the first memory node Q by controlling the first access pipe AC1; Wordline WL controls the grid of second time trombone slide PD2 and the conducting of the first memory node Q by controlling the second access pipe AC2; Wordline WL controls the conducting of antiposition line BLB and the second memory node QB by controlling the 3rd access pipe AC3; Wordline WL controls the grid of first time trombone slide PD1 and the conducting of the second memory node QB by controlling the 4th access pipe AC4.
Below the specific works mode of the memory cell of embodiment two correspondence is described in detail:
Storage unit has three kinds of duties: when storage unit be operated in write state time, such as write " 0 " data: first dragged down by bit line BL, antiposition line BLB is raised, and then wordline WL is raised, first access pipe AC1 conducting, the first memory node is by the first access tube discharge; 3rd access pipe conducting, the 4th access pipe conducting, antiposition line raises the grid voltage of first time trombone slide by the 3rd access pipe and the 4th access pipe, then is discharged further to the first memory node Q by first time trombone slide; Antiposition line is charged to the second memory node QB by the 3rd access pipe, and the current potential of the first memory node Q reduces, and is charged to QB by trombone slide PU1 on first; When being operated in read states, such as save as " 0 " data, first by pre-charge circuit, bit line BL is lifted into high level with antiposition line BLB, again wordline is raised, first access pipe conducting, is discharged by bit line BL, bit line BL current potential is declined, by sense amplifier, the potential difference (PD) between antiposition line BLB and bit line BL is amplified again, with judge the data that store as " 0 " data; When storage unit is operated in hold mode, only need wordline WL to drag down, the first access pipe, the 3rd access pipe cut-off, so bit line BL, antiposition line BLB data can not have influence on Q and QB.
Supposing that the data that storage unit is deposited are " 1 " data, be namely the first memory node Q is high level, and the second memory node QB is low level; Wordline WL is low level; So the tagma of hypothesis high-energy particle bombardment first time trombone slide PD1: now on first time trombone slide PD1 and second, trombone slide PU2 is in cut-off state, and on second time trombone slide PD2 and first, trombone slide PU1 is in conducting state; After high-energy particle bombardment, form Transient Currents in the tagma of first time trombone slide PD1, now one part of current can flow to low spot position VSS by the body deriving structure in tagma and holds; Another part electric current causes the first memory node Q current potential to reduce.Now, on the one hand, the second memory node QB is still electronegative potential, and on first, trombone slide PU1 is conducting, is charged to the first memory node Q by noble potential VDD, prevents its current potential from reducing; On the other hand, the metal-oxide-semiconductor source electrode be connected with the first memory node Q or drain electrode, because the second access pipe is cut-off, its equivalent resistance is in megohm level, again due to second access that pipe is connected first to access pipe be end, what be connected with second time trombone slide is its grid, and equivalent resistance is than megohm rank also high several magnitude, so this just substantially prolongs its feedback time, thus improve anti-single particle effect.
It should be noted that, in described first in the present invention, on trombone slide, second, trombone slide, first time trombone slide and second time trombone slide all adopt body lead-out process, and set potential is received in tagma.Particularly, on described first, on trombone slide and second, high level is received in the tagma of trombone slide, and low level is received in the tagma of described first time trombone slide and second time trombone slide.
Exemplarily, the making substrate of the random-access memory unit of described anti-single particle effect is silicon-on-insulator substrate SOI.
It is worth mentioning that again, the present invention is convenient in order to describe, only be specifically described with static RAM single port unit, if desired the anti-single particle effect of random access memory dual port cell is improved, utilize on thinking basis of the present invention, a little the number and connected mode that access pipe are changed a little and just can obtain, but spirit of its invention belongs to pioneering spirit of the present invention.
In sum, the invention provides a kind of static random access memory cell of anti-single particle effect, described memory cell at least comprises the first cross-couplings type phase inverter, is made up of trombone slide on trombone slide and second on first; Second cross-couplings type phase inverter, is made up of first time trombone slide and second time trombone slide; Transfer tube, is made up of the first access pipe, the second access pipe, the 3rd access pipe and the 4th access pipe.Described lower trombone slide and access pipe are all nmos pass transistors, and described upper trombone slide has PMOS transistor.The present invention utilizes metal-oxide-semiconductor to extend the stability that the backfeed loop time increases unit, thus improves the anti-single particle ability of unit; In unit of the present invention, in two cross-couplings type phase inverters, the size of the metal-oxide-semiconductor of Cheng Shuan needs strict coupling, to ensure the coupling of its technological parameter, in order to reduce the impact of mismatch in circuitry processes further, two upper trombone slides and two lower trombone slides are adopted body deriving structure; In addition, utilize SOI technology, adopt body deriving structure to make transistor, effectively can suppress floater effect and parasitic triode enlarge-effect, thus improve the single particle effect (simultaneously can also improve resistant to total dose effect) of unit; The SOI technology that the present invention adopts is mutually compatible with Digital Logic technique, while having little, low in energy consumption, natural these advantages of anti-single particle breech lock ability of stray capacitance, can not increase additional technology cost.
So the present invention effectively overcomes various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all without prejudice under spirit of the present invention and category, can modify above-described embodiment or changes.Therefore, such as have in art usually know the knowledgeable do not depart from complete under disclosed spirit and technological thought all equivalence modify or change, must be contained by claim of the present invention.
Claims (10)
1. a static random access memory cell for anti-single particle effect, is characterized in that, described memory cell at least comprises:
First cross-couplings type phase inverter, is made up of trombone slide on trombone slide and second on first;
Second cross-couplings type phase inverter, is made up of first time trombone slide and second time trombone slide;
Transfer tube, is made up of the first access pipe, the second access pipe, the 3rd access pipe and the 4th access pipe.
2. the static random access memory cell of anti-single particle effect according to claim 1, is characterized in that:
On described first, the grid of trombone slide is connected with the drain electrode of trombone slide on described second, and on described first, the drain electrode of trombone slide is connected with the grid of trombone slide on described second, on described first trombone slide source electrode and second on the source electrode of trombone slide all connect high level;
The grid and the 3rd of described first time trombone slide accesses the source electrode of pipe, the 4th drain electrode accessing pipe is connected, the drain electrode of first time trombone slide is connected with the drain electrode of trombone slide on described first, the grid and described first of described second time trombone slide accesses the source electrode of pipe, the second drain electrode accessing pipe is connected, the drain electrode of described second time trombone slide is connected with the drain electrode of trombone slide on described second, and the source electrode of described first time trombone slide and the source electrode of second time trombone slide all connect low level;
The source electrode of described first access pipe is connected with the second drain electrode accessing pipe, the drain electrode of described first access pipe connects the bit line of storage unit, the source electrode of described second access pipe is connected with the drain electrode of trombone slide on first, the drain electrode of first time trombone slide formation first memory node, and the grid of described first access pipe and the grid of the second access pipe all control by wordline;
The source electrode of described 3rd access pipe is connected with the 4th drain electrode accessing pipe, the drain electrode of described 3rd access pipe connects the antiposition line of storage unit, the source electrode of described 4th access pipe is connected with the drain electrode of trombone slide on second, the drain electrode of second time trombone slide formation second memory node, and the grid of described 3rd access pipe and the grid of the 4th access pipe all control by wordline.
3. the static random access memory cell of anti-single particle effect according to claim 1, is characterized in that:
On described first, the grid of trombone slide is connected with the drain electrode of trombone slide on described second, and on described first, the drain electrode of trombone slide is connected with the grid of trombone slide on described second, on described first trombone slide source electrode and second on the source electrode of trombone slide all connect high level;
The grid of described first time trombone slide is connected with described 4th drain electrode accessing pipe, the drain electrode of described first time trombone slide and the drain electrode of trombone slide on first, first access the source electrode of pipe and the second source electrode accessing pipe and to be connected formation first memory node, the grid of second time trombone slide is connected with the described second drain electrode accessing pipe, the drain electrode of described second time trombone slide and the drain electrode of trombone slide on second, the 3rd access the source electrode of pipe and the 4th source electrode accessing pipe and to be connected formation second memory node, and the source electrode of described first time trombone slide and the source electrode of second time trombone slide all connect low level;
The drain electrode of described first access pipe connects the bit line of storage unit, and the described grid of the first access pipe and the grid of the second access pipe all control by wordline;
The drain electrode of described 3rd access pipe connects the antiposition line of storage unit, and the described grid of the 3rd access pipe and the grid of the 4th access pipe all control by wordline.
4. the static random access memory cell of the anti-single particle effect according to Claims 2 or 3, is characterized in that: on described first, on trombone slide and second, trombone slide is PMOS, and two pipe sizings strictly mate, to increase cell stability.
5. the static random access memory cell of the anti-single particle effect according to Claims 2 or 3, is characterized in that: described first time trombone slide and second time trombone slide are NMOS tube, and two pipe sizings strictly mate, to increase cell stability.
6. the static random access memory cell of anti-single particle effect according to claim 1, is characterized in that: on described first, on trombone slide, second, trombone slide, first time trombone slide and second time trombone slide all adopt body lead-out process, and set potential is received in tagma.
7. the static random access memory cell of anti-single particle effect according to claim 6, is characterized in that: on described first, on trombone slide and second, high level is received in the tagma of trombone slide, and low level is received in the tagma of described first time trombone slide and second time trombone slide.
8. the static random access memory cell of anti-single particle effect according to claim 1, is characterized in that: described first access pipe, the second access pipe, the 3rd access pipe and the 4th access pipe are NMOS tube.
9. the static random access memory cell of anti-single particle effect according to claim 1, is characterized in that: the making substrate of the static random access memory cell of described anti-single particle effect is silicon-on-insulator substrate SOI.
10. one kind utilizes the static random access memory cell described in any one of claim 1 ~ 9 to improve the purposes of anti-single particle effect.
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