CN105320588A - Delay alarm circuit and method used for relay protective apparatus - Google Patents
Delay alarm circuit and method used for relay protective apparatus Download PDFInfo
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- CN105320588A CN105320588A CN201510240812.8A CN201510240812A CN105320588A CN 105320588 A CN105320588 A CN 105320588A CN 201510240812 A CN201510240812 A CN 201510240812A CN 105320588 A CN105320588 A CN 105320588A
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- relaying device
- circuit
- protective relaying
- alarm circuit
- door
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Abstract
The present invention discloses a delay alarm circuit and method used for a relay protective apparatus. The apparatus comprises a watchdog circuit, a delay alarm circuit and a door. An input end of the watchdog circuit is connected to a feeding dog output end of a CPU (Central Processing Unit) in the relay protective apparatus; the reset signal output end of the watchdog circuit is connected to reset signal input end of the CPU in the relay protective apparatus; a reset impulse signal output end of the CPU in the relay protective apparatus is connected to input end of the delay alarm circuit; the output end of the delay alarm circuit is connected to an input end of the door; an alarm end of the CPU in the relay protective apparatus is connected to another input end of the door; an output end of the door is used for outputting an alarm signal, and the alarm indicator is connected to the output end of the door. According to the delay alarm circuit and method used for the relay protective apparatus disclosed by the present invention, when a failure occurs to the CPU in the relay protective apparatus, the alarm output is timely driven, and the working state of the apparatus is displayed by means of the alarm indicator, and the circuit and the method have low cost, are easy to implement, and have excellent application prospects.
Description
Technical field
The present invention relates to protective relaying device operational reliability technical field, be specifically related to a kind of Delayed Alarm circuit for protective relaying device and method.
Background technology
Electric system is very high to protective relaying device reliability requirement; cause to prevent the CPU operation exception due to protective relaying device inside exporting misoperation; must adopt the state of independently circuit monitors CPU, and when CPU breaks down, Timeliness coverage drives alarm to export effectively.At present, following two kinds of methods are usually had:
(1) watchdog circuit is adopted to monitor CPU, and drive warning circuit, when CPU occurs abnormal, when cannot feed dog for a long time, watchdog circuit can reset to CPU, this reset signal is used for driving alarm to export simultaneously, this application model as shown in Figure 1, but, the reset of watchdog chip exports when not having feeding-dog signal for a long time, its output is the pulse signal of height saltus step, as shown in Figure 2, it is the waveform of the reset pulse that certain watchdog chip exports, can see when there is no outside feeding-dog signal, it is t that WDT can export high level width
wD, low level is t
rPimpulse hits signal, if drive alarm output loop with this signal, alarm output loop there will be discontinuity effective status, due to, now CPU is in malfunction always, so alarm output loop should continuously effective, this mode is the requirement that cannot meet alarm output loop,
(2) adopt and independently monitor that CPU monitors CPU, outside host CPU, independent increase by one independently monitors CPU, the CPU of this CPU FLASH low performance that has been generally built-in, as shown in Figure 3, provide the operating diagram of which, monitor the status surveillance that CPU has been used for host CPU, whether concrete supervision method can be normal by monitoring the pulse that host CPU exports, also the duty of host CPU can be judged by message interaction therebetween, under monitoring CPU finds the abnormal situation of state of host CPU, it can drive alarm to export effectively, as long as the state of host CPU is always abnormal, so alarm output loop will continuously effective, adopt this kind of scheme can the effective problem of alarm output loop discontinuity in solution (1) alarm output loop, but it is complicated that its shortcoming is circuit structure, need maintenance two independently cpu system, design loaded down with trivial details, cost is high.
Summary of the invention
In order to overcome above-mentioned problem; Delayed Alarm circuit for protective relaying device of the present invention and method; can when protective relaying device innernal CPU breaks down; timely driving alarm exports, and then locking is outputed, and passes through the duty of alarm indicator display device; complexity is low; cost is low, easily realizes, and has a good application prospect.
In order to achieve the above object, the technical solution adopted in the present invention is:
A kind of Delayed Alarm circuit for protective relaying device, it is characterized in that: comprise watchdog circuit, Delayed Alarm circuit and with door, the input end of described watchdog circuit is connected with the dog output terminal of feeding of protective relaying device innernal CPU, the reset signal output terminal of described watchdog circuit is connected with the reset signal input end of protective relaying device innernal CPU, the involution pulse signal output end of described protective relaying device innernal CPU is connected with the input end of Delayed Alarm circuit, the output terminal of described Delayed Alarm circuit is connected with an input end of door, the alarm output terminal of described protective relaying device innernal CPU is connected with another input end of door, the described output terminal with door is used for outputting alarm signal, describedly be connected with alarm indicator and alarm relay with the output terminal of door.
Aforesaid a kind of Delayed Alarm circuit for protective relaying device, is characterized in that: described Delayed Alarm circuit is the monostable circuit that 74HC123 integrated chip is formed, described 74HC123 integrated chip
pin or nB pin are connected with the involution pulse signal output end of protective relaying device innernal CPU, are parallel with electric capacity C between the nCEXT pin of described 74HC123 integrated chip and nREXT pin
eXT, described in state the nREXT pin of 74HC123 integrated chip also by resistance R
eXTbe connected with power end, the nCEXT pin of described 74HC123 integrated chip is also connected to the ground and connects, described electric capacity C
eXT, resistance R
eXTdetermine the delay time Tw of monostable circuit, described 74HC123 integrated chip
pin or nQ pin are connected with another input end of door.
Aforesaid a kind of Delayed Alarm circuit for protective relaying device, is characterized in that: the interval of two involution pulse signals of the involution pulse signal end output of described protective relaying device innernal CPU is less than delay time Tw.
Based on the alarm method of above-mentioned a kind of Delayed Alarm circuit for protective relaying device, it is characterized in that: comprise the following steps,
Step (1), according to the interval of two involution pulse signals that protective relaying device innernal CPU exports, builds Delayed Alarm circuit, ensures that the delay time Tw of Delayed Alarm circuit is greater than the interval of two involution pulse signals;
Step (2), by the duty of Delayed Alarm circuit monitors protective relaying device innernal CPU, if protective relaying device innernal CPU periodically exports involution pulse signal to Delayed Alarm circuit, and performs step (3); If do not receive the involution pulse signal that protective relaying device innernal CPU exports in the delay time Tw of Delayed Alarm circuit, then perform step (4);
Step (3), Delayed Alarm circuit keeps virgin state, and the normal operation of protective relaying device innernal CPU, with door not outputting alarm signal;
Step (4); the outputting alarm signal of protective relaying device innernal CPU gives the one end with door; Delayed Alarm circuit overturns simultaneously; export control signal to the other end with door; continue outputting alarm signal with door, alarm indicator lights, until protective relaying device innernal CPU exports involution pulse signal again to Delayed Alarm circuit; Delayed Alarm circuit reset, the alarm signal exported with door disappears.
The alarm method of aforesaid a kind of Delayed Alarm circuit for protective relaying device, is characterized in that: step (1) builds the delay time Tw of Delayed Alarm circuit, calculates according to formula (1),
Tw＝K*R
EXT*C
EXT(1)
Wherein, K is the integrated chip coefficient that Delayed Alarm circuit selects to form monostable circuit; R
eXTfor resistance R
eXTresistance; C
eXTfor electric capacity C
eXTcapacitance.
The invention has the beneficial effects as follows: the Delayed Alarm circuit for protective relaying device of the present invention and method; can when protective relaying device innernal CPU breaks down; timely driving alarm exports; and then locking is outputed; and pass through the duty of alarm indicator display device, complexity is low, and cost is low; easy realization, has a good application prospect.
Accompanying drawing explanation
Fig. 1 is the system chart that traditional employing watchdog circuit monitors CPU.
Fig. 2 is the waveform schematic diagram of the reset pulse that traditional watchdog chip exports.
Fig. 3 is that traditional employing independently monitors the system chart that CPU monitors CPU.
Fig. 4 is the system chart of the Delayed Alarm circuit for protective relaying device of the present invention.
Fig. 5 is the physical circuit figure of Delayed Alarm circuit of the present invention.
Embodiment
Below in conjunction with Figure of description, the present invention is further illustrated.
As shown in Figure 4, Delayed Alarm circuit for protective relaying device of the present invention, comprise watchdog circuit, Delayed Alarm circuit and with door, the input end of watchdog circuit is connected with the dog output terminal of feeding of protective relaying device innernal CPU, the reset signal output terminal of watchdog circuit is connected with the reset signal input end of protective relaying device innernal CPU, the involution pulse signal output end of described protective relaying device innernal CPU is connected with the input end of Delayed Alarm circuit, the output terminal of described Delayed Alarm circuit is connected with an input end of door, the alarm output terminal of described protective relaying device innernal CPU is connected with another input end of door, the described output terminal with door is used for outputting alarm signal, describedly be connected with alarm indicator and alarm relay with the output terminal of door.
As shown in Figure 5, described Delayed Alarm circuit is the monostable circuit that 74HC123 integrated chip is formed, and the implementation of monostable circuit is many, is not only confined to 74HC123 integrated chip of the present invention, 74HC123 integrated chip
pin or nB pin are connected with the involution pulse signal output end of protective relaying device innernal CPU, are parallel with electric capacity C between the nCEXT pin of 74HC123 integrated chip and nREXT pin
eXT, state the nREXT pin of 74HC123 integrated chip also by resistance R
eXTbe connected with power end, the nCEXT pin of 74HC123 integrated chip is also connected to the ground and connects, electric capacity C
eXT, resistance R
eXTdetermine the delay time Tw of monostable circuit, 74HC123 integrated chip
pin or nQ pin are connected with another input end of door.
The interval of two involution pulse signals of the involution pulse signal end output of described protective relaying device innernal CPU is less than delay time Tw,
Based on the alarm method of the above-mentioned Delayed Alarm circuit for protective relaying device, comprise the following steps,
Step (1); according to the interval of two involution pulse signals that protective relaying device innernal CPU exports; build Delayed Alarm circuit; ensure that the delay time Tw of Delayed Alarm circuit is greater than the interval of two involution pulse signals; delay time Tw; calculate according to formula (1)
Tw＝K*R
EXT*C
EXT(1)
Wherein, K is the integrated chip coefficient that Delayed Alarm circuit selects to form monostable circuit; R
eXTfor resistance R
eXTresistance; C
eXTfor electric capacity C
eXTcapacitance;
Step (2), by the duty of Delayed Alarm circuit monitors protective relaying device innernal CPU, if protective relaying device innernal CPU periodically exports involution pulse signal to Delayed Alarm circuit, and performs step (3); If do not receive the involution pulse signal that protective relaying device innernal CPU exports in the delay time Tw of Delayed Alarm circuit, then perform step (4);
Step (3), Delayed Alarm circuit keeps virgin state, and the normal operation of protective relaying device innernal CPU, with door not outputting alarm signal;
Step (4); the outputting alarm signal of protective relaying device innernal CPU gives the one end with door; Delayed Alarm circuit overturns simultaneously; export control signal to the other end with door; continue outputting alarm signal with door, alarm indicator lights, until protective relaying device innernal CPU exports involution pulse signal again to Delayed Alarm circuit; Delayed Alarm circuit reset, the alarm signal exported with door disappears.
Delayed Alarm circuit for protective relaying device of the present invention and method; be used for monitoring the duty of protective relaying device innernal CPU by watchdog chip; the Delayed Alarm circuit increased in addition exports to drive alarm; ensure the reliability that alarm exports; and carrying out involution by the involution pulse signal of protective relaying device innernal CPU to Delayed Alarm circuit, CPU monitors CPU to replace traditional employing independently to monitor, with low cost; simplicity of design, easily realizes.
In sum; Delayed Alarm circuit for protective relaying device of the present invention and method; can when protective relaying device innernal CPU breaks down; timely driving alarm exports, and then locking is outputed, and passes through the duty of alarm indicator display device; complexity is low; cost is low, easily realizes, and has a good application prospect.
More than show and describe ultimate principle of the present invention and principal character and advantage of the present invention.The technician of the industry should understand; the present invention is not restricted to the described embodiments; what describe in above-described embodiment and instructions just illustrates principle of the present invention; without departing from the spirit and scope of the present invention; the present invention also has various changes and modifications, and these changes and improvements all fall in the claimed scope of the invention.Application claims protection domain is defined by appending claims and equivalent thereof.
Claims (5)
1. the Delayed Alarm circuit for protective relaying device, it is characterized in that: comprise watchdog circuit, Delayed Alarm circuit and with door, the input end of described watchdog circuit is connected with the dog output terminal of feeding of protective relaying device innernal CPU, the reset signal output terminal of described watchdog circuit is connected with the reset signal input end of protective relaying device innernal CPU, the involution pulse signal output end of described protective relaying device innernal CPU is connected with the input end of Delayed Alarm circuit, the output terminal of described Delayed Alarm circuit is connected with an input end of door, the alarm output terminal of described protective relaying device innernal CPU is connected with another input end of door, the described output terminal with door is used for outputting alarm signal, describedly be connected with alarm indicator and alarm relay with the output terminal of door.
2. a kind of Delayed Alarm circuit for protective relaying device according to claim 1, is characterized in that: described Delayed Alarm circuit is the monostable circuit that 74HC123 integrated chip is formed, the n of described 74HC123 integrated chip
pin or nB pin are connected with the involution pulse signal output end of protective relaying device innernal CPU, are parallel with electric capacity C between the nCEXT pin of described 74HC123 integrated chip and nREXT pin
eXT, described in state the nREXT pin of 74HC123 integrated chip also by resistance R
eXTbe connected with power end, the nCEXT pin of described 74HC123 integrated chip is also connected to the ground and connects, described electric capacity C
eXT, resistance R
eXTdetermine the delay time Tw of monostable circuit, the n of described 74HC123 integrated chip
pin or nQ pin are connected with another input end of door.
3. a kind of Delayed Alarm circuit for protective relaying device according to claim 2, is characterized in that: the interval of two involution pulse signals of the involution pulse signal end output of described protective relaying device innernal CPU is less than delay time Tw.
4., based on the alarm method of a kind of Delayed Alarm circuit for protective relaying device according to claim 1, it is characterized in that: comprise the following steps,
Step (1), according to the interval of two involution pulse signals that protective relaying device innernal CPU exports, builds Delayed Alarm circuit, ensures that the delay time Tw of Delayed Alarm circuit is greater than the interval of two involution pulse signals;
Step (2), by the duty of Delayed Alarm circuit monitors protective relaying device innernal CPU, if protective relaying device innernal CPU periodically exports involution pulse signal to Delayed Alarm circuit, and performs step (3); If do not receive the involution pulse signal that protective relaying device innernal CPU exports in the delay time Tw of Delayed Alarm circuit, then perform step (4);
Step (3), Delayed Alarm circuit keeps virgin state, and the normal operation of protective relaying device innernal CPU, with door not outputting alarm signal;
Step (4); the outputting alarm signal of protective relaying device innernal CPU gives the one end with door; Delayed Alarm circuit overturns simultaneously; export control signal to the other end with door; continue outputting alarm signal with door, alarm indicator lights, until protective relaying device innernal CPU exports involution pulse signal again to Delayed Alarm circuit; Delayed Alarm circuit reset, the alarm signal exported with door disappears.
5. the alarm method of a kind of Delayed Alarm circuit for protective relaying device according to claim 4, is characterized in that: step (1) builds the delay time Tw of Delayed Alarm circuit, calculates according to formula (1),
Tw＝K*R
EXT*C
EXT(1)
Wherein, K is the integrated chip coefficient that Delayed Alarm circuit selects to form monostable circuit; R
eXTfor resistance R
eXTresistance; C
eXTfor electric capacity C
eXTcapacitance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510240812.8A CN105320588A (en) | 2015-05-12 | 2015-05-12 | Delay alarm circuit and method used for relay protective apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510240812.8A CN105320588A (en) | 2015-05-12 | 2015-05-12 | Delay alarm circuit and method used for relay protective apparatus |
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| Publication Number | Publication Date |
|---|---|
| CN105320588A true CN105320588A (en) | 2016-02-10 |
Family
ID=55248008
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510240812.8A Pending CN105320588A (en) | 2015-05-12 | 2015-05-12 | Delay alarm circuit and method used for relay protective apparatus |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114665791A (en) * | 2022-03-11 | 2022-06-24 | 成都飞机工业（集团）有限责任公司 | Direct current motor forward and reverse rotation delay protection circuit |
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| CN201025506Y (en) * | 2007-02-28 | 2008-02-20 | 西安交通大学 | A secure protection circuit based on single stabilized circuit and programmable logic part |
| CN101707351A (en) * | 2009-09-18 | 2010-05-12 | 珠海瑞捷电气有限公司 | Protection circuit for preventing microcomputer protection device against interference and error actions |
| CN102064613A (en) * | 2011-01-13 | 2011-05-18 | 许继电气股份有限公司 | Fault locking method for relay protection in digital substation |
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2015
- 2015-05-12 CN CN201510240812.8A patent/CN105320588A/en active Pending
Patent Citations (4)
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|---|---|---|---|---|
| CN1635386A (en) * | 2003-12-30 | 2005-07-06 | 许继电气股份有限公司 | Relay protection fault detection module |
| CN201025506Y (en) * | 2007-02-28 | 2008-02-20 | 西安交通大学 | A secure protection circuit based on single stabilized circuit and programmable logic part |
| CN101707351A (en) * | 2009-09-18 | 2010-05-12 | 珠海瑞捷电气有限公司 | Protection circuit for preventing microcomputer protection device against interference and error actions |
| CN102064613A (en) * | 2011-01-13 | 2011-05-18 | 许继电气股份有限公司 | Fault locking method for relay protection in digital substation |
Non-Patent Citations (1)
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Cited By (1)
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|---|---|---|---|---|
| CN114665791A (en) * | 2022-03-11 | 2022-06-24 | 成都飞机工业（集团）有限责任公司 | Direct current motor forward and reverse rotation delay protection circuit |
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Application publication date: 20160210 |
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