CN105306096B - A kind of more star spread-spectrum signal analysis decipherers of adaptivity - Google Patents

A kind of more star spread-spectrum signal analysis decipherers of adaptivity Download PDF

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CN105306096B
CN105306096B CN201510595756.XA CN201510595756A CN105306096B CN 105306096 B CN105306096 B CN 105306096B CN 201510595756 A CN201510595756 A CN 201510595756A CN 105306096 B CN105306096 B CN 105306096B
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module
signal
frequency
zero
despreading
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CN105306096A (en
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张研
左超
肖力田
冯敬杰
曾洁
李玉良
褚晨龙
朱沿旭
郭翔宇
高星明
王海英
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Institute For Engineering Design And Research Pla General Armament Department
Beijing Information Is Controlled Research Institute
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Institute For Engineering Design And Research Pla General Armament Department
Beijing Information Is Controlled Research Institute
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7073—Synchronisation aspects
    • H04B1/7075—Synchronisation aspects with code phase acquisition
    • H04B1/7077—Multi-step acquisition, e.g. multi-dwell, coarse-fine or validation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7073—Synchronisation aspects
    • H04B1/7075—Synchronisation aspects with code phase acquisition
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2668—Details of algorithms
    • H04L27/2669—Details of algorithms characterised by the domain of operation

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

The invention discloses a kind of more star spread-spectrum signal analysis decipherers of adaptivity to include：Frequency reference unit, down-converter unit, the first power divider, multiple signal analysis and processing devices；Signal analysis and processing device includes analog front-end module and kernel module again；Frequency reference unit provides the time and frequency standards for each unit, and the time and frequency standards provided is sent to Centralized Monitoring server；Multichannel local output signal is down-converted to 70MHz intermediate-freuqncy signals, and power output distributor and Centralized Monitoring server by down-converter unit；Intermediate-freuqncy signal is averagely allocated to multiple analog front-end modules by the first power divider；The signal that analog front-end module sends power divider, IQ quadrature frequency conversions are carried out, export IQ orthogonal digital zero intermediate frequency signals；Kernel module after carrying out despreading demodulation processing and IO phase ambiguities removal processing, and outputs it IO ends to IQ orthogonal digital zero intermediate frequency signals.

Description

A kind of more star spread-spectrum signal analysis decipherers of adaptivity
Technical field
The invention belongs to launching site ground launch vehicle measurement technical field, is related to a kind of adaptivity more star spread-spectrum signals point Analyse decipherer.
Background technology
At present, China's space launch mission enters the high density transmitting phase, in order to improve delivery utilization rate, several satellite in a rocket transmitting Pattern has turned into the major way of Future Satellite transmitting.Satellite test is as a most important ring before transmitting, RF test signal Transfer quality must be guaranteed.Meanwhile to save satellite frequency resource, Multi-satellite TTC is used with frequency CDMA multiplexing skill Art is realized.During test, more satellites are arranged in the same small space of launching tower, while after start, in this small space Electromagnetic environment occur acute variation, substantial amounts of co-channel interference and multi-path jamming can be produced.More satellite-signals can not pass through antenna Space diversity realizes that useful signal is isolated, and causes multi signal aliasing, easily produces strong signal and weak signal is suppressed, cause satellite to be surveyed Control signal can not demodulate, or lock-out state is extremely unstable, and the locking and demodulation to radio frequency forward signal all bring very big difficulty.Mesh Simply using with frequency retransmission technique, the technology does not possess solution and extends to signal interpretation function preceding conventional technology, can only substantially meet The requirement of single star test forwarding, the no effective measures of forwarding to more star test signals.
The content of the invention
The purpose that the technology of the present invention solves problem is：In view of the shortcomings of the prior art, there is provided a kind of adaptivity More star spread-spectrum signals analysis decipherers, realize and multichannel is de-spread with the steady lock of frequency spread-spectrum signal and correctly, demodulated, is divided Analysis, ensures being accurately forwarded for more star test signals, signal without error code, without losing lock, the more satellites of real-time accuracy controlling can be met simultaneously Required with the Distance Test forwarding between frequency and respective ground testing system.
The present invention technical solution be：
A kind of more star spread-spectrum signal analysis decipherers of adaptivity include：Frequency reference unit, down-converter unit, the first work( Rate distributor, multiple signal analysis and processing devices；Signal analysis and processing device includes analog front-end module and kernel module again；
Frequency reference unit, time reference and frequency reference are sent to down-converter unit, while send it to work(point Orchestration, and the time and frequency standards provided is sent to Centralized Monitoring server；
Down-converter unit, the multichannel local output signal from Frontend preprocessor that will be received, down-converts to 70MHz Intermediate-freuqncy signal, and intermediate-freuqncy signal is output to power divider and Centralized Monitoring server；
First power divider, the intermediate-freuqncy signal after down-converter unit frequency conversion is averagely allocated to multiple AFE(analog front end)s Module and the time reference for providing frequency reference unit and frequency reference are averagely allocated to multiple analog front-end modules；
Analog front-end module, the signal that the power divider received is sent, IQ quadrature frequency conversions are carried out, output IQ is just Intersection number word zero intermediate frequency signals are to kernel module；
Kernel module, to receiving IQ orthogonal digital zero intermediate frequency signals, carry out despreading demodulation processing and IO phase ambiguities After spending removal processing, and by the signal output IO ends after processing and it is output to Centralized Monitoring server.
Analog front-end module includes RF switch, low-noise amplifier LNA, bandpass filter, IQ quadrature frequency conversions, frequency Synthesizer, IQ two-way VGA and binary channels ADC；
RF switch sends the intermediate-freuqncy signal that the first power divider is sent to low noise amplification in when passing through state Device LNA；
The signal that low-noise amplifier LNA exports to the second power divider carries out low noise amplification, and is sent to band Bandpass filter；
Bandpass filter is sent into IQ quadrature frequency conversions after the signal received is filtered；
The local oscillation signal that frequency synthesizer inputs is divided into orthogonal same frequency two-way carrier wave by IQ quadrature frequency conversions, and utilizes The signal that the two-way carrier wave exports to bandpass filter is demodulated processing, exports IQ baseband signals；
After the IQ baseband signals progress low pass filtered that IQ two-way VGA exports to IQ quadrature frequency conversions involves amplification, it is input to double Passage ADC；
Binary channels ADC samples to the IQ baseband signals of input, output IQ orthogonal digitals zero intermediate frequency signals to letter Cease processor cores module；
Frequency synthesizer exports local oscillation signal to IQ quadrature frequency conversions.
When kernel module includes coherently despreading module, Zero-IF demodulator module, Phase Processing and decoder module, analog-to-digital conversion Clock management module and cache interface module；
Analog-to-digital conversion Clock management module, it is coherently despreading module, Zero-IF demodulator module with time reference signal, protects Demonstrate,prove the time synchronized in signal processing；
Coherently despreading module, receives the IQ orthogonal digital zero intermediate frequency signals of binary channels ADC output, and it is solved The IQ two paths of signals expanded after output despreading is filtered to IQ orthogonal digital zero intermediate frequency signals and adopted to Zero-IF demodulator module Sampled data is exported after sample and carries out Fourier transformation to cache interface module and to the signal after despreading, output spectrum data arrive Cache interface module；
Zero-IF demodulator module, the IQ two paths of signals after despreading is demodulated and carried out the carrier frequency of IQ two paths of signals Rate Phase Tracking, I/Q data is isolated, and the clock recovery provided according to analog-to-digital conversion Clock management module goes out IQ clock datas, Phase Processing and decoder module are output to, while Zero-IF demodulator module sends demodulated signal to cache interface module；
Phase Processing and decoder module, phase ambiguity removal is carried out to the IQ clock datas of Zero-IF demodulator module output After processing, carry out decoding output data and sent to I/O port, while by decoded data to cache interface module；
Cache interface module, the sampled data and frequency spectrum data, zero intermediate frequency solution that the coherently despreading module received is sent The decoding data that the demodulated signal and Phase Processing that mode transfer block is sent are sent with decoder module, sends to external buffers；
Coherently despreading module includes correlator, wave filter A, wave filter B, spectrum-spreading code generator, despreading measurement and control mould Block, band internal power detector A and FFT1024 module；
Correlator, the code phase control word for receiving despreading measurement and control module transmission carry out IQ orthogonal digitals zero intermediate frequency letter Number acquisition and tracking, ADC is exported using the Gold codes sequence of spectrum-spreading code generator output when complete acquisition and tracking after IQ orthogonal digital zero intermediate frequency signals are de-spread, and are output to wave filter A；
Wave filter A, three tunnels are divided into after the signal received is filtered：The first via is connected in zero as the output of module Frequency demodulation module, the second tunnel are output to band internal power detector A, and the 3rd tunnel is output to FFT1024 modules；
Band internal power detector A, power detection is carried out to filtered signal, and testing result is fed back into despreading measurement And control module；
Despreading measurement and control module, receive the power signal with internal power detector A and Zero-IF demodulator module feedback, When the power signal with internal power detector A and Zero-IF demodulator module feedback is more than or equal to certain threshold value, despreading measurement and Control module send code phase control word arrive correlator, notice correlator IQ orthogonal digital zero intermediate frequency signals acquisition and tracking into Work(, when the power signal with internal power detector A and Zero-IF demodulator module feedback is less than certain threshold value, despreading measurement and control Molding block send code phase control word arrive correlator, for correlator to IQ orthogonal digital zero intermediate frequency signals continue capture with Track；
The time reference signal that spectrum-spreading code generator provides according to analog-to-digital conversion Clock management module produces Gold code sequences, And the despreading that Gold codes sequence inputting to correlator is used for data signal is handled；
Wave filter B, after the IQ orthogonal digital zero intermediate frequency signals that binary channels ADC exports are filtered into sampling, go forward side by side Sampled data is exported after row IQ two paths of signals alternatives to cache interface module；
FFT1024 modules, Fourier transformation, output spectrum data to caching are carried out to the despread signal of wave filter A outputs Interface module.
Zero-IF demodulator module includes Zero-IF demodulator device, carrier phase tracking device, carrier frequency acquisition tracker, load Ripple NCO, clock and data recovery and with internal power detector B；
Zero-IF demodulator device, carrier phase tracking device, carrier frequency acquisition tracker and carrier wave NCO, mould is de-spread to phase IQ two paths of signals after the despreading of block output, is demodulated and carrier frequency-phase tracks so that Zero-IF demodulator device is final I/Q data is exported, Zero-IF demodulator device exports four tunnel I/Q datas, is input to carrier phase tracking device all the way and completes demodulation and carrier wave Frequency plot tracks, and is input to clock and data recovery module all the way, all the way input tape internal power detector B, passes through MUX bis- all the way Cache interface module is output to after selecting one；
Clock and data recovery module, IQ clock datas are gone out according to the clock recovery that analog-to-digital conversion Clock management module provides, It is output to Phase Processing and decoder module.
Band internal power detector B, power detection is carried out to the signal of Zero-IF demodulator device output, and testing result is fed back To the despreading measurement in coherently despreading module and control module.
Phase Processing includes phase ambiguity with decoder module and removes module, inner demoder, outer decoder；
Phase ambiguity removes module and carries out phase ambiguity removal processing to the I/Q data received, eliminates I, Q two-way Signal interferes, and is output to inner demoder；
Inner demoder and outer decoder are decoded with after outer decoding in being carried out to the signal received, and signal is connected into I/O port On, while outer decoder sends output signal to cache interface module.
The present invention has the following advantages that compared with prior art：
(1) present invention carries out signal transacting using multiple signal analysis and processing devices, realizes the parallel place of more satellite-signals Reason, while can realize that useful signal is isolated, the compacting of multi signal aliasing and strong signal to weak signal is avoided, satellite is completed and surveys Control signal ground accurately to demodulate, of the invention realize de-spreads multichannel with the steady lock of frequency spread-spectrum signal and correctly, demodulated, dividing Analysis, ensures being accurately forwarded for more star test signals, signal without error code, without losing lock, the more satellites of real-time accuracy controlling can be met simultaneously With the Distance Test between frequency and respective ground testing system.
(2) coherently despreading module of the invention uses the design method of more negative feedback loops, can realize output signal Quick and accurate locking and the quick identification of signal, final Shi Ge roads spread-spectrum signal can steady lock, correct despread-and-demodulation.
(3) framework of more star spread-spectrum signal analysis determining devices of the present invention, can greatly improve signal transacting speed Degree, for prior art, processing speed improves 20%, while overall architecture of the present invention is easily achieved, and versatility is big Big enhancing, has stronger practical value.
Brief description of the drawings
Fig. 1 present system configuration diagrams；
Fig. 2 signal analysis and processing device AFE(analog front end) high-level schematic functional block diagrams of the present invention；
Fig. 3 signal analysis and processing device core functions module diagrams of the present invention；
Fig. 4 coherently despreading functions of modules of the present invention realizes block diagram；
Fig. 5 Zero-IF demodulator functions of modules of the present invention realizes block diagram；
Fig. 6 Phase Processings of the present invention realize block diagram with decoder module function.
Embodiment
The specific embodiment of the invention is described further below in conjunction with the accompanying drawings.
As shown in figure 1, a kind of more star spread-spectrum signal analysis decipherers of adaptivity of the present invention include：Frequency reference unit, Down-converter unit, the first power divider, multiple signal analysis and processing devices；Signal analysis and processing device includes analog front-end module again And kernel module；
Frequency reference unit, time reference and frequency reference are sent to down-converter unit, while send it to work(point Orchestration, and the time and frequency standards provided is sent to Centralized Monitoring server, can be with using high-precision frequency reference module Prevent the locking of multiple signals from failing；
Down-converter unit, the multichannel local output signal from Frontend preprocessor that will be received, down-converts to 70MHz Intermediate-freuqncy signal, and intermediate-freuqncy signal is output to power divider and Centralized Monitoring server；Low-converter is 70MHz intermediate-freuqncy signals Low-converter, main signal of completing is to the down-converted of 70MHz intermediate frequencies.It is the more star spread-spectrum signal analysis decipherers of self study The down coversion part of radio-frequency channel.
First power divider, the intermediate-freuqncy signal after down-converter unit frequency conversion is averagely allocated to multiple AFE(analog front end)s Module and the time reference for providing frequency reference unit and frequency reference are averagely allocated to multiple analog front-end modules；
Analog front-end module, the signal that the power divider received is sent, IQ quadrature frequency conversions are carried out, output IQ is just Intersection number word zero intermediate frequency signals are to kernel module；
Kernel module, to receiving IQ orthogonal digital zero intermediate frequency signals, carry out despreading demodulation processing and IO phase ambiguities After spending removal processing, and by the signal output IO ends after processing and it is output to Centralized Monitoring server.
As shown in Fig. 2 analog front-end module is orthogonal including RF switch, low-noise amplifier LNA, bandpass filter, IQ Down coversion, frequency synthesizer, IQ two-way VGA and binary channels ADC；
RF switch sends the intermediate-freuqncy signal that the first power divider is sent to low noise amplification in when passing through state Device LNA；
The signal that low-noise amplifier LNA exports to the second power divider carries out low noise amplification, and is sent to band Bandpass filter；
Bandpass filter is sent into IQ quadrature frequency conversions after the signal received is filtered；
The local oscillation signal that frequency synthesizer inputs is divided into orthogonal same frequency two-way carrier wave by IQ quadrature frequency conversions, and utilizes The signal that the two-way carrier wave exports to bandpass filter is demodulated processing, exports IQ baseband signals；
After the IQ baseband signals progress low pass filtered that IQ two-way VGA exports to IQ quadrature frequency conversions involves amplification, it is input to double Passage ADC；
Binary channels ADC samples to the IQ baseband signals of input, output IQ orthogonal digitals zero intermediate frequency signals to letter Cease processor cores module；
Frequency synthesizer exports local oscillation signal to IQ quadrature frequency conversions.
As shown in figure 3, kernel module include coherently despreading module, Zero-IF demodulator module, Phase Processing and decoder module, Analog-to-digital conversion Clock management module and cache interface module；
Analog-to-digital conversion Clock management module, it is coherently despreading module, Zero-IF demodulator module with time reference signal, protects Demonstrate,prove the time synchronized in signal processing；
Coherently despreading module, receives the IQ orthogonal digital zero intermediate frequency signals of binary channels ADC output, and it is solved The IQ two paths of signals expanded after output despreading is filtered to IQ orthogonal digital zero intermediate frequency signals and adopted to Zero-IF demodulator module Sampled data is exported after sample and carries out Fourier transformation to cache interface module and to the signal after despreading, output spectrum data arrive Cache interface module；
Zero-IF demodulator module, the IQ two paths of signals after despreading is demodulated and carried out the carrier frequency of IQ two paths of signals Rate Phase Tracking, I/Q data is isolated, and the clock recovery provided according to analog-to-digital conversion Clock management module goes out IQ clock datas, Phase Processing and decoder module are output to, while Zero-IF demodulator module sends demodulated signal to cache interface module；
Phase Processing and decoder module, phase ambiguity removal is carried out to the IQ clock datas of Zero-IF demodulator module output After processing, carry out decoding output data and sent to I/O port, while by decoded data to cache interface module；
Cache interface module, the sampled data and frequency spectrum data, zero intermediate frequency solution that the coherently despreading module received is sent The decoding data that the demodulated signal and Phase Processing that mode transfer block is sent are sent with decoder module, sends to external buffers；
Sampled data.ADC output the orthogonal intermediate-freuqncy signals of IQ it is filtered after be connected to cache interface；
Frequency spectrum data.Enter after signal despreading after FFT1024 modules completion Fourier transformation and data are connected to cache interface；
Eye diagram data.Data after Zero-IF demodulator are connected to cache interface；
Three above signal is that I, Q two paths of signals export after MUX selectors and is connected to cache interface.
Decoding data.Data are connected to cache interface after inner decoding, outer-decoder；
As shown in figure 4, coherently despreading module includes correlator, wave filter A, wave filter B, spectrum-spreading code generator, despreading survey Amount and control module, band internal power detector A and FFT1024 module；
Correlator, the code phase control word for receiving despreading measurement and control module transmission carry out IQ orthogonal digitals zero intermediate frequency letter Number acquisition and tracking, ADC is exported using the Gold codes sequence of spectrum-spreading code generator output when complete acquisition and tracking after IQ orthogonal digital zero intermediate frequency signals are de-spread, and are output to wave filter A；
Wave filter A, three tunnels are divided into after the signal received is filtered：The first via is connected in zero as the output of module Frequency demodulation module, the second tunnel are output to band internal power detector A, and the 3rd tunnel is output to FFT1024 modules；
Band internal power detector A, power detection is carried out to filtered signal, and testing result is fed back into despreading measurement And control module；
Despreading measurement and control module, receive the power signal with internal power detector A and Zero-IF demodulator module feedback, When the power signal with internal power detector A and Zero-IF demodulator module feedback is more than or equal to certain threshold value, despreading measurement and Control module send code phase control word arrive correlator, notice correlator IQ orthogonal digital zero intermediate frequency signals acquisition and tracking into Work(, when the power signal with internal power detector A and Zero-IF demodulator module feedback is less than certain threshold value, despreading measurement and control Molding block send code phase control word arrive correlator, for correlator to IQ orthogonal digital zero intermediate frequency signals continue capture with Track；
The time reference signal that spectrum-spreading code generator provides according to analog-to-digital conversion Clock management module produces Gold code sequences, And the despreading that Gold codes sequence inputting to correlator is used for data signal is handled；
Wave filter B, after the IQ orthogonal digital zero intermediate frequency signals that binary channels ADC exports are filtered into sampling, go forward side by side Sampled data is exported after row IQ two paths of signals alternatives, and to cache interface module, (MUX is alternative data selector, only defeated here Go out I roads or Q roads)；
FFT1024 modules, Fourier transformation, output spectrum data to caching are carried out to the despread signal of wave filter A outputs Interface module.
Caught as shown in figure 5, Zero-IF demodulator module includes Zero-IF demodulator device, carrier phase tracking device, carrier frequency Obtain tracker, carrier wave NCO, clock and data recovery and with internal power detector B.The major function of this module is by zero intermediate frequency solution Adjust device to complete the demodulation of signal, and the carrier frequency-phase tracking of signal is carried out by carrier tracking loop, isolate I/Q data, it is extensive Multiple clock data signal exports as module, is connected to Phase Processing and decoder module, and input zero intermediate frequency signals still exist residual Over-carriage ripple, default are -50KHz to+50KHz, it is necessary to be controlled by carrier tracking loop；
Zero-IF demodulator device, carrier phase tracking device, carrier frequency acquisition tracker and carrier wave NCO, mould is de-spread to phase IQ two paths of signals after the despreading of block output, is demodulated and carrier frequency-phase tracks so that Zero-IF demodulator device is final I/Q data is exported, Zero-IF demodulator device exports four tunnel I/Q datas, is input to carrier phase tracking device all the way and completes demodulation and carrier wave Frequency plot tracks, and is input to clock and data recovery module all the way, all the way input tape internal power detector B, passes through MUX bis- all the way Cache interface module is output to after selecting one；
Carrier phase tracking device completes carrier phase tracking function；Carrier frequency acquisition tracker is in Zero-IF demodulator device work The starting stage of work, carrier wave NCO will be drawn near residual carrier frequency by cross product automatic frequency discrimination loop (CPAFT), now NCO digital voltage-controlled data will be provided by CPAFT；Carrier wave NCO modules, output sequence rate synchronization is in sampling clock, to produce Raw and sampling gained digital medium-frequency signal bit rate identical local carrier signal, realizes down coversion DDC functions；
Clock and data recovery module, IQ clock datas are gone out according to the clock recovery that analog-to-digital conversion Clock management module provides, It is output to Phase Processing and decoder module (using GARDNER algorithms).
Band internal power detector B, power detection is carried out to the signal of Zero-IF demodulator device output, and testing result is fed back To the despreading measurement in coherently despreading module and control module.
As shown in fig. 6, Phase Processing includes phase ambiguity with decoder module removes module, inner demoder, outer decoding Device；
Phase ambiguity removes module and carries out phase ambiguity removal processing to the I/Q data received, eliminates I, Q two-way Signal interferes, and is output to inner demoder；
Inner demoder and outer decoder are decoded with after outer decoding in being carried out to the signal received, and signal is connected into I/O port On, while outer decoder sends output signal to cache interface module.
Unspecified part of the present invention belongs to general knowledge as well known to those skilled in the art.

Claims (5)

  1. A kind of 1. more star spread-spectrum signal analysis decipherers of adaptivity, it is characterised in that including：Frequency reference unit, down coversion list Member, the first power divider, multiple signal analysis and processing devices；Signal analysis and processing device includes analog front-end module and kernel mould again Block；
    Frequency reference unit, time reference and frequency reference are sent to down-converter unit, while send it to power distribution Device, and the time and frequency standards provided is sent to Centralized Monitoring server；
    Down-converter unit, the multichannel local output signal from Frontend preprocessor that will be received, down-converts to 70MHz intermediate frequencies Signal, and intermediate-freuqncy signal is output to power divider and Centralized Monitoring server；
    First power divider, the intermediate-freuqncy signal after down-converter unit frequency conversion is averagely allocated to multiple analog front-end modules And the time reference and frequency reference for providing frequency reference unit are averagely allocated to multiple analog front-end modules；
    Analog front-end module, the signal that the power divider received is sent, IQ quadrature frequency conversions are carried out, export IQ orthogonal functions Word zero intermediate frequency signals are to kernel module；
    Kernel module, to receiving IQ orthogonal digital zero intermediate frequency signals, carry out despreading demodulation processing and IO phase ambiguities are gone After processing, and by the signal output after processing to I/O port and it is output to Centralized Monitoring server；
    When the kernel module includes coherently despreading module, Zero-IF demodulator module, Phase Processing and decoder module, analog-to-digital conversion Clock management module and cache interface module；
    Analog-to-digital conversion Clock management module, it is coherently despreading module, Zero-IF demodulator module with time reference signal, ensures letter Time synchronized in number processing procedure；
    Coherently despreading module, receives the IQ orthogonal digital zero intermediate frequency signals of binary channels ADC output, and it is carried out de-spread defeated The IQ two paths of signals gone out after despreading is to Zero-IF demodulator module, while after being filtered sampling to IQ orthogonal digital zero intermediate frequency signals Export sampled data and Fourier transformation, output spectrum data to caching are carried out to cache interface module and to the signal after despreading Interface module；
    Zero-IF demodulator module, the IQ two paths of signals after despreading is demodulated and carried out the carrier frequency phase of IQ two paths of signals Position tracking, I/Q data is isolated, and the clock recovery provided according to analog-to-digital conversion Clock management module goes out IQ clock datas, exports To Phase Processing and decoder module, while Zero-IF demodulator module sends demodulated signal to cache interface module；
    Phase Processing and decoder module, phase ambiguity removal processing is carried out to the IQ clock datas of Zero-IF demodulator module output Afterwards, decoding output data is carried out to send to cache interface module to I/O port, while by decoded data；
    Cache interface module, the sampled data that the coherently despreading module received is sent and frequency spectrum data, Zero-IF demodulator mould The decoding data that the demodulated signal and Phase Processing that block is sent are sent with decoder module, sends to external buffers.
  2. A kind of 2. more star spread-spectrum signal analysis decipherers of adaptivity according to claim 1, it is characterised in that：The mould Intending front-end module includes RF switch, low-noise amplifier LNA, bandpass filter, IQ quadrature frequency conversions, frequency synthesizer, IQ Two-way VGA and binary channels ADC；
    RF switch sends the intermediate-freuqncy signal that the first power divider is sent to low-noise amplifier in when passing through state LNA；
    The signal that low-noise amplifier LNA exports to the first power divider carries out low noise amplification, and is sent to band logical filter Ripple device；
    Bandpass filter is sent into IQ quadrature frequency conversions after the signal received is filtered；
    The local oscillation signal that frequency synthesizer inputs is divided into orthogonal same frequency two-way carrier wave by IQ quadrature frequency conversions, and using this two The signal that road-load ripple exports to bandpass filter is demodulated processing, exports IQ baseband signals；
    After the IQ baseband signals progress low pass filtered that IQ two-way VGA exports to IQ quadrature frequency conversions involves amplification, binary channels is input to ADC；
    Binary channels ADC samples to the IQ baseband signals of input, and output IQ orthogonal digital zero intermediate frequency signals are at information Manage device kernel module；
    Frequency synthesizer exports local oscillation signal to IQ quadrature frequency conversions.
  3. A kind of 3. more star spread-spectrum signal analysis decipherers of adaptivity according to claim 1, it is characterised in that：The phase Closing despreading module includes correlator, wave filter A, wave filter B, spectrum-spreading code generator, despreading measurement and control module, band internal power Detector A and FFT1024 module；
    Correlator, the code phase control word for receiving despreading measurement and control module transmission carry out IQ orthogonal digital zero intermediate frequency signals Acquisition and tracking, the IQ that the Gold codes sequence exported after acquisition and tracking is completed using spectrum-spreading code generator is exported ADC is just Intersection number word zero intermediate frequency signals are de-spread, and are output to wave filter A；
    Wave filter A, three tunnels are divided into after the signal received is filtered：The first via is connected to zero intermediate frequency solution as the output of module Mode transfer block, the second tunnel are output to band internal power detector A, and the 3rd tunnel is output to FFT1024 modules；
    Band internal power detector A, power detection is carried out to filtered signal, and testing result is fed back into despreading measurement and control Molding block；
    Despreading measurement and control module, receive the power signal with internal power detector A and Zero-IF demodulator module feedback, work as band When the power signal of internal power detector A and Zero-IF demodulator module feedback is more than or equal to certain threshold value, despreading measurement and control Module sends code phase control word and succeeded to correlator, the acquisition and tracking of notice correlator IQ orthogonal digital zero intermediate frequency signals, when When power signal with internal power detector A and Zero-IF demodulator module feedback is less than certain threshold value, despreading measurement and control mould Block sends code phase control word to correlator, the continuation acquisition and tracking for correlator to IQ orthogonal digital zero intermediate frequency signals；
    The time reference signal that spectrum-spreading code generator provides according to analog-to-digital conversion Clock management module produces Gold code sequences, and will The despreading that Gold codes sequence inputting is used for data signal to correlator is handled；
    Wave filter B, after the IQ orthogonal digital zero intermediate frequency signals that binary channels ADC exports are filtered into sampling, and carry out IQ Sampled data is exported after two paths of signals alternative to cache interface module；
    FFT1024 modules, Fourier transformation, output spectrum data to cache interface are carried out to the despread signal of wave filter A outputs Module.
  4. A kind of 4. more star spread-spectrum signal analysis decipherers of adaptivity according to claim 1, it is characterised in that：Described zero Intermediate frequency demodulation module includes Zero-IF demodulator device, carrier phase tracking device, carrier frequency acquisition tracker, carrier wave NCO, clock Data recovery and with internal power detector B；
    Zero-IF demodulator device, carrier phase tracking device, carrier frequency acquisition tracker and carrier wave NCO, it is defeated that module is de-spread to phase IQ two paths of signals after the despreading gone out, is demodulated and carrier frequency-phase tracks so that Zero-IF demodulator device final output I/Q data, Zero-IF demodulator device export four tunnel I/Q datas, are input to carrier phase tracking device all the way and complete demodulation and carrier frequency Phase Tracking, clock and data recovery module is input to all the way, all the way input tape internal power detector B, pass through MUX alternatives all the way It is output to cache interface module later；
    Clock and data recovery module, IQ clock datas are gone out according to the clock recovery that analog-to-digital conversion Clock management module provides, exported To Phase Processing and decoder module；
    Band internal power detector B, power detection is carried out to the signal of Zero-IF demodulator device output, and testing result is fed back into phase Close the despreading measurement in despreading module and control module.
  5. A kind of 5. more star spread-spectrum signal analysis decipherers of adaptivity according to claim 4, it is characterised in that：The phase Position processing includes phase ambiguity with decoder module and removes module, inner demoder, outer decoder；
    Phase ambiguity removes module and carries out phase ambiguity removal processing to the I/Q data received, eliminates I, Q two paths of signals Interfere, and be output to inner demoder；
    Inner demoder and outer decoder are decoded with after outer decoding in being carried out to the signal received, and signal is connected on I/O port, Outer decoder sends output signal to cache interface module simultaneously.
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