CN105306096A - Adaptive multi-satellite spread spectrum signal analysis and interpretation device - Google Patents
Adaptive multi-satellite spread spectrum signal analysis and interpretation device Download PDFInfo
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- CN105306096A CN105306096A CN201510595756.XA CN201510595756A CN105306096A CN 105306096 A CN105306096 A CN 105306096A CN 201510595756 A CN201510595756 A CN 201510595756A CN 105306096 A CN105306096 A CN 105306096A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7073—Synchronisation aspects
- H04B1/7075—Synchronisation aspects with code phase acquisition
- H04B1/7077—Multi-step acquisition, e.g. multi-dwell, coarse-fine or validation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7073—Synchronisation aspects
- H04B1/7075—Synchronisation aspects with code phase acquisition
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2668—Details of algorithms
- H04L27/2669—Details of algorithms characterised by the domain of operation
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Abstract
The invention discloses an adaptive multi-satellite spread spectrum signal analysis and interpretation device. The adaptive multi-satellite spread spectrum signal analysis and interpretation device comprises a frequency reference unit, a down-conversion unit, a first power divider and a plurality of signal analysis processors, wherein the signal analysis processors comprise analog front-end modules and kernel modules; the frequency reference unit is used for providing time and frequency references for each unit, and transmitting the provided time and frequency references to a centralized monitoring server; the down-conversion unit is used for performing down conversion on a plurality of paths of local output signals to obtain 70MHz intermediate-frequency signals, and transmitting the 70MHz intermediate-frequency signals to the power divider and the centralized monitoring server; the first power divider is used for equally distributing the intermediate-frequency signals to the plurality of analog front-end modules; the analog front-end modules are used for performing IQ orthogonal down conversion on the signals transmitted by the power divider, and outputting IQ orthogonal digital zero intermediate-frequency signals; and the kernel modules are used for performing dispreading and demodulating processing and IO phase de-blurring processing on the IQ orthogonal digital zero intermediate-frequency signals, and outputting the processed signals to an IO end.
Description
Technical field
The invention belongs to ground, launching site launch vehicle measurement technical field, relate to a kind of adaptivity many stars spread-spectrum signal and analyze decipherer.
Background technology
At present, China's space launch mission enters high density and launches the phase, and in order to improve delivery utilance, several satellite in a rocket emission mode has become the major way that Future Satellite is launched.Satellite test is as a most important ring before transmitting, and the transfer quality of RF test signal must be guaranteed.Meanwhile, for saving satellite frequency resource, Multi-satellite TTC adopts and realizes with frequency CDMA multiplexing technology.During test, many satellites are arranged in the same small space of launching tower, and simultaneously after start, the electromagnetic environment generation acute variation in this small space, can produce a large amount of co-channel interferences and multi-path jamming.Many satellite-signals cannot realize useful signal isolation by antenna space diversity, cause multi signal aliasing, very easily produce strong signal and weak signal is suppressed, cause TT & C Signals of Satellite cannot demodulation, or lock-out state extremely unstable, all bring very large difficulty to the locking of radio frequency forward signal and demodulation.Technology conventional at present just adopts same retransmission technique frequently, and this technology does not possess solution and extends to signal interpretation function, substantially can only meet the requirement that the test of single star forwards, not have effective measures to the forwarding of many stars test signal.
Summary of the invention
The object that technology of the present invention is dealt with problems is: for the deficiencies in the prior art, provide a kind of adaptivity many stars spread-spectrum signal and analyze decipherer, achieve multichannel with the steady lock of frequently spread-spectrum signal and correct despreading, demodulation, analysis, ensure the accurate forwarding of many stars test signal, signal, without error code, without losing lock, can meet the many satellites of real-time accuracy controlling and forward requirement with the Distance Test frequently and separately between ground testing system simultaneously.
Technical solution of the present invention is:
A kind of adaptivity many stars spread-spectrum signal is analyzed decipherer and is comprised: frequency reference unit, down-converter unit, the first power divider, multiple signal analysis and processing device; Signal analysis and processing device comprises again analog front-end module and kernel module;
Frequency reference unit, is sent to down-converter unit by time reference and frequency reference, sends it to distribution of work device simultaneously, and the time and frequency standards provided is sent to centralized monitor server;
Down-converter unit, by the multichannel local output signal from Frontend preprocessor received, down-converts to 70MHz intermediate-freuqncy signal, and intermediate-freuqncy signal is outputted to power divider and centralized monitor server;
First power divider, is averagely allocated to multiple analog front-end module by the intermediate-freuqncy signal after down-converter unit frequency conversion and the time reference that provided by frequency reference unit and frequency reference are averagely allocated to multiple analog front-end module;
Analog front-end module, by the signal that the power divider received sends, carries out IQ quadrature frequency conversion, exports IQ orthogonal digital zero intermediate frequency signals to kernel module;
Kernel module, to receiving IQ orthogonal digital zero intermediate frequency signals, after carrying out despreading demodulation processing and IO phase ambiguity Transformatin, and exports IO end and outputs to centralized monitor server by the signal after process.
Analog front-end module comprises radio-frequency (RF) switch, low noise amplifier LNA, band pass filter, IQ quadrature frequency conversion, frequency synthesizer, IQ two-way VGA and double channel A/D C module;
When radio-frequency (RF) switch is in by state, the intermediate-freuqncy signal that the first power divider sends is sent to low noise amplifier LNA;
Low noise amplifier LNA carries out low noise amplification to the signal that the second power divider exports, and is sent into band pass filter;
Band pass filter sends into IQ quadrature frequency conversion after the signal received is carried out filtering;
The local oscillation signal that frequency synthesizer inputs is divided into orthogonal same frequency two-way carrier wave by IQ quadrature frequency conversion, and utilizes this two-way carrier wave to carry out demodulation process to the signal that band pass filter exports, and exports IQ baseband signal;
IQ two-way VGA carries out after low pass filtered involves amplification, being input to double channel A/D C to the IQ baseband signal that IQ quadrature frequency conversion exports;
The IQ baseband signal of double channel A/D C module to input is sampled, and exports IQ orthogonal digital zero intermediate frequency signals to message handler kernel module;
Frequency synthesizer exports local oscillation signal to IQ quadrature frequency conversion.
Kernel module comprises coherently despreading module, Zero-IF demodulator module, Phase Processing and decoder module, analog-to-digital conversion Clock management module and cache interface module;
Analog-to-digital conversion Clock management module is coherently despreading module, Zero-IF demodulator module with time reference signal, ensures the time synchronized in signal processing;
Coherently despreading module, receive the IQ orthogonal digital zero intermediate frequency signals that double channel A/D C module exports, and the IQ two paths of signals after despreading output despreading is carried out to Zero-IF demodulator module to it, export sampled data after carrying out filtering sampling to IQ orthogonal digital zero intermediate frequency signals simultaneously and carry out Fourier transform to cache interface module and to the signal after despreading, output spectrum data are to cache interface module;
Zero-IF demodulator module, demodulation is carried out to the IQ two paths of signals after despreading and carries out the carrier frequency-phase tracking of IQ two paths of signals, isolate I/Q data, and go out IQ clock data according to the clock recovery that analog-to-digital conversion Clock management module provides, output to Phase Processing and decoder module, restituted signal is sent to cache interface module by Zero-IF demodulator module simultaneously;
Phase Processing and decoder module, after carrying out phase ambiguity Transformatin, carry out decoding and export data to IO port, decoded data are sent to cache interface module simultaneously the IQ clock data of Zero-IF demodulator module output;
Cache interface module, the restituted signal that the sampled data send the coherently despreading module received and frequency spectrum data, Zero-IF demodulator module send and the decoded data that Phase Processing and decoder module send, be sent to external buffers;
Coherently despreading module comprises correlator, filter A, filter B, spectrum-spreading code generator, despreading measurement and control module, band internal power detector A and FFT1024 module;
Correlator, the code phase control word receiving despreading measurement and control module transmission carries out the acquisition and tracking of IQ orthogonal digital zero intermediate frequency signals, the IQ orthogonal digital zero intermediate frequency signals that ADC module exports by the Gold code sequence utilizing spectrum-spreading code generator to export after completing acquisition and tracking carries out despreading, and is outputted to filter A;
Filter A, carries out the signal received being divided into three tunnels after filtering: the first via links Zero-IF demodulator module as the output of module, and the second tunnel outputs to band internal power detector A, and the 3rd tunnel outputs to FFT1024 module;
Band internal power detector A, carries out power detection to filtered signal, and testing result is fed back to despreading measurement and control module;
Despreading measurement and control module, the power signal of receiving belt internal power detector A and Zero-IF demodulator module feedback, when being with the power signal of internal power detector A and Zero-IF demodulator module feedback to be more than or equal to certain threshold value, despreading measurement and control module send code phase control word to correlator, the acquisition and tracking success of notice correlator IQ orthogonal digital zero intermediate frequency signals, when being with the power signal of internal power detector A and Zero-IF demodulator module feedback to be less than certain threshold value, despreading measurement and control module send code phase control word to correlator, for the continuation acquisition and tracking of correlator to IQ orthogonal digital zero intermediate frequency signals,
Spectrum-spreading code generator produces Gold code sequence according to the time reference signal that analog-to-digital conversion Clock management module provides, and Gold code sequence inputting is used for the despreading process of digital signal to correlator;
Filter B, after the IQ orthogonal digital zero intermediate frequency signals that double channel A/D C module exports is carried out filtering sampling, and exports sampled data to cache interface module after carrying out IQ two paths of signals alternative;
FFT1024 module, carry out Fourier transform to the despread signal that filter A exports, output spectrum data are to cache interface module.
Zero-IF demodulator module includes Zero-IF demodulator device, carrier phase tracking device, carrier frequency acquisition tracker, carrier wave NCO, clock and data recovery and band internal power detector B;
Zero-IF demodulator device, carrier phase tracking device, carrier frequency acquisition tracker and carrier wave NCO, IQ two paths of signals after the despreading that phase place despreading module is exported, carry out demodulation and carrier frequency-phase tracking, Zero-IF demodulator device is made finally to export I/Q data, Zero-IF demodulator device exports four tunnel I/Q data, one tunnel is input to carrier phase tracking device and completes demodulation and carrier frequency-phase is followed the tracks of, one tunnel is input to clock and data recovery module, one road input tape internal power detector B, leads up to after MUX alternative and outputs to cache interface module;
Clock and data recovery module, goes out IQ clock data according to the clock recovery that analog-to-digital conversion Clock management module provides, outputs to Phase Processing and decoder module.
Band internal power detector B, carries out power detection to the signal that Zero-IF demodulator device exports, and despreading measurement testing result fed back in coherently despreading module and control module.
Phase Processing and decoder module include phase ambiguity and remove module, inner demoder, outer decoder;
Phase ambiguity is removed module and is carried out phase ambiguity Transformatin to the I/Q data received, and eliminates the mutual interference of I, Q two paths of signals, and outputs to inner demoder;
After inner demoder and outer decoder carry out interior decoding and outer decoding to the received signal, linked by signal on IO port, output signal is sent to cache interface module by outer decoder simultaneously.
The present invention compared with prior art tool has the following advantages:
(1) the present invention adopts multiple signal analysis and processing device to carry out signal transacting, achieve the parallel processing of many satellite-signals, useful signal isolation can be realized simultaneously, avoid multi signal aliasing and strong signal to the compacting of weak signal, complete the accurately demodulation of TT & C Signals of Satellite ground, present invention achieves the steady lock to the same spread-spectrum signal frequently of multichannel and correct despreading, demodulation, analyze, ensure the accurate forwarding of many stars test signal, signal is without error code, without losing lock, the many satellites of real-time accuracy controlling can be met simultaneously with the Distance Test frequently and separately between ground testing system.
(2) coherently despreading module of the present invention adopts the design of many negative feedback loops, can realize quick and accurately locking and signal the quick identification outputed signal, the equal Absorbable organic halogens locking of final Shi Ge road spread-spectrum signal, correct despread-and-demodulation.
(3) many stars spread-spectrum signal of the present invention analyzes the framework of determining device, greatly can improve conversion speed, relative to prior art, processing speed improves 20%, overall architecture of the present invention is easy to realize simultaneously, and versatility strengthens greatly, has stronger practical value.
Accompanying drawing explanation
Fig. 1 present system configuration diagram;
Fig. 2 signal analysis and processing device of the present invention AFE (analog front end) high-level schematic functional block diagram;
Fig. 3 signal analysis and processing device of the present invention core functions module diagram;
Fig. 4 coherently despreading functions of modules of the present invention realizes block diagram;
Fig. 5 Zero-IF demodulator functions of modules of the present invention realizes block diagram;
Fig. 6 Phase Processing of the present invention and decoder module functional realiey block diagram.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the invention is described further.
As shown in Figure 1, a kind of adaptivity many stars of the present invention spread-spectrum signal analysis decipherer comprises: frequency reference unit, down-converter unit, the first power divider, multiple signal analysis and processing device; Signal analysis and processing device comprises again analog front-end module and kernel module;
Frequency reference unit, time reference and frequency reference are sent to down-converter unit, send it to distribution of work device simultaneously, and the time and frequency standards provided is sent to centralized monitor server, use high accuracy frequency reference module can prevent the locking failure of multiple signals;
Down-converter unit, by the multichannel local output signal from Frontend preprocessor received, down-converts to 70MHz intermediate-freuqncy signal, and intermediate-freuqncy signal is outputted to power divider and centralized monitor server; Low-converter is 70MHz intermediate-freuqncy signal low-converter, and main settling signal is to the down-converted of 70MHz intermediate frequency.It is the down-conversion part that self study many stars spread-spectrum signal analyzes decipherer radio-frequency channel.
First power divider, is averagely allocated to multiple analog front-end module by the intermediate-freuqncy signal after down-converter unit frequency conversion and the time reference that provided by frequency reference unit and frequency reference are averagely allocated to multiple analog front-end module;
Analog front-end module, by the signal that the power divider received sends, carries out IQ quadrature frequency conversion, exports IQ orthogonal digital zero intermediate frequency signals to kernel module;
Kernel module, to receiving IQ orthogonal digital zero intermediate frequency signals, after carrying out despreading demodulation processing and IO phase ambiguity Transformatin, and exports IO end and outputs to centralized monitor server by the signal after process.
As shown in Figure 2, analog front-end module comprises radio-frequency (RF) switch, low noise amplifier LNA, band pass filter, IQ quadrature frequency conversion, frequency synthesizer, IQ two-way VGA and double channel A/D C module;
When radio-frequency (RF) switch is in by state, the intermediate-freuqncy signal that the first power divider sends is sent to low noise amplifier LNA;
Low noise amplifier LNA carries out low noise amplification to the signal that the second power divider exports, and is sent into band pass filter;
Band pass filter sends into IQ quadrature frequency conversion after the signal received is carried out filtering;
The local oscillation signal that frequency synthesizer inputs is divided into orthogonal same frequency two-way carrier wave by IQ quadrature frequency conversion, and utilizes this two-way carrier wave to carry out demodulation process to the signal that band pass filter exports, and exports IQ baseband signal;
IQ two-way VGA carries out after low pass filtered involves amplification, being input to double channel A/D C to the IQ baseband signal that IQ quadrature frequency conversion exports;
The IQ baseband signal of double channel A/D C module to input is sampled, and exports IQ orthogonal digital zero intermediate frequency signals to message handler kernel module;
Frequency synthesizer exports local oscillation signal to IQ quadrature frequency conversion.
As shown in Figure 3, kernel module comprises coherently despreading module, Zero-IF demodulator module, Phase Processing and decoder module, analog-to-digital conversion Clock management module and cache interface module;
Analog-to-digital conversion Clock management module is coherently despreading module, Zero-IF demodulator module with time reference signal, ensures the time synchronized in signal processing;
Coherently despreading module, receive the IQ orthogonal digital zero intermediate frequency signals that double channel A/D C module exports, and the IQ two paths of signals after despreading output despreading is carried out to Zero-IF demodulator module to it, export sampled data after carrying out filtering sampling to IQ orthogonal digital zero intermediate frequency signals simultaneously and carry out Fourier transform to cache interface module and to the signal after despreading, output spectrum data are to cache interface module;
Zero-IF demodulator module, demodulation is carried out to the IQ two paths of signals after despreading and carries out the carrier frequency-phase tracking of IQ two paths of signals, isolate I/Q data, and go out IQ clock data according to the clock recovery that analog-to-digital conversion Clock management module provides, output to Phase Processing and decoder module, restituted signal is sent to cache interface module by Zero-IF demodulator module simultaneously;
Phase Processing and decoder module, after carrying out phase ambiguity Transformatin, carry out decoding and export data to IO port, decoded data are sent to cache interface module simultaneously the IQ clock data of Zero-IF demodulator module output;
Cache interface module, the restituted signal that the sampled data send the coherently despreading module received and frequency spectrum data, Zero-IF demodulator module send and the decoded data that Phase Processing and decoder module send, be sent to external buffers;
Sampled data.The orthogonal intermediate-freuqncy signal of IQ that ADC module exports links cache interface after filtering;
Frequency spectrum data.Enter after signal despreading after FFT1024 module completes Fourier transform and data are linked cache interface;
Eye diagram data.Data after Zero-IF demodulator link cache interface;
Above three signals are I, Q two paths of signals and export after MUX selector and link cache interface.
Decoded data.Data link cache interface after inner decoding, outer-decoder;
As shown in Figure 4, coherently despreading module comprises correlator, filter A, filter B, spectrum-spreading code generator, despreading measurement and control module, band internal power detector A and FFT1024 module;
Correlator, the code phase control word receiving despreading measurement and control module transmission carries out the acquisition and tracking of IQ orthogonal digital zero intermediate frequency signals, the IQ orthogonal digital zero intermediate frequency signals that ADC module exports by the Gold code sequence utilizing spectrum-spreading code generator to export after completing acquisition and tracking carries out despreading, and is outputted to filter A;
Filter A, carries out the signal received being divided into three tunnels after filtering: the first via links Zero-IF demodulator module as the output of module, and the second tunnel outputs to band internal power detector A, and the 3rd tunnel outputs to FFT1024 module;
Band internal power detector A, carries out power detection to filtered signal, and testing result is fed back to despreading measurement and control module;
Despreading measurement and control module, the power signal of receiving belt internal power detector A and Zero-IF demodulator module feedback, when being with the power signal of internal power detector A and Zero-IF demodulator module feedback to be more than or equal to certain threshold value, despreading measurement and control module send code phase control word to correlator, the acquisition and tracking success of notice correlator IQ orthogonal digital zero intermediate frequency signals, when being with the power signal of internal power detector A and Zero-IF demodulator module feedback to be less than certain threshold value, despreading measurement and control module send code phase control word to correlator, for the continuation acquisition and tracking of correlator to IQ orthogonal digital zero intermediate frequency signals,
Spectrum-spreading code generator produces Gold code sequence according to the time reference signal that analog-to-digital conversion Clock management module provides, and Gold code sequence inputting is used for the despreading process of digital signal to correlator;
Filter B, after the IQ orthogonal digital zero intermediate frequency signals that double channel A/D C module exports is carried out filtering sampling, and export sampled data after carrying out IQ two paths of signals alternative to cache interface module (MUX is alternative data selector, only exports I road or Q road here);
FFT1024 module, carry out Fourier transform to the despread signal that filter A exports, output spectrum data are to cache interface module.
As shown in Figure 5, Zero-IF demodulator module includes Zero-IF demodulator device, carrier phase tracking device, carrier frequency acquisition tracker, carrier wave NCO, clock and data recovery and band internal power detector B.The major function of this module is the demodulation by Zero-IF demodulator device settling signal, and the carrier frequency-phase tracking of signal is carried out by carrier tracking loop, isolate I/Q data, the clock data signal recovered exports as module, receive Phase Processing and decoder module, still there is residual carrier in input zero intermediate frequency signals, default is-50KHz to+50KHz, needs to be controlled by carrier tracking loop;
Zero-IF demodulator device, carrier phase tracking device, carrier frequency acquisition tracker and carrier wave NCO, IQ two paths of signals after the despreading that phase place despreading module is exported, carry out demodulation and carrier frequency-phase tracking, Zero-IF demodulator device is made finally to export I/Q data, Zero-IF demodulator device exports four tunnel I/Q data, one tunnel is input to carrier phase tracking device and completes demodulation and carrier frequency-phase is followed the tracks of, one tunnel is input to clock and data recovery module, one road input tape internal power detector B, leads up to after MUX alternative and outputs to cache interface module;
Carrier phase tracking device completes carrier phase tracking function; Carrier frequency acquisition tracker is in the starting stage of Zero-IF demodulator device work, and will be drawn near residual carrier frequency by carrier wave NCO by the automatic frequency discrimination loop (CPAFT) of cross product, now the voltage-controlled data of the numeral of NCO will be provided by CPAFT; Carrier wave NCO module, output sequence speed is synchronized with sampling clock, in order to produce the local carrier signal identical with sampling gained digital medium-frequency signal bit rate, realizes down-conversion DDC function;
Clock and data recovery module, goes out IQ clock data according to the clock recovery that analog-to-digital conversion Clock management module provides, and outputs to Phase Processing and decoder module (using GARDNER algorithm).
Band internal power detector B, carries out power detection to the signal that Zero-IF demodulator device exports, and despreading measurement testing result fed back in coherently despreading module and control module.
As shown in Figure 6, Phase Processing and decoder module include phase ambiguity and remove module, inner demoder, outer decoder;
Phase ambiguity is removed module and is carried out phase ambiguity Transformatin to the I/Q data received, and eliminates the mutual interference of I, Q two paths of signals, and outputs to inner demoder;
After inner demoder and outer decoder carry out interior decoding and outer decoding to the received signal, linked by signal on IO port, output signal is sent to cache interface module by outer decoder simultaneously.
The unspecified part of the present invention belongs to general knowledge as well known to those skilled in the art.
Claims (6)
1. adaptivity many stars spread-spectrum signal analyzes a decipherer, it is characterized in that comprising: frequency reference unit, down-converter unit, the first power divider, multiple signal analysis and processing device; Signal analysis and processing device comprises again analog front-end module and kernel module;
Frequency reference unit, is sent to down-converter unit by time reference and frequency reference, sends it to power divider simultaneously, and the time and frequency standards provided is sent to centralized monitor server;
Down-converter unit, by the multichannel local output signal from Frontend preprocessor received, down-converts to 70MHz intermediate-freuqncy signal, and intermediate-freuqncy signal is outputted to power divider and centralized monitor server;
First power divider, is averagely allocated to multiple analog front-end module by the intermediate-freuqncy signal after down-converter unit frequency conversion and the time reference that provided by frequency reference unit and frequency reference are averagely allocated to multiple analog front-end module;
Analog front-end module, by the signal that the power divider received sends, carries out IQ quadrature frequency conversion, exports IQ orthogonal digital zero intermediate frequency signals to kernel module;
Kernel module, to receiving IQ orthogonal digital zero intermediate frequency signals, after carrying out despreading demodulation processing and IO phase ambiguity Transformatin, and exports IO end and outputs to centralized monitor server by the signal after process.
2. a kind of adaptivity many stars spread-spectrum signal according to claim 1 analyzes decipherer, it is characterized in that: described analog front-end module comprises radio-frequency (RF) switch, low noise amplifier LNA, band pass filter, IQ quadrature frequency conversion, frequency synthesizer, IQ two-way VGA and double channel A/D C module;
When radio-frequency (RF) switch is in by state, the intermediate-freuqncy signal that the first power divider sends is sent to low noise amplifier LNA;
Low noise amplifier LNA carries out low noise amplification to the signal that the second power divider exports, and is sent into band pass filter;
Band pass filter sends into IQ quadrature frequency conversion after the signal received is carried out filtering;
The local oscillation signal that frequency synthesizer inputs is divided into orthogonal same frequency two-way carrier wave by IQ quadrature frequency conversion, and utilizes this two-way carrier wave to carry out demodulation process to the signal that band pass filter exports, and exports IQ baseband signal;
IQ two-way VGA carries out after low pass filtered involves amplification, being input to double channel A/D C to the IQ baseband signal that IQ quadrature frequency conversion exports;
The IQ baseband signal of double channel A/D C module to input is sampled, and exports IQ orthogonal digital zero intermediate frequency signals to message handler kernel module;
Frequency synthesizer exports local oscillation signal to IQ quadrature frequency conversion.
3. a kind of adaptivity many stars spread-spectrum signal according to claim 2 analyzes decipherer, it is characterized in that: described kernel module comprises coherently despreading module, Zero-IF demodulator module, Phase Processing and decoder module, analog-to-digital conversion Clock management module and cache interface module;
Analog-to-digital conversion Clock management module is coherently despreading module, Zero-IF demodulator module with time reference signal, ensures the time synchronized in signal processing;
Coherently despreading module, receive the IQ orthogonal digital zero intermediate frequency signals that double channel A/D C module exports, and the IQ two paths of signals after despreading output despreading is carried out to Zero-IF demodulator module to it, export sampled data after carrying out filtering sampling to IQ orthogonal digital zero intermediate frequency signals simultaneously and carry out Fourier transform to cache interface module and to the signal after despreading, output spectrum data are to cache interface module;
Zero-IF demodulator module, demodulation is carried out to the IQ two paths of signals after despreading and carries out the carrier frequency-phase tracking of IQ two paths of signals, isolate I/Q data, and go out IQ clock data according to the clock recovery that analog-to-digital conversion Clock management module provides, output to Phase Processing and decoder module, restituted signal is sent to cache interface module by Zero-IF demodulator module simultaneously;
Phase Processing and decoder module, after carrying out phase ambiguity Transformatin, carry out decoding and export data to IO port, decoded data are sent to cache interface module simultaneously the IQ clock data of Zero-IF demodulator module output;
Cache interface module, the restituted signal that the sampled data send the coherently despreading module received and frequency spectrum data, Zero-IF demodulator module send and the decoded data that Phase Processing and decoder module send, be sent to external buffers.
4. a kind of adaptivity many stars spread-spectrum signal according to claim 3 analyzes decipherer, it is characterized in that: described coherently despreading module comprises correlator, filter A, filter B, spectrum-spreading code generator, despreading measurement and control module, band internal power detector A and FFT1024 module;
Correlator, the code phase control word receiving despreading measurement and control module transmission carries out the acquisition and tracking of IQ orthogonal digital zero intermediate frequency signals, the IQ orthogonal digital zero intermediate frequency signals that ADC module exports by the Gold code sequence utilizing spectrum-spreading code generator to export after completing acquisition and tracking carries out despreading, and is outputted to filter A;
Filter A, carries out the signal received being divided into three tunnels after filtering: the first via links Zero-IF demodulator module as the output of module, and the second tunnel outputs to band internal power detector A, and the 3rd tunnel outputs to FFT1024 module;
Band internal power detector A, carries out power detection to filtered signal, and testing result is fed back to despreading measurement and control module;
Despreading measurement and control module, the power signal of receiving belt internal power detector A and Zero-IF demodulator module feedback, when being with the power signal of internal power detector A and Zero-IF demodulator module feedback to be more than or equal to certain threshold value, despreading measurement and control module send code phase control word to correlator, the acquisition and tracking success of notice correlator IQ orthogonal digital zero intermediate frequency signals, when being with the power signal of internal power detector A and Zero-IF demodulator module feedback to be less than certain threshold value, despreading measurement and control module send code phase control word to correlator, for the continuation acquisition and tracking of correlator to IQ orthogonal digital zero intermediate frequency signals,
Spectrum-spreading code generator produces Gold code sequence according to the time reference signal that analog-to-digital conversion Clock management module provides, and Gold code sequence inputting is used for the despreading process of digital signal to correlator;
Filter B, after the IQ orthogonal digital zero intermediate frequency signals that double channel A/D C module exports is carried out filtering sampling, and exports sampled data to cache interface module after carrying out IQ two paths of signals alternative;
FFT1024 module, carry out Fourier transform to the despread signal that filter A exports, output spectrum data are to cache interface module.
5. a kind of adaptivity many stars spread-spectrum signal according to claim 4 analyzes decipherer, it is characterized in that: described Zero-IF demodulator module includes Zero-IF demodulator device, carrier phase tracking device, carrier frequency acquisition tracker, carrier wave NCO, clock and data recovery and band internal power detector B;
Zero-IF demodulator device, carrier phase tracking device, carrier frequency acquisition tracker and carrier wave NCO, IQ two paths of signals after the despreading that phase place despreading module is exported, carry out demodulation and carrier frequency-phase tracking, Zero-IF demodulator device is made finally to export I/Q data, Zero-IF demodulator device exports four tunnel I/Q data, one tunnel is input to carrier phase tracking device and completes demodulation and carrier frequency-phase is followed the tracks of, one tunnel is input to clock and data recovery module, one road input tape internal power detector B, leads up to after MUX alternative and outputs to cache interface module;
Clock and data recovery module, goes out IQ clock data according to the clock recovery that analog-to-digital conversion Clock management module provides, outputs to Phase Processing and decoder module.
Band internal power detector B, power detection is carried out to the signal that Zero-IF demodulator device exports, and despreading measurement testing result fed back in coherently despreading module and control module.
6. a kind of adaptivity many stars spread-spectrum signal according to claim 5 analyzes decipherer, it is characterized in that: described Phase Processing and decoder module include phase ambiguity and remove module, inner demoder, outer decoder;
Phase ambiguity is removed module and is carried out phase ambiguity Transformatin to the I/Q data received, and eliminates the mutual interference of I, Q two paths of signals, and outputs to inner demoder;
After inner demoder and outer decoder carry out interior decoding and outer decoding to the received signal, linked by signal on IO port, output signal is sent to cache interface module by outer decoder simultaneously.
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