CN105304491B - The method for being used to form embedded germanium silicon - Google Patents
The method for being used to form embedded germanium silicon Download PDFInfo
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Abstract
The application discloses a kind of method for being used to form embedded germanium silicon.This method comprises: providing front-end devices structure, which includes semiconductor substrate and the gate structure in semiconductor substrate；The silicon nitride layer of deposit carbon-doped on the surface of front-end devices structure；Silicon nitride film is formed on the surface of the silicon nitride layer of doped carbon；Lithography and etching technique is carried out, the position that form source electrode and drain electrode in the semiconductor substrate forms depressed area；And the embedded germanium silicon of epitaxial growth in depressed area.
Description
Technical field
This invention relates generally to semiconductor fabrication process more particularly to a kind of methods for being used to form embedded germanium silicon.
Background technique
Currently, the principal element for influencing field-effect transistor performance is the mobility of carrier, wherein carrier is moved
Shifting rate will affect the size of electric current in channel.The decline of carrier mobility can not only reduce transistor in field effect transistor
Switch speed, but also resistance difference when on and off can be made to reduce.Therefore, in Complementary Metal Oxide Semiconductor Field Effect crystalline substance
In the development of body pipe (CMOS), one of the emphasis that carrier mobility always is transistor arrangement design is effectively improved.
Conventionally, by P type metal oxide semiconductor field effect transistor (PMOS) and N-type in cmos device manufacturing technology
Metal Oxide Semiconductor Field Effect Transistor (NMOS) is separately handled, for example, using pressure in the manufacturing method of PMOS device
Stress material, and tensile stress material is used in NMOS device, to apply stress appropriate to channel region, to improve carrier
Mobility.Wherein, embedded germanium silicon (SiGe) technology (hereinafter referred to as eSiGe technology) is fitted since it can apply channel region
When compression become to improve the mobility in hole one of the major technique of PMOS stress engineering.It is currently, there are two kinds of germanium
Silicon stress introduces technology, and one is germanium silicon stressor layers are formed in the source/drain region of PMOS transistor, another kind is in gate structure
Underface forms germanium silicon stressor layers in channel region.
For example, the embedded germanium silicon technology of prior art epitaxial growth can comprise the following steps that
(1) grid oxic horizon is generated in semiconductor substrate (for example, silicon base)；
(2) the deposit polycrystalline silicon layer on grid oxic horizon；
(3) ion doping is carried out to polysilicon layer；
(4) on the polysilicon layer deposited silicon nitride layer as hard mask layer；
(5) patterned photoresist layer is formed on hard mask layer, defines the position that polysilicon layer is formed by grid；
(6) using patterned photoresist layer as exposure mask, it is sequentially etched hard mask layer, polysilicon layer and grid oxic horizon, and
Remove patterned photoresist layer；
(7) on the surface of above structure, i.e. semiconductor substrate, the surface of hard mask layer and grid oxic horizon, polysilicon layer
With the side of hard mask layer, deposited oxide layer；
(8) the cvd nitride layer on the surface of oxide layer；
(9) lithography and etching technique is carried out, forms silicon base depressed area in the semiconductor substrate；
(10) germanium silicon, i.e., be filled in depressed area by the epitaxial growth Ge-Si in silicon base depressed area；And
(11) other subsequent techniques are carried out, such as offset side wall is formed, source electrode and drain electrode is formed, autoregistration multi-crystal silicification
Object, metallization etc..
In the embedded germanium silicon technology of prior art epitaxial growth, as shown in Figure 1, can remove film (disposal film)
101, also referred to as pseudo- side wall (dummy spacer), is composed of both oxide layer and nitration case.In Fig. 1,101 are
Pseudo- side wall, 103 be embedded germanium silicon (i.e. eSiGe).In general, oxide layer is in hot phosphoric acid (H3PO4) can be used as can in removal technique
The stop-layer of nitration case is removed, and can remove nitration case and then can be used as the protective layer of NMOS/PMOS selective growth germanium silicon fiml.
However, during epitaxial growth embedded germanium silicon, due to the eSiGe of chemical vapor deposition (CVD) oxide layer
The reasons such as poor selectivity and surface topography are bad are readily formed the defect of such as protrusion etc in the shoulder of polysilicon layer.
Moreover, being easy to happen oxide layer loss during carrying out hydrofluoric acid (HF) prerinse to eSiGe and causing to generate gap at this.
As shown in Fig. 2, it shows the defect generated in the embedded germanium silicon technology of prior art epitaxial growth, wherein the instruction of defect 210 by
In factors such as oxide layer eSiGe poor selectivities in the overshooting shape defect that polysilicon layer shoulder generates, defect 220 is then indicated in HF
The gap generated during cleaning since oxide layer is lost.
Therefore, it is necessary to develop a kind of method for being used to form embedded germanium silicon while overcoming drawbacks described above.
Summary of the invention
In the prior art, can not inhibit in the embedded germanium silicon technology of epitaxial growth polysilicon layer shoulder such as protrusion it
The defect of class and the generation in oxide layer gap.
In view of this, the present invention provides be used to form embedded germanium silicon while can overcome the method for drawbacks described above.
According to one embodiment of present invention, a kind of method for being used to form embedded germanium silicon is provided.This method comprises:
Front-end devices structure is provided, which includes semiconductor substrate and the gate structure in semiconductor substrate；?
The silicon nitride layer of deposit carbon-doped on the surface of front-end devices structure；Silicon nitride is formed on the surface of the silicon nitride layer of doped carbon
Film；Lithography and etching technique is carried out, the position that form source electrode and drain electrode in the semiconductor substrate forms depressed area；And recessed
Fall into the embedded germanium silicon of epitaxial growth in area.
Preferably, the atomic percentage content of carbon is 0.5%-20% in the silicon nitride layer of doped carbon.
Preferably, the silicon nitride layer of doped carbon is formed by Atomic layer deposition method.
Preferably, the silicon nitride layer of doped carbon is formed by plasma enhanced atomic layer deposition method.
Preferably, the silicon nitride layer of doped carbon is formed by chemical vapor deposition method.
Preferably, in 400 DEG C -650 DEG C of temperature range and the pressure limit of 0.002T-5T deposit carbon-doped nitrogen
SiClx layer.
Preferably, the silicon nitride layer of doped carbon is greater than 20 to the selectivity of oxide in 165 DEG C of hot phosphoric acid.
Preferably, doped with boron in embedded germanium silicon.
Preferably, the embedded germanium silicon of epitaxial growth uses SiH4, DCS or Si2H6As silicon source, GeH is used4As ge source,
And use B2H6As boron source.
Preferably, the embedded germanium silicon of epitaxial growth be 400 DEG C -900 DEG C at a temperature of carry out.
Optionally, retain the silicon nitride film on the silicon nitride layer surface of doped carbon.
The generation of polysilicon layer shoulder defect can be effectively inhibited according to the method for the present invention, while being avoided due to oxidation
The gap of layer loss and generation, so as to improve the carrier mobility in transistor, increase driving current, and then enhances brilliant
Body Guan Xingneng.
Detailed description of the invention
Reading the following detailed description in conjunction with the accompanying drawings may be better understood exemplary implementation disclosed in this invention
Example, in the accompanying drawings:
Fig. 1 shows the puppet being composed of in the embedded germanium silicon technology of prior art epitaxial growth oxide layer and nitration case
The schematic diagram of side wall；
Fig. 2 shows the defects generated in the embedded germanium silicon technology of prior art epitaxial growth；
Fig. 3 shows the device architecture cross-sectional view before and after the embedded germanium silicon technology of prior art epitaxial growth,
In polysilicon layer shoulder generate overshooting shape defect；
Fig. 4 shows the device architecture cross-sectional view before and after prior art hot phosphoric acid removal nitridation layer process, wherein
The overshooting shape defect of polysilicon layer shoulder still has, and occurs gap in oxide layer；
Fig. 5 shows the flow chart of the method according to an embodiment of the invention for being used to form embedded germanium silicon；
Fig. 6 shows the device before and after the embedded germanium silicon technology of epitaxial growth according to an embodiment of the invention
Structure sectional view, wherein the generation of polysilicon layer shoulder defect is inhibited；And
Fig. 7 shows the device junction before and after hot phosphoric acid removal nitridation layer process according to an embodiment of the invention
Wherein not generating defect in polysilicon layer shoulder, and also there is not gap in structure cross-sectional view in oxide layer.
In order to illustrate succinct, attached drawing shows general make, and omits the description and details of well-known characteristic and technology,
To avoid the discussion unnecessarily obscured to embodiment of the present invention.In addition, each element in attached drawing is drawn not necessarily to scale
System.For example, the size of some elements may be amplified to help improve to of the invention each relative to other elements in attached drawing
The understanding of embodiment.Same reference numerals in different attached drawings indicate identical element, and like reference numerals may but not necessarily
Indicate similar element.
Description of symbols
101 pseudo- side walls
103 embedded germanium silicon
210 overshooting shape defects
220 void defects
301 substrate silicons
303 shallow trench isolations (STI)
305 polysilicons
307 silicon nitrides
309 CVD oxide layer stop-layers
The 310 germanium silicon grown in depressed area
311 overshooting shape defects
312 void defects
S510, S520, S530, S540, S550 processing step
601 substrate silicons
603 shallow trench isolations (STI)
605 polysilicons
607 silicon nitrides
609 silicon nitride stop-layers
The 610 germanium silicon grown in depressed area
611,612 marked region
Specific embodiment
The present invention is described in detail referring to the drawings.It should be appreciated that following detailed description is substantially only to show
Example property, and it is not intended to be limited to the embodiment of subject matter or application and the purposes of these embodiments.As made herein
, wording " exemplary " expression " as example, example or explanation ".It is not answered being described herein as illustrative any realization
It is construed as certain preferred or is better than other realizations.Also, it is not intended to by aforementioned technical field, background technique, invention
Any expression or implicit theory perhaps showed in following detailed description is constrained.
Term " first " in the specification and in the claims, " second ", " third ", " the 4th " etc. (if any)
It for being distinguished between similar element, and is not necessarily for describing certain order or time sequencing.It is appreciated that in appropriate feelings
These terms so used under condition are interchangeable, such as enable invention as described herein embodiment to be different from this paper institute
State or shown in other sequences operate.Similarly, presented herein if method described herein includes series of steps
The sequences of these steps be not necessarily the unique order that these steps can be performed, and it is some stated the step of can be omitted
And/or some other steps not described herein can be added to this method.In addition, the terms "include", "comprise", " having " and
Its any deformation, which is intended to be applicable in, not exclusively includes, so that process, method, product or device including a series of elements are not necessarily
Be limited to those elements, but may include not expressly listed or these process, methods, product or device intrinsic other elements.
In the prior art, removable film is composed of both oxide layer and nitration case.Due to chemical vapor deposition
The embedded germanium silicon growth of product oxide layer is selectively very low, therefore is easy in the embedded germanium silicon of epitaxial growth in polysilicon
The shoulder of layer generates defect.Fig. 3 shows the device architecture before and after the embedded germanium silicon technology of prior art epitaxial growth
Cross-sectional view.As shown in figure 3, in polysilicon layer shoulder many places, there are overshooting shapes to lack after carrying out the embedded germanium silicon of epitaxial growth
Fall into 311.In addition, during the subsequent progress hydrofluoric acid clean to embedded germanium silicon, since oxide layer can react with hydrofluoric acid,
Therefore it is easy to appear oxide layer loss and causes to generate gap 312 at this.It is gone for example, Fig. 4 shows prior art hot phosphoric acid
Except the device architecture cross-sectional view before and after nitridation layer process.As shown in figure 4, after hot phosphoric acid removal technique, it is more
The overshooting shape defect 311 of crystal silicon layer shoulder still has, but also gap 312 occurs in CVD oxide layer stop-layer 309.
In view of the above technical problems, the present invention provides be used to form embedded germanium silicon while can overcome drawbacks described above
Method.As shown in figure 5, it illustrates the processes of the method according to an embodiment of the invention for being used to form embedded germanium silicon
Figure.Illustrative methods 500 will be described in detail below.
Firstly, providing front-end devices structure in step S510.The front-end devices structure may include semiconductor substrate and be located at
Gate structure in semiconductor substrate.The constituent material of semiconductor substrate can use undoped monocrystalline silicon, doped with impurity
Monocrystalline silicon, silicon-on-insulator (SOI) or germanium silicon (SiGe) etc..As an example, in the present embodiment, semiconductor substrate is selected
Single crystal silicon material is constituted.
As an example, gate structure may include that the gate dielectric stacked gradually, gate material layers and grid are covered firmly
Film layer.Gate dielectric may include oxide, for example, silica (SiO2) layer.Gate material layers may include polysilicon layer, gold
Belong to one of layer, conductive metal nitride layer, conductive metal oxide layer and metal silicide layer or a variety of.Wherein,
The constituent material of metal layer can be tungsten (W), nickel (Ni) or titanium (Ti)；Conductive metal nitride layer may include titanium nitride
(TiN) layer；Conductive metal oxide layer may include titanium oxide (IrO2) layer；Metal silicide layer may include titanium silicide (TiSi)
Layer.As an example, in the present embodiment, gate material layers select polycrystalline silicon material to constitute.Grid hard mask layer may include oxidation
Nitride layer, nitride layer, oxynitride layer and amorphous carbon Zhong ー kind or a variety of.Wherein, oxide skin(coating) may include boron phosphorus silicon glass
It is glass (BPSG), phosphorosilicate glass (PSG), ethyl orthosilicate (TE0S), undoped silicon glass (USG), spin-coating glass (S0G), highly dense
Spend plasma (HDP) or spin-on dielectric (SOD).Nitride layer may include silicon nitride (Si3N4) layer.Oxynitride layer can wrap
Include silicon oxynitride (SiON) layer.As an example, in the present embodiment, grid hard mask layer selects silicon nitride material to constitute.
Zuo Wei Ling ー example, gate structure are also possible to Semiconductor Oxide-Nitride Oxide-semiconductor
(SONOS) grid structure is laminated.
As an example, can also be formed on a semiconductor substrate positioned at gate structure two sides and against the inclined of gate structure
Move clearance wall structure.For example, the offset by gap wall construction can be located at chemical vapor deposition oxide layer and grid in figs. 3 and 4
Between polysilicon layer, in figure 6 and figure 7 the offset by gap wall construction can be located at silicon nitride stop-layer and gate polysilicon layer it
Between.Wherein, offset by gap wall construction may include Zhi ー layers of oxide skin(coating) of Shao and/or Zhi ー layers of nitride layer of Shao.It needs to illustrate
, offset by gap wall construction be it is optional rather than required, be mainly used for performing etching or guarantor when ion implanting subsequent
The side wall for protecting gate structure is injury-free.
It should be noted that it is restrictive that front-end devices structure as described herein, which is not, but there can also be other structures.
For example, it can also be formed with isolation channel, buried layer etc., such as shallow trench isolation (STI) in the semiconductor substrate.In addition, right
For PMOS transistor, N trap can also be formed in semiconductor substrate, and before forming gate structure, it can be to whole
A N trap carries out primary low dose of boron injection, for adjusting the threshold voltage V of PMOS transistorth。
Next, forming the silicon nitride layer of doped carbon on the surface of above-mentioned front-end devices structure in step S520.Example
It such as, can be in the silicon nitride layer of deposit carbon-doped on the upper surface and side of semiconductor substrate surface and gate structure.Show at one
In example, the atomic percentage content for being formed by carbon in the silicon nitride layer of doped carbon is 0.5%-20%.In one example, it adulterates
The silicon nitride layer of carbon can be formed by Atomic layer deposition method.In another example, the silicon nitride layer of doped carbon can pass through
Gas ions enhancing Atomic layer deposition method is formed.In another example, the silicon nitride layer of doped carbon can pass through chemical vapor deposition
Product method is formed.In addition, it will be understood by those skilled in the art that can also be using other methods come the silicon nitride of deposit carbon-doped
Layer.
In one example, it can be mixed in 400 DEG C -650 DEG C of temperature range and the pressure limit of 0.002T-5T
The deposition of the silicon nitride layer of miscellaneous carbon.In specific operation process, forming source gas used in the silicon nitride layer of doped carbon can be with
Including DCS (SiH2CL2, dichlorosilane), NH3Gas and C2H4Gas.In one example, in the silicon nitride for being doped carbon
When the deposition of layer, the gas flow of DCS can be 1-5slm (mark condition rises every point), NH3Gas flow can be 2-10slm,
And C2H4Gas flow can be 0.2-5slm.Generally, film thickness can control between 3~20 nanometers.
This silicon nitride layer formed by carbon doping method is harder since the presence of carbon atom becomes quality.At one
In example, the silicon nitride layer of the doped carbon is greater than 20 to the selectivity of oxide in 165 DEG C of hot phosphoric acid.In the subsequent process
Hot phosphoric acid wet chemistry removal silicon nitride film during, the silicon nitride layer of this doped carbon can be used as etching stop layer.Example
Such as, when performing etching to the silicon nitride film formed later, the silicon nitride layer of the doped carbon can be used as the etch-stop of silicon nitride film
Only layer.In addition, the silicon nitride layer of doped carbon also is used as stop-layer during carrying out hydrofluoric acid prerinse to embedded germanium silicon.
In step S530, silicon nitride film is formed on the surface of the silicon nitride layer of doped carbon.At this point, in gate structure two sides
To there is the side wall of silicon nitride layer and silicon nitride film including doped carbon.The thickness of the side wall can limit gate material layers and substrate
The distance between germanium silicon of epitaxial growth in silicon dent.In one example, the nitrogen of doped carbon can be retained in the subsequent process
Silicon nitride film in SiClx layer surface.
In step S540, lithography and etching technique is carried out, to form the position shape of source electrode and drain electrode in the semiconductor substrate
At depressed area.In one example, the depth of depressed area can be about 15-80 nanometers.In one example, above-mentioned etching process
It may include dry etch step and wet etching step.Specifically, can successively carry out dry etch step in etching technics
And wet etching step.For example, fluorine or chlorine plasma can be used in dry etch step, and chemistry can be used in wet etching step
Liquid.
In step S550, the embedded germanium silicon of epitaxial growth in the depressed area of semiconductor substrate.In one example, it can adopt
With chemical vapor deposition come the embedded germanium silicon of selective epitaxial growth.In addition, it will be understood by those skilled in the art that can also be used
Other methods come selective epitaxial growth embedded germanium silicon, such as molecular beam epitaxy (MBE) etc..In one example, it is formed embedding
Entering formula germanium silicon can be used SiH4, DCS or Si2H6As silicon source, and use GeH4As ge source, wherein being formed by embedded
The atomic percentage content of germanium in germanium silicon for example can be 15%-60%.It, optionally, can be in addition, in further example
Embedded germanium silicon adulterates boron.In this case, B can be used2H6As boron source.Wherein, it is being formed by the insertion doped with boron
In formula germanium silicon, the atomic percentage content of germanium for example can be 15%-60%, and the atomic percentage content of boron for example can be
0.05%-5%.
In one example, the embedded germanium silicon of epitaxial growth be 400 DEG C -900 DEG C at a temperature of carry out.Show at one
In example, silicon source gas is (for example, SiH4, DCS or Si2H6) gas flow range can be 5-500sccm, ge source gas (example
Such as, GeH4) the range of gas flow can be 5-500sccm and boron source gas (for example, B2H6) gas flow range
It can be 5-500sccm.In one example, the range of the gas flow of HCl etching gas can be 1-300sccm, H2Gas
Range of flow can be 1-50slm (mark condition rises every point).
In addition, using device architecture made according to the method for the present invention, can by other subsequent techniques (for example, annealing,
Metal interconnection etc.) complete the manufacture of entire transistor.
Note that the specific steps of the above method provided herein are given as examples for illustration purposes only, and
It is not intended to and limits the invention.Moreover, one of ordinary skill in this art will readily understand that can according to need additions and deletions it is a certain or
Certain specific steps or the order for adjusting these steps, while without departing from the spirit and scope of the present invention.
Fig. 6 shows the device before and after the embedded germanium silicon technology of epitaxial growth according to an embodiment of the invention
Structure sectional view.As shown in fig. 6, can remove film is by the nitrogen on the silicon nitride layer 609 of doped carbon and 609 surface of silicon nitride layer
Change what both layers were composed.For chemical vapor deposition oxide layer, the embedded germanium silicon of the silicon nitride layer of doped carbon
Growth selectivity is relatively high.Therefore, when carrying out the embedded germanium silicon technology of epitaxial growth, due to doped carbon silicon nitride layer compared with
Highly selective and good surface topography, and make it difficult to generate defect in polysilicon layer shoulder.
Fig. 7 shows hot phosphoric acid removal nitration case after the embedded germanium silicon of epitaxial growth according to an embodiment of the invention
The device architecture cross-sectional view of technique.As shown in fig. 7, making when being removed using hot phosphoric acid to the nitration case in removable film
Silicon nitride layer 609 for the doped carbon of stop-layer will not substantially lose, because maintaining polysilicon without gap
The layer flawless state of 605 shoulders.Referring specifically to Fig. 7, after hot phosphoric acid removes nitridation layer process, at marked region 611
Standing shape defect is not found, and does not find gap at marked region 612 yet.
The oxide layer of the chemical vapor deposition of such as low selectivity by being replaced with highly selective doped carbon by the present invention
Silicon nitride layer, obtain better choice in terms of embedded germanium silicon growth, can effectively inhibit epitaxial growth insertion
The generation of polysilicon layer shoulder defect during formula germanium silicon, while the silicon nitride layer of doped carbon also plays and oxygen in the prior art
Change the effect of the identical etching stop layer of layer.Moreover, during the subsequent progress hydrofluoric acid prerinse to embedded germanium silicon, due to
Hydrofluoric acid is very low to the etch rate of the silicon nitride layer of doped carbon, therefore the silicon nitride layer of the doped carbon can be maintained, from
And avoid the phenomenon that gap occur due to by hf etching.Specifically, by comparing Fig. 3 and Fig. 6 and compared with Fig. 4 and figure
7, the present invention compared with the existing technology the advantages of and progressive will be evident.By overcoming polysilicon layer shoulder defect and quarter
The gap etc. in stop-layer is lost, the present invention can effectively improve transistor performance.
Detailed description is given herein by reference to specific illustrative embodiment.It may be evident, however, that can be made to these embodiments respectively
Kind modifications and changes, without departing from broader spirit and scope of the invention as described in the appended claims.Although having shown
Out and specific embodiments of the present invention are described, but those skilled in the art obviously can make many changes, change and modification
Without departing from scope of the appended claims.Therefore, the description and the appended drawings should be considered as illustrative and not restrictive meaning.And
And the above-mentioned use of embodiment and other examples language is not necessarily referring to the same embodiment or same example, and may refer to
Be different and unique embodiment, it is also possible to be the same embodiment.Appended claims will be within its scope comprising falling in
All these changes in the true scope and spirit of the invention, change and modification.
Claims (9)
1. a kind of method for being used to form embedded germanium silicon, comprising:
Front-end devices structure is provided, the front-end devices structure includes semiconductor substrate and the grid knot in semiconductor substrate
Structure；
The silicon nitride layer of deposit carbon-doped on the surface of the front-end devices structure；
Silicon nitride film is formed on the surface of the silicon nitride layer of the doped carbon；
Lithography and etching technique is carried out, the position that form source electrode and drain electrode in the semiconductor substrate forms depressed area；And
The embedded germanium silicon of epitaxial growth in depressed area,
Wherein, the silicon nitride layer of the doped carbon is greater than 20 to the selectivity of oxide in 165 DEG C of hot phosphoric acid, and retains
The silicon nitride film on the surface of the silicon nitride layer of the doped carbon.
2. the method as described in claim 1, which is characterized in that the atomic percentage content of carbon in the silicon nitride layer of the doped carbon
For 0.5%-20%.
3. the method as described in claim 1, which is characterized in that the silicon nitride layer of the doped carbon is by atomic layer deposition side
What method was formed.
4. the method as described in claim 1, which is characterized in that the silicon nitride layer of the doped carbon is to pass through plasma enhancing
What Atomic layer deposition method was formed.
5. the method as described in claim 1, which is characterized in that the silicon nitride layer of the doped carbon is to pass through chemical vapor deposition
What method was formed.
6. the method as described in claim 1, which is characterized in that in 400 DEG C -650 DEG C of temperature ranges and 0.002T-5T
The silicon nitride layer of the deposition doped carbon in pressure limit.
7. the method as described in claim 1, which is characterized in that doped with boron in the embedded germanium silicon.
8. the method for claim 7, which is characterized in that the embedded germanium silicon of epitaxial growth uses SiH4, DCS or Si2H6Make
For silicon source, GeH is used4As ge source, and use B2H6As boron source.
9. the method as described in claim 1, which is characterized in that the embedded germanium silicon of epitaxial growth is the temperature at 400 DEG C -900 DEG C
The lower progress of degree.
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| CN103515321A (en) * | 2012-06-28 | 2014-01-15 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device side wall forming method |
| CN103915341A (en) * | 2013-01-08 | 2014-07-09 | 中芯国际集成电路制造(上海)有限公司 | Transistor and forming method thereof |
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| CN103515321A (en) * | 2012-06-28 | 2014-01-15 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device side wall forming method |
| CN103915341A (en) * | 2013-01-08 | 2014-07-09 | 中芯国际集成电路制造(上海)有限公司 | Transistor and forming method thereof |
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