CN105302489A - Heterogeneous multi-core remote embedded memory system and method - Google Patents
Heterogeneous multi-core remote embedded memory system and method Download PDFInfo
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- CN105302489A CN105302489A CN201510719682.6A CN201510719682A CN105302489A CN 105302489 A CN105302489 A CN 105302489A CN 201510719682 A CN201510719682 A CN 201510719682A CN 105302489 A CN105302489 A CN 105302489A
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Abstract
The invention relates to a heterogeneous multi-core remote embedded memory system. The system is characterized by comprising an embedded memory, a master processor, at least one slave processor and a cache, wherein the at least one slave processor is used for receiving a write request of a user or a PC to the embedded memory, writing first data into a cache region, sending the write request to the master processor through remote process calling and receiving a processing return value sent by the master processor; and the master processor reads second data stored in the cache according to the write request, writes the read second data into the embedded memory and sends the processing return value to the at least one slave processor, and the second data comprises the first data. According to the system, the access operation of an embedded file system of the slave processor on the embedded memory is finished, and the operation not only has timeliness but also ensures the completeness and security of access data.
Description
Technical field
The present invention relates to the remote technical fields of heterogeneous multi-core system, particularly relate to the remote embedded accumulator system of a kind of heterogeneous polynuclear and method.
Background technology
Current processor system is mainly divided into two classes according to the difference of integrated chip: isomorphism multi-core processor system and heterogeneous multi-nucleus processor system.Isomorphism multi-core processor system is the structure of calculating kernel integrated in finger processor is identical, adopts symmetrical system; Heterogeneous processor systems is that the structure of calculating kernel integrated in finger processor is not identical, and the high speed being realized system effectiveness by rational task matching is promoted.
For heterogeneous multi-processor SOC (System-on-a-chip, SOC (system on a chip)) system, principal feature is the disparate modules a whole set of scheme, comprise central processing unit, disposablely be produced on together, a SoC system can have the processors such as one or several MCU, CPU or DSP.Usually a processor or one group of bus is only had to visit EMMC (EmbeddedMultiMediaCard, embedded memory) file system, if other processors also need to utilize this file system, because other processors cannot use the controller bus of EMMC, therefore current embedded file system can not meet its demand.Such as, for the system comprising cortexM4 and cortexA5.EMMC control bus interface sdccport is generally employed processor (A5) and monopolizes, and M4 can not access EMMC, and that is, when M4 has demand use file system, general system cannot meet this demand.
Summary of the invention
For achieving the above object, on the one hand the invention provides the remote embedded accumulator system of a kind of heterogeneous polynuclear, this system comprises: in-line memory, primary processor, at least one from processor and buffer, wherein,
First data for receiving user or PC to the write request of in-line memory, and are write described buffer area from processor by least one, send write request by remote procedure call to primary processor simultaneously, and receive the process rreturn value that primary processor sends;
Primary processor reads the second data of buffer storage according to write request, and the second data comprise the first data, and the second data read are write described in-line memory, and described in process rreturn value being sent to, at least one is from processor simultaneously.
On the other hand, the invention provides the remote embedded memory approach of a kind of heterogeneous polynuclear, the method comprises: at least one receives user or PC to the write request of in-line memory from processor, and by the first data write buffer, send write request by remote procedure call to described primary processor simultaneously;
Primary processor reads the second data of buffer storage according to described write request, and the second data comprise the first data, and the described data write in-line memory that will read, send at least one from processor process rreturn value simultaneously.
The system that the embodiment of the present invention provides is by remote procedure call and intermodule synchronous operation constantly, and complete from the embedded file system of processor to the accessing operation of in-line memory emmc, this operation not only has ageing.And ensure that integrality and the security of visit data.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
The structural representation of the remote embedded accumulator system of a kind of heterogeneous polynuclear that Fig. 1 provides for the embodiment of the present invention;
The structural representation of the remote embedded accumulator system of another kind of heterogeneous polynuclear that Fig. 2 provides for the embodiment of the present invention;
A kind of method flow diagram receiving write request that Fig. 3 provides for system shown in Figure 1;
The method flow diagram of the another kind reception write request that Fig. 4 provides for system shown in Figure 1.
Embodiment
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
By the processor except primary processor in embodiments of the invention system, be called from processor.
The structural representation of the remote embedded accumulator system of a kind of heterogeneous polynuclear that Fig. 1 provides for the embodiment of the present invention.As shown in Figure 1, this system comprises: buffer ram103, in-line memory emmc100, primary processor 101 and at least one is from processor 102.
In-line memory emmc100 is for storing data; Primary processor 101 for accessing in-line memory 100 and buffer area 103, and at least one from processor 102 transmission processing rreturn value; At least one from processor 102 for receiving the read-write requests of user/PC to in-line memory 100: when receiving write request, by remote procedure call (remoteprocesscall), this write request is sent to primary processor 101, and receive the process rreturn value to write request; When receiving read request, buffer area 103 is conducted interviews.The data that buffer 103 writes according to write request from processor 102 for storing at least one, and for storing the data of primary processor 101 according to read request reading in-line memory 100;
By primary processor 101, buffer ram103 carries out the data syn-chronization operation of timing, for keeping the consistance of data on buffer ram103 and in-line memory emmc100 to in-line memory emmc100.At system start-up phase, primary processor 101 couples of buffer ram103 only have write permission; In normal work, primary processor 101 couples of buffer ram103 only have read right;
When at least one receives read request to in-line memory emmc100 of user or PC from processor 102, synchronous operation due to in-line memory emmc100 and buffer ram103 timing ensure that the consistance of data, therefore, at least one can direct data of read requests from buffer 103 from processor 102.
When at least one receives write request to in-line memory emmc100 of user or PC from processor 102, the data of request write write buffer 103 from processor 102 1 aspect by least one, by remote procedure call, this write request is sent to primary processor 101 on the other hand, primary processor 101 is according to the data read right of buffer ram103 being obtained to buffer ram103, and write in in-line memory emmc100, finally result is sent at least one from processor 102 with the form of rreturn value, complete at least one write operation from processor 102 couples of in-line memory emmc100.
In above-mentioned write operation process, if after primary processor 101 receives write request, can not to in-line memory 100 carry out write operation or the write operation time longer time, now complete the write operation to in-line memory emmc100 by the timing synchronization operation of in-line memory emmc100 and buffer ram103.
The system that the embodiment of the present invention provides is by the remote procedure call operation between processor, the synchronous operation of shared cache area and in-line memory by stages, and shared cache area and from the timing in processor cache interval or the synchronous operation of triggering, to achieve from the embedded file system of processor the access of in-line memory emmc, ensure that integrality and the security of data.
The structural representation of the remote embedded accumulator system of another kind of heterogeneous polynuclear that Fig. 2 provides for the embodiment of the present invention.As shown in Figure 2, this system comprises: buffer ram103, in-line memory emmc100, primary processor 101 and at least one is from processor 102.Wherein,
In-line memory emmc100 comprises multiple subregion, and system can select at least two subregions for each processor in in-line memory emmc100, for storing the data of each processor.Two subregions from processor 102 are comprised for in-line memory emmc100: embedded type file subregion 1 and embedded type file subregion 2 in Fig. 2.
Buffer ram103 comprises two embedded buffer areas: from processor cache district rambuffer and shared cache area sharedrambuffer, from passing through between processor cache district rambuffer and shared cache area sharedrambuffer to realize timing or the synchronous operation through triggering from processor 102.At least one can be synchronized to sharerambuffer from processor 102 renewal from processor cache district rambuffer, and namely shared cache area sharerambuffer is the backup from processor cache district rambuffer.Shared cache area sharerambuffer in buffer ram103 carries out the ping-pong synchronous operation of timing by primary processor 101 to the subregion of in-line memory emmc100, keep the consistance of shared cache area sharedrambuffer and in-line memory emmc100 internal data.
Being specially of this ping-pong synchronous operation: according to write request, at least one passes through primary processor 101 from processor 102, when write operation is carried out to the subregion 1 of in-line memory emmc100, request msg first writes from processor cache district from processor 102 by least one, by the synchronous operation from processor cache district and shared cache area, reach data consistent.According to write request, primary processor 101 is by the total data of shared cache area write subregion 1; When this, at least one receives next write request from processor 102, at least one passes through primary processor 101 from processor 102, carry out write operation to the subregion 2 of in-line memory emmc100, primary processor 101 is by the total data of shared cache area write subregion 2.
It should be noted that, buffer ram103 can in the system of the embodiment of the present invention, also can outside the system of the embodiment of the present invention.
The Telefile server remotefsserver of primary processor 101, for receiving the remote procedure call request RPC that at least one sends from processor 102 Telefile client remotefsclient, and the Telefile client remotefsclient transmission processing rreturn value at least one from processor 102.
At system start-up phase, primary processor 101 selects a subregion from in-line memory emmc100, read this partition data, and write shared cache area sharerambuffer, now primary processor 101 couples of shared cache area sharerambuffer only have write permission; In normal work, shared cache area sharerambuffer and in-line memory emmc100 carries out the ping-pong synchronous operation of timing by primary processor 101, now primary processor 101 couples of shared cache area sharerambuffer only have read right, and at least one has access limit from processor 102 couples of shared cache area sharerambuffer;
Telefile client remotefsclient and embedded file system EFS is comprised from processor 102.Embedded file system EFS, for receiving the read-write requests to in-line memory emmc100 that user or PC send: for read request, at least one directly can read desired data from processor 102 from processor cache district rambuffer; For write request, at least one writes from processor cache district rambuffer from processor 102 1 aspect by the data of request write, by Telefile client remotefsclient, this request is sent to Telefile server remotefsserver on the other hand.Wherein, from processor 102 can be MCU processor.
The embodiment of the present invention receives the read-write requests of user or PC by embedded file system EFS, this request carry in subject area information, object path and object information one or more, when needs carry out read or write to in-line memory emmc100, carry out write operation by remote procedure call request primary processor 101 couples of in-line memory emmc100 or carry out timing ping-pong synchronous operation, detailed process is as follows:
When system starts, primary processor 101 selects a subregion in in-line memory emmc100 subregion, read subregion and write shared cache area sharerambuffer, the data of shared cache area sharerambuffer are read from processor 102, and be stored to from processor cache district rambuffer, realize shared cache area sharerambuffer and the synchronous operation from processor cache district rambuffer.
When the request of access that embedded file system EFS receives is write request, embedded file system EFS mono-aspect writes the data of request write from processor cache district rambuffer, utilize from the timing of processor cache district rambuffer and shared cache area sharerambuffer or the synchronous operation through triggering, the data syn-chronization of request write is stored to shared cache area sharerambuffer; This write request is sent on the other hand to Telefile client remotefsclient.Pass through remote procedure call, Telefile server remotefsserver receives this write request, primary processor 101 is according to the read right to shared cache area sharerambuffer, data in the sharerambuffer of shared cache area are read, and successively the data read are write in the specified partition of in-line memory emmc100, send to Telefile client informed embed formula file system EFS to ask result with the form of rreturn value result simultaneously.Such as, rreturn value can represent with 1 and processes successfully, represents process unsuccessfully with 0.
If write operation success, Telefile server remotefsserver obtains the rreturn value of successful operation, and by the call back function of Telefile client remotefsclient, result is sent to embedded file system EFS, after embedded file system EFS receives successful result, identify that this write request completes, wait for request next time; If write operation failure, Telefile server remotefsserver obtains the rreturn value of operation failure, and the misdata of reading abandoned, embedded file system EFS abandons this write operation, waits for request next time.
In said process, if primary processor 101 according to write request can not to in-line memory 100 carry out write operation or the write operation time longer time, now complete the write operation to in-line memory emmc100 by the timing ping-pong synchronous operation of primary processor 101 couples of in-line memory emmc100 and buffer ram103.Such as, what receive request is set to 1S from processor 102 by the time of this operation, if remote write operation no more than 1S consuming time, then the subregion 1 of in-line memory 100 is first carried out to the write operation of Remote triggering, then carries out timing synchronization operation to subregion 2; If remote write operation is consuming time more than 1S, then first timing synchronization operation is carried out to the subregion 1 of in-line memory 100, again subregion 2 is carried out to the write operation of Remote triggering, this process enhance system ageing, improve accuracy to in-line memory emmc100 write operation.
When the request of access that embedded file system EFS receives is read request, because shared cache area and in-line memory emmc100 carry out the synchronous operation of timing, data on shared cache area and in-line memory emmc100 are consistent, again by realizing shared cache area and the synchronous operation from processor cache district from processor 102, now embedded file system EFS is from processor cache district read requests data, and stores.Result asks result by with the form informed embed formula file system EFS of rreturn value.
If read operation success, is sent to embedded file system EFS, after embedded file system EFS receives successful result, identifies that this read request completes by result, wait for request next time;
If read operation failure, embedded file system EFS obtains the rreturn value of operation failure, and the error message of reading is abandoned, and embedded file system EFS abandons this operation, waits for request next time.
The system that the embodiment of the present invention provides is by the remote procedure call operation between processor, the ping-pong synchronous operation of shared cache area and in-line memory by stages, and shared cache area and from the timing in processor cache interval or the synchronous operation of triggering, to achieve from the embedded file system of processor the access of in-line memory emmc, ensure that integrality and the security of data.
Embodiment of the present invention system receive from processor the read request that external user or PC send after, according to read request, the directly data of read requests from processor cache district.
The method flow reading data from processor 102 pairs of in-line memorys is comprised: when system starts, synchronous operation is carried out in the by stages of shared cache area and in-line memory, by the data syn-chronization of by stages to shared cache area, again through shared cache area with from the timing of processor cache district or the synchronous operation that triggers, make data syn-chronization in the subregion of in-line memory to from processor cache district, thus when being read, only directly reading from processor cache district from buffer is needed.
A kind of method flow diagram from processor, in-line memory being write to data that Fig. 3 provides for system shown in Figure 1.As shown in Figure 3, during the write request that system acceptance sends to external user or PC, following steps are performed:
Step S301, writes from processor cache district according to the data of write request by request write
Step S302, shared cache area with carry out synchronous operation from processor cache district
Be specially, by realizing shared cache area and the synchronous operation from processor cache district from processor.
Step S303, sends the remote procedure call of write request to primary processor
Be specially, according to write request, embedded file system, by needing the data write writing in-line memory from processor cache district, sends the remote procedure call of write request simultaneously to primary processor.
Step S304, primary processor reads the data of shared cache area, and write in-line memory, returns result
Be specially, primary processor reads the data of shared cache area, and writes in the subregion that in-line memory specifies, by from processor transmission processing rreturn value, triggers callback function informed embed formula file system result, completes the write operation to in-line memory.
The method flow diagram of the another kind reception write request that Fig. 4 provides for system shown in Figure 1, after step S301, when primary processor according to write request can not to in-line memory carry out write operation or the write operation time longer time, enter step S305, by shared cache area and in-line memory timing synchronization operation, by the data syn-chronization of shared cache area to in-line memory.
The system that the embodiment of the present invention provides is by the remote procedure call operation between processor, the ping-pong synchronous operation of shared cache area and in-line memory by stages, and shared cache area and from the timing in processor cache interval or the synchronous operation of triggering, complete from the embedded file system of processor to the accessing operation of in-line memory emmc, this operation not only has ageing.And ensure that integrality and the security of visit data.
Professional should recognize further, in conjunction with unit and the algorithm steps of each example of embodiment disclosed herein description, can realize with electronic hardware, computer software or the combination of the two, in order to the interchangeability of hardware and software is clearly described, generally describe composition and the step of each example in the above description according to function.These functions perform with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.Professional and technical personnel can use distinct methods to realize described function to each specifically should being used for, but this realization should not thought and exceeds scope of the present invention.
The software module that the method described in conjunction with embodiment disclosed herein or the step of algorithm can use hardware, processor to perform, or the combination of the two is implemented.Software module can be placed in the storage medium of other form any known in random access memory (RAM), internal memory, ROM (read-only memory) (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technical field.
Above-described embodiment; object of the present invention, technical scheme and beneficial effect are further described; be understood that; the foregoing is only the specific embodiment of the present invention; the protection domain be not intended to limit the present invention; within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. the remote embedded accumulator system of heterogeneous polynuclear, it is characterized in that, comprise: in-line memory (100), primary processor (101), at least one from processor (102) and buffer (103), wherein
Described at least one from processor (102) for receiving user or PC to the write request of in-line memory (100), and the first data are write described buffer area (103), send described write request by remote procedure call to described primary processor (101) simultaneously, and receive the described process rreturn value that described primary processor (101) sends;
Described primary processor (101) reads according to described write request the second data that described buffer (103) stores, described second data comprise the first data, and described second data read are write described in-line memory (100), described in described process rreturn value being sent to, at least one is from processor (102) simultaneously.
2. system according to claim 1, is characterized in that, described buffer (103) is also for storing described primary processor (101) from described in-line memory (100) timing or through triggering the 3rd data read;
Described at least one from processor (102) also for receiving read request to in-line memory (100);
According to described read request, described at least one from processor (102) from described buffer (103) directly read (100) the 4th data; Described 3rd data comprise described 4th data.
3. system according to claim 1, is characterized in that, described in-line memory (100) comprises at least two subregions;
Described at least two subregions of described buffer (103) to described in-line memory (100) carry out timing ping-pong synchronous operation.
4. system according to claim 1, is characterized in that, described buffer (103) comprises from processor cache district and shared cache area;
Described from processor cache district, for storing at least one described first data write according to described write request from processor (102) described;
Described shared cache area, for storing described primary processor (101) from in-line memory timing or through triggering described 3rd data read;
Wherein, described passing through from processor cache district and described shared cache area carries out timing or the operation of the data syn-chronization through triggering from processor (102); Timing ping-pong synchronous operation is carried out to described in-line memory (100) in described shared cache area.
5. system according to claim 1, is characterized in that, described at least one comprise embedded file system and Telefile client from processor (102);
Described embedded file system is for receiving the outside described read-write requests sent, and send described write request to described Telefile client, according to described write request to described from described first data of processor cache district write, and read described four data from described from processor cache district according to described read request;
The described write request that described Telefile client sends for receiving described embedded file system, and described write request is sent to described primary processor (101).
6. system according to claim 1, it is characterized in that, by the described call back function from processor (102), the described process rreturn value that described primary processor (101) sends notifies that whether write operation described in described embedded file system is successful.
7. system according to claim 1, is characterized in that, if described embedded file system reads data failure from from processor cache district, described embedded file system is abandoned this operation and waited for request next time.
8. a method for the remote embedded storer of heterogeneous polynuclear, is characterized in that, comprise,
At least one receives user or PC to the write request of in-line memory from processor, and by the first data write buffer, sends described write request by remote procedure call to described primary processor simultaneously;
Primary processor reads the second data of buffer storage according to described write request, described second data comprise described first data, and the described data read are write described in-line memory, described in described process rreturn value being sent to, at least one is from processor simultaneously.
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