CN105282087B - A kind of method, apparatus and circuit of the compensation of order modulated data symbol phase - Google Patents
A kind of method, apparatus and circuit of the compensation of order modulated data symbol phase Download PDFInfo
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- CN105282087B CN105282087B CN201410307565.4A CN201410307565A CN105282087B CN 105282087 B CN105282087 B CN 105282087B CN 201410307565 A CN201410307565 A CN 201410307565A CN 105282087 B CN105282087 B CN 105282087B
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Abstract
The invention discloses a kind of methods of order modulated data symbol phase compensation, comprising: receives frequency pilot sign and data symbol；Estimated by the frequency pilot sign, obtains phase error；Phase compensation is carried out to the data symbol with the phase error, obtains compensated data symbol；Send the compensated data symbol.The invention also discloses the devices and circuit of a kind of compensation of order modulated data symbol phase.Using technical solution provided by the invention, solution code error is reduced by phase compensation, when high s/n ratio scene uses 64QAM modulation system, the HSPA+ system performance of same throughput has obtained larger promotion.
Description
Technical field
The invention belongs to the communications field more particularly to a kind of method of order modulated data symbol de-maps phase compensation,
Device and circuit.
Background technique
With WCDMA (Wireless Code Division Multiple Access, wireless code division multiple address access) system
(High-speed packet Access Evolution, high-speed packet access evolution to HSPA+, use " HSPA+ " below in system
Indicate HSPA evolution) technology research and development, in 3GPP (3rd Generation Partnership Project, third
For partner program) 64QAM (Quadrature Amplitude Modulation, quadrature in phase are introduced in R7 version
Amplitude modulation) technology.In order to further increase the transmission rate of wireless communication system, high-order modulating is widely used logical
In letter system.It in 64QAM planisphere, is spatially approached between constellation point, only very small angle interval.Such as Fig. 1
The angle interval of constellation point is down to 9.46 degree in shown 64QAM planisphere.
The structural schematic diagram of the side UE HSPA+ receiver is as shown in Figure 2.Usual channel estimation is mentioned using average filter
The quality of its high estimation.In low Doppler effect, since channel variation is slow, filter can provide average value.It should
Characteristic is particularly critical to 64QAM, because the performance is very sensitive to channel quality.Generally, the group delay under Doppler effect
It is higher under low Doppler effect scene, it is smaller under high-doppler effect scene.
In the receiver design, the time delay that the Filter delay of channel estimation must be handled in receivers with signal is (when pre-
Prolong) it is equal；Otherwise despread symbols have phase error.Group delay in channel estimation filters is related with Doppler effect, filter
Wave device group delay and pre- time delay can not be essentially equal.Phase rotation is the function for receiving signal frequency shift, the frequency shift (FS)
It is the modified output of closed loop frequency.In view of channel estimation and the unmatched order of magnitude of data delay, even if the frequency of very little is missed
Difference also can bring very big phase error in the despread data symbols that receiver exports.
Phase error: the π * f* Δ of θ=2 t
Delay inequality: Δ t=channel estimation filters group delay-pre- time delay
Phase error on the data symbol can bring greatly solution code error in the very small 64QAM in angle interval,
Therefore lead to degradation.For example, 5-7HZ root mean square frequency error can bring the phase of 4-5 degree to revolve in low Doppler effect
Turn error.The step-length about 10-12HZ of oscillator frequency control at present, bring phase error can reach 9 degree.
Summary of the invention
In view of this, it is an object of the present invention to provide a kind of methods of order modulated data symbol phase compensation, dress
It sets and circuit, by carrying out phase compensation before symbol de-maps to reduce solution code error.For the embodiment to disclosure
Some aspects have a basic understanding, simple summary is shown below.The summarized section is not extensive overview, also not
It is key/critical component to be determined or the protection scope for describing these embodiments.Its sole purpose is with simple form
Some concepts are presented, in this, as the preamble of following detailed description.
A kind of method of order modulated data symbol phase compensation provided by the invention, comprising:
Receive frequency pilot sign and data symbol；
The frequency pilot sign is estimated by following methods, obtains phase error:
Conjugation is taken to the frequency pilot sign, obtains result a；Or demultiplexing long to the frequency pilot sign modulus, obtains result
b；The result a and the result b are divided by, the phase error is obtained；Or
Or demultiplexing long to the frequency pilot sign modulus, obtains result c；The frequency pilot sign and the result c are carried out
It is divided by, obtains result e；The result e is taken into conjugation again, obtains the phase error；
Phase compensation is carried out to the data symbol with the phase error, obtains compensated data symbol；
Send the compensated data symbol.
Wherein, phase compensation is carried out to the data symbol with the phase error, specifically included:
The phase error is multiplied with the data symbol.
More appropriately, described by before estimating frequency pilot sign, further includes:
The frequency pilot sign is filtered, filtered frequency pilot sign is obtained.
The method of another kind order modulated data symbol phase compensation provided by the invention, comprising:
Receive frequency pilot sign and data symbol；
The frequency pilot sign is estimated by following step, obtains phase error:
Or demultiplexing long to the frequency pilot sign modulus, obtains result c；
The frequency pilot sign d and the result c are divided by, phase error is obtained；
Or demultiplexing long to the frequency pilot sign modulus, obtains result c；The frequency pilot sign and the result c are carried out
It is divided by, obtains phase error；
Phase compensation is carried out to the data symbol with the phase error, obtains compensated data symbol；
Send the compensated data symbol.
Wherein, described that phase compensation is carried out to the data symbol with the phase error, it specifically includes: by the number
It is divided by according to symbol and the phase error.
More appropriately, before being estimated by the frequency pilot sign, further includes:
The frequency pilot sign is filtered, filtered frequency pilot sign is obtained.
Wherein, frequency pilot sign is the frequency pilot sign after despreading, and the data symbol is the data symbol after despreading, described
Compensated data symbol is used for symbol de-maps.
The present invention also provides a kind of devices of order modulated data symbol phase compensation, comprising:
Receiving unit, for receiving frequency pilot sign and data symbol；
Estimation unit, for obtaining phase error by estimating the frequency pilot sign；
The estimation unit specifically includes conjugate operation module, modulus Long operation module and division arithmetic module, wherein
Conjugate operation module obtains result a for taking conjugation to the frequency pilot sign；
Modulus Long operation module, for obtaining result b to the frequency pilot sign modulus length or demultiplexing；With,
Division arithmetic module obtains the phase error for the result a and the result b to be divided by；
Phase compensation unit carries out phase compensation to the data symbol for the phase error, obtains compensated
Data symbol.
Wherein, phase compensation unit specifically includes:
Multiplier module, for the phase error to be multiplied with the data symbol, obtained compensated data
Symbol.
The device further include:
Filter cell, for according with the pilot tone before the estimation unit estimates the frequency pilot sign
It number is filtered, obtains filtered frequency pilot sign.
The device of another kind order modulated data symbol phase compensation provided by the invention, comprising:
Receiving unit, for receiving frequency pilot sign and data symbol；
Estimation unit, for obtaining phase error by estimating the frequency pilot sign；
The estimation unit specifically includes modulus Long operation module, conjugate operation module and division arithmetic module, wherein
Modulus Long operation module obtains result c for the modulus length or demultiplexing to the frequency pilot sign；
Division arithmetic module, for the frequency pilot sign and the result c to be divided by, the result e being divided by；
With,
Conjugate operation module obtains phase error for taking conjugation to the result e；
Phase compensation unit carries out phase compensation to the data symbol for the phase error, obtains compensated
Data symbol.
Wherein, phase compensation unit specifically includes:
Multiplier module, for the phase error to be multiplied with the data symbol, obtained compensated data
Symbol.
The device, further includes:
Filter cell, for according with the pilot tone before the estimation unit estimates the frequency pilot sign
It number is filtered, obtains filtered frequency pilot sign.
The device of another order modulated data symbol phase compensation provided by the invention, comprising:
Receiving unit, for receiving frequency pilot sign and data symbol；
Estimation unit, for obtaining phase error by estimating the frequency pilot sign；
The estimation unit, specifically includes:
Modulus Long operation module obtains result c for the modulus length or demultiplexing to the frequency pilot sign；
Division arithmetic module obtains phase error for the frequency pilot sign and the result c to be divided by；
Phase compensation unit carries out phase compensation to the data symbol for the phase error, obtains compensated
Data symbol.
Wherein, phase compensation unit specifically includes:
Dividing module, for the data symbol and the phase error to be divided by, obtained compensated data
Symbol.
The device, further includes:
Filter cell, for according with the pilot tone before the estimation unit estimates the frequency pilot sign
It number is filtered, obtains filtered frequency pilot sign.
Filtering in the device is the one of which in low-pass filtering, high-pass filtering or bandpass filtering.
Wherein, frequency pilot sign is the frequency pilot sign after despreading, and the data symbol is the data symbol after despreading, described
Compensated data symbol is used for symbol de-maps.
The present invention provides a kind of circuit of order modulated data symbol phase compensation, comprising: conjugator, die lifter, division
Device and multiplier, wherein
Frequency pilot sign is inputted from the input terminal of the conjugator and the die lifter respectively；
The output end of the conjugator and the die lifter is connected with the input terminal of divider respectively；
The output end of the divider is connected with the input terminal of the multiplier；
Data symbol is inputted from the input terminal of the multiplier, and the output end of the multiplier exports compensated data
Symbol.
The present invention provides the circuit of another order modulated data symbol phase compensation, comprising: die lifter, is total to divider
Yoke device multiplier, wherein
Frequency pilot sign is inputted from the input terminal of the divider, the die lifter respectively；
The output end of the die lifter is connected with another input terminal of the trigger,
The output end of the divider is connected with the input terminal of conjugator；
The output end of the conjugator is connected with the input terminal of the multiplier；
Data symbol is inputted from another input terminal of the multiplier, after the output end output compensation of the multiplier
Data symbol.
The circuit of another order modulated data symbol phase compensation provided by the invention, comprising: die lifter, first remove
Musical instruments used in a Buddhist or Taoist mass and the second divider, wherein
Frequency pilot sign respectively from the input terminal input of the die lifter and first divider, the die lifter
Output end is connected with another input terminal of first divider；
The output end of first divider is connected with the input terminal of second divider；
Data symbol is inputted from another input terminal of second divider, and the output end of second divider is defeated
Compensated data symbol out.
The circuit of another order modulated data symbol phase provided by the invention compensation, comprising: filter, conjugator,
Die lifter, divider and multiplier, wherein
Input signal includes frequency pilot sign and data symbol；The input terminal of the frequency pilot sign from the filter is defeated
Enter, the output end of the filter is connected with the input terminal of the conjugator, the die lifter respectively；
The conjugator, the die lifter output end be connected respectively with the input terminal of divider；
The output end of the divider is connected with the input terminal of the multiplier；
The data symbol is inputted from the input terminal of the multiplier, and the output end output of the multiplier is compensated
Data symbol.
The circuit of another order modulated data symbol phase provided by the invention compensation, comprising: filter, die lifter,
Divider, conjugator and multiplier, wherein
Frequency pilot sign from the input terminal input of the filter, the output end of the filter respectively with the division
Device, the input terminal of the die lifter are connected；
Filtered frequency pilot sign is inputted from the input terminal of the divider；
The output end of the die lifter is connected with another input terminal of the divider；
The output end of the divider is connected with the input terminal of conjugator；
The output end of the conjugator is connected with the input terminal of the multiplier；
Data symbol is inputted from another input terminal of the multiplier, after the output end output compensation of the multiplier
Data symbol.
The circuit of another order modulated data symbol phase provided by the invention compensation, comprising: filter, die lifter,
First divider and the second divider, wherein
Frequency pilot sign is from the input terminal input of the filter, and the output end of the filter is respectively with described first
Divider, the input terminal of the die lifter are connected；
The output end of the die lifter is connected with another input terminal of first divider；
The output end of first divider is connected with the input terminal of the second divider；
Data symbol is inputted from another input terminal of second divider, and the output end of second divider is defeated
Compensated data symbol out.
Using method, apparatus and circuit of the invention, there is following effect:
Pass through phase compensation, when high s/n ratio scene uses 64QAM modulation system, the HSPA+ system of same throughput
Performance has obtained larger promotion.
For the above and related purposes, one or more embodiments include being particularly described below and wanting in right
The feature particularly pointed out in asking.Certain illustrative aspects are described in detail in the following description and the annexed drawings, and its instruction is only
It is some modes in the utilizable various modes of principle of each embodiment.Other benefits and novel features will be with
Below detailed description be considered in conjunction with the accompanying and become obvious, the disclosed embodiments be all such aspects to be included with
And they are equal.
Figure of description
Fig. 1 is the schematic diagram of 64QAM planisphere in the prior art；
Fig. 2 is the structural schematic diagram of the side UE HSPA+ receiver；
Fig. 3 is a kind of method flow diagram for order modulated data symbol phase compensation that the embodiment of the present invention one provides；
Fig. 4 is the method flow diagram of another order modulated data symbol phase compensation provided by Embodiment 2 of the present invention；
Fig. 5 is that a kind of structure of the circuit for order modulated data symbol phase compensation that the embodiment of the present invention five provides is shown
It is intended to；
Fig. 6 is Fig. 5 by simplified phase compensation logic circuit diagram；
Fig. 7 is that a kind of structure of the circuit for order modulated data symbol phase compensation that the embodiment of the present invention seven provides is shown
It is intended to；
Fig. 8 is that a kind of structure of the circuit for order modulated data symbol phase compensation that the embodiment of the present invention eight provides is shown
It is intended to；
Fig. 9 is the structural schematic diagram of the side UE HSPA+ receiver；
Figure 10 is that a kind of structure of the circuit for order modulated data symbol phase compensation that the embodiment of the present invention nine provides is shown
It is intended to；
Figure 11 is the structural schematic diagram that Figure 10 passes through simplified phase compensation logic circuit；
Figure 12 is a kind of structure of the circuit for order modulated data symbol phase compensation that the embodiment of the present invention 11 provides
Schematic diagram；
Figure 13 is the structural schematic diagram that Figure 12 passes through simplified phase compensation logic circuit；
Figure 14 is a kind of structure of the circuit for order modulated data symbol phase compensation that the embodiment of the present invention 13 provides
Schematic diagram；
Figure 15 is the structural schematic diagram that Figure 14 passes through simplified phase compensation logic circuit；
Figure 16 is the structural schematic diagram for showing the side the UE HSPA+ receiver of other phase corrections or compensation point；
Figure 17 is a kind of device signal for order modulated data symbol phase compensation that the embodiment of the present invention 15 provides
Figure；
Figure 18 is the schematic device for the estimation unit that the embodiment of the present invention 15 provides；
Figure 19 is the schematic device for the phase compensation unit that the embodiment of the present invention 15 provides；
Figure 20 is the schematic device for another estimation unit that the embodiment of the present invention 16 provides；
Figure 21 is the schematic device for another estimation unit that the embodiment of the present invention 17 provides；
Figure 22 is the schematic device for another phase compensation unit that the embodiment of the present invention 17 provides；
Figure 23 is a kind of device signal for order modulated data symbol phase compensation that the embodiment of the present invention 18 provides
Figure.
Specific embodiment
The following description and drawings fully show specific embodiments of the present invention, so that those skilled in the art's energy
Enough practice them.Other embodiments may include structure, logic, it is electrical, process and other change.It is real
It applies example and only represents possible variation.Unless explicitly requested, otherwise individual component and function are optional, and are operated suitable
Sequence can change.The part of some embodiments and feature can be included in or replace part and the spy of other embodiments
Sign.The range of embodiment of the present invention includes that the entire scope of claims and all of claims can get
Equivalent.Herein, these embodiments of the invention individually or can be indicated generally with term " invention ",
This is not meant to automatically limit the application just for the sake of convenient, and if in fact disclosing the invention more than one
Range is any single invention or inventive concept.
Embodiment one
As shown in figure 3, the embodiment of the present invention one provides a kind of method of order modulated data symbol phase compensation, packet
Include following steps:
Step S11 receives frequency pilot sign and data symbol；
Step S12 is estimated by the frequency pilot sign, obtains phase error；
Step S13 carries out phase compensation to the data symbol with the phase error, obtains compensated data symbols
Number；
Step S14 sends the compensated data symbol.
Preferably, step S12 specifically includes the following steps:
Step S121 takes conjugation to the frequency pilot sign, obtains result a；
The step is specific it is to be understood that conjugation is taken to the complex signal of the frequency pilot sign, or, according with to the pilot tone
Number complex exponential signal take conjugation, or, taking conjugation to the vector signal of the frequency pilot sign.Complex signal take Conjugated Equivalence in
Complex exponential signal takes conjugation, is also equivalent to the constant argument of vector signal amplitude and negates.
Step S122, or demultiplexing long to the frequency pilot sign modulus, obtains result b；
The result a and the result b are divided by, obtain the phase error by step S123.
Phase error is calculated, formula as follows:
When the value of phase error is less than 10 degree, mould length can be approximately equal to the value of real part:
|filter(desp_pilot_sym)|Real | filter (desp_pilot_sym) |, S232 pairs of step at this time
Frequency pilot sign obtains real part using demultiplexing.
Preferably, step S13 specifically includes the following steps:
The phase error is multiplied with the data symbol, obtains compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Embodiment two
As shown in figure 4, second embodiment of the present invention provides the method for another order modulated data symbol phase compensation,
The following steps are included:
Step S21 receives frequency pilot sign and data symbol；
The frequency pilot sign is filtered by step S22, obtains filtered frequency pilot sign；
Preferably, the filtering can be one of low-pass filtering, high-pass filtering or bandpass filtering.
Step S23 is estimated by filtered frequency pilot sign, obtains phase error；
Step S24 carries out phase compensation to the data symbol with the phase error, obtains compensated data symbols
Number；
Step S25 sends the compensated data symbol.
Preferably, step S23, specifically includes the following steps:
Step S231 takes conjugation to filtered frequency pilot sign, obtains result a；
Step S232, or demultiplexing long to filtered frequency pilot sign modulus, obtains result b；
The result a and the result b are divided by, obtain the phase error by step S233.
Preferably, step S24 specifically includes the following steps:
The phase error is multiplied with the data symbol, obtains compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Embodiment three
As shown in figure 4, the embodiment of the present invention three provides the method for another order modulated data symbol phase compensation,
The following steps are included:
Step S21 receives frequency pilot sign and data symbol；
The frequency pilot sign is filtered by step S22, obtains filtered frequency pilot sign；
Preferably, the filtering can be the one of which in low-pass filtering, high-pass filtering or bandpass filtering.
Step S23 is estimated by filtered frequency pilot sign, obtains phase error；
Step S24 carries out phase compensation to the data symbol with the phase error, obtains compensated data symbols
Number；
Step S25 sends the compensated data symbol.
Preferably, step S23, specifically includes the following steps:
Step S231, or demultiplexing long to the frequency pilot sign modulus, obtains result c；
The frequency pilot sign d and the result c are divided by by step S232, the result e being divided by；
The result e is taken conjugation again, obtains the phase error by step S233.
Preferably, step S24 specifically includes the following steps:
The phase error is multiplied with the data symbol, obtains compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Example IV
As shown in figure 4, the embodiment of the present invention three provides the method for another order modulated data symbol phase compensation,
The following steps are included:
Step S21 receives frequency pilot sign and data symbol；
The frequency pilot sign is filtered by step S22, obtains filtered frequency pilot sign；
Preferably, the filtering can be one of low-pass filtering, high-pass filtering or bandpass filtering.
Step S23 is estimated by filtered frequency pilot sign, obtains phase error；
Step S24 carries out phase compensation to the data symbol with the phase error, obtains compensated data symbols
Number；
Step S25 sends the compensated data symbol.
Preferably, step S23, specifically includes the following steps:
Step S231, or demultiplexing long to the frequency pilot sign modulus, obtains result c；
The frequency pilot sign d and the result c are divided by, obtain phase error by step S232；
Preferably, step S24 specifically includes the following steps:
The data symbol and the phase error are divided by, compensated data symbol is obtained.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Embodiment five
As shown in figure 5, the embodiment of the present invention five provides a kind of circuit of order modulated data symbol phase compensation, packet
Include: input signal takes conjugator, die lifter, divider, multiplier and output signal, wherein
Input signal includes frequency pilot sign and data symbol；
The frequency pilot sign is inputted from the input terminal of the conjugator, the die lifter respectively；
The output end for taking conjugator, the die lifter is connected with the input terminal of divider respectively；
The output end of the divider is connected with the input terminal of the multiplier；
The data symbol is inputted from the input terminal of the multiplier, the output end output signal output of the multiplier,
The output signal is compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Embodiment six
Die lifter has been used in the logic circuit of embodiment five.In view of the value of phase error theta is possibly less than 10 degree,
Mould length can be approximately equal to real part size, and the logic circuit in such Fig. 5 can be further simplified, as shown in Figure 6.Fig. 6 is Fig. 5
By simplified phase compensation logic circuit.
As shown in fig. 6, the embodiment of the present invention six provides a kind of circuit of order modulated data symbol phase compensation, packet
Include: input signal takes conjugator, demultiplexer, divider, multiplier and output signal, wherein
Input signal includes frequency pilot sign and data symbol；
The frequency pilot sign is inputted from the input terminal of the conjugator, the demultiplexer respectively；
The output end for taking conjugator, the demultiplexer is connected with the input terminal of divider respectively；
The output end of the divider is connected with the input terminal of the multiplier；
The data symbol is inputted from the input terminal of the multiplier, the output end output signal output of the multiplier,
The output signal is compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Embodiment seven
As shown in fig. 7, the embodiment of the present invention seven provides a kind of circuit of order modulated data symbol phase compensation, packet
Include: input signal, filter take conjugator, die lifter, divider, multiplier and output signal, wherein
Input signal includes frequency pilot sign and data symbol；
The frequency pilot sign from the input terminal input of the filter, the output end of the filter respectively with it is described
Conjugator, the input terminal of the die lifter are connected；
The output end for taking conjugator, the die lifter is connected with the input terminal of divider respectively；
The output end of the divider is connected with the input terminal of the multiplier；
The data symbol is inputted from the input terminal of the multiplier, the output end output signal output of the multiplier,
The output signal is compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Embodiment eight
As shown in figure 8, the embodiment of the present invention eight provides a kind of circuit of order modulated data symbol phase compensation, packet
Include: input signal, filter take conjugator, demultiplexer, divider, multiplier and output signal, wherein
Input signal includes frequency pilot sign and data symbol；
The frequency pilot sign from the input terminal input of the filter, the output end of the filter respectively with it is described
Conjugator, the input terminal of the demultiplexer are connected；
The output end for taking conjugator, the demultiplexer is connected with the input terminal of divider respectively；
The output end of the divider is connected with the input terminal of the multiplier；
The data symbol is inputted from the input terminal of the multiplier, the output end output signal output of the multiplier,
The output signal is compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Hereinafter, embodiment nine to embodiment 14 provides several phase compensation schemes, be apply symbol de-maps it
After preceding despreading on data symbol, carry out the phase on estimated data symbol using from the frequency pilot sign after the despreading that receiver comes out
Position error.As shown in Figure 9.
Embodiment nine
As shown in Figure 10, the embodiment of the present invention nine provides a kind of circuit of order modulated data symbol phase compensation, packet
Include: input signal, filter take conjugator, die lifter, divider, multiplier and output signal, wherein
Input signal includes the frequency pilot sign after despreading and the data symbol after despreading；
Input terminal input of the frequency pilot sign from the filter after the despreading, the output end point of the filter
It is not connected with the input terminal of the conjugator, the die lifter；
The output end for taking conjugator, the die lifter is connected with the input terminal of divider respectively；
The output end of the divider is connected with the input terminal of the multiplier；
Data symbol after the despreading is inputted from the input terminal of the multiplier, the output end output of the multiplier
Output signal, the output signal are compensated data symbols, and compensated data symbol is used for symbol de-maps.
Embodiment ten
It is long that modulus has been used in the logic circuit of embodiment nine.In view of the value of phase error theta is possibly less than 10 degree, mould
Length can be approximately equal to real part size, and the logic circuit in such Figure 10 can be further simplified.
As shown in figure 11, the embodiment of the present invention ten provides a kind of circuit of order modulated data symbol phase compensation, packet
Include: input signal, filter take conjugator, demultiplexer, divider, multiplier and output signal, wherein
Input signal includes the frequency pilot sign after despreading and the data symbol after despreading；
Input terminal input of the frequency pilot sign from the filter after the despreading, the output end point of the filter
It is not connected with the input terminal of the conjugator, the demultiplexer；
The output end for taking conjugator, the demultiplexer is connected with the input terminal of divider respectively；
The output end of the divider is connected with the input terminal of the multiplier；
Data symbol after the despreading is inputted from the input terminal of the multiplier, the output end output of the multiplier
Output signal, the output signal are compensated data symbols, and the compensated data symbol is used for symbol de-maps.
Embodiment 11
As shown in figure 12, the embodiment of the present invention 11 provides a kind of circuit of order modulated data symbol phase compensation,
Include: input signal, filter, take conjugator, die lifter, divider, multiplier and output signal, wherein
Input signal includes the frequency pilot sign after despreading and the data symbol after despreading；
Input terminal input of the filtered frequency pilot sign from the filter, the output end point of the filter
It is not connected with the input terminal of the divider, the die lifter；
The filtered frequency pilot sign is inputted from the input terminal of the divider；The output end of the die lifter and institute
Another input terminal for stating divider is connected；
The output end of the divider is connected with the input terminal of conjugator；
The output end of the conjugator is connected with the input terminal of the multiplier；
Data symbol after the despreading is inputted from another input terminal of the multiplier, the output of the multiplier
Output signal output is held, the output signal is compensated data symbol.
Embodiment 12
It is long that modulus has been used in the logic circuit of embodiment 11.In view of the value of phase error theta is possibly less than 10
Degree, mould length can be approximately equal to real part size, and the logic circuit in such Figure 12 can be further simplified.
As shown in figure 13, the embodiment of the present invention 12 provides a kind of circuit of order modulated data symbol phase compensation,
Include: input signal, filter, take conjugator, demultiplexer, divider, multiplier and output signal, wherein
Input signal includes the frequency pilot sign after despreading and the data symbol after despreading；
Input terminal input of the filtered frequency pilot sign from the filter, the output end point of the filter
It is not connected with the input terminal of the divider, the demultiplexer；
The filtered frequency pilot sign is inputted from the input terminal of the divider；The output end of the demultiplexer with
Another input terminal of the divider is connected；
The output end of the divider is connected with the input terminal of conjugator；
The output end of the conjugator is connected with the input terminal of the multiplier；
Data symbol after the despreading is inputted from another input terminal of the multiplier, the output of the multiplier
Output signal output is held, the output signal is compensated data symbol.
Embodiment 13
As shown in figure 14, the embodiment of the present invention 13 provides a kind of circuit of order modulated data symbol phase compensation,
It include: input signal, filter, die lifter, the first divider, the second divider and output signal, wherein
Input signal includes the frequency pilot sign after despreading and the data symbol after despreading；
Input terminal input of the frequency pilot sign from the filter after the despreading, the output end point of the filter
It is not connected with the input terminal of first divider, the die lifter；
The output end of the die lifter is connected with another input terminal of first divider；
The output end of first divider is connected with the input terminal of the second divider；
Data symbol after the despreading is inputted from another input terminal of second divider, second division
The output end output signal output of device, the output signal are compensated data symbols.
Embodiment 14
It is long that modulus has been used in the logic circuit of embodiment 13.In view of the value of phase error theta is possibly less than 10
Degree, mould length can be approximately equal to real part size, and the logic circuit in such Figure 14 can be further simplified.
As shown in figure 15, the embodiment of the present invention 14 provides a kind of circuit of order modulated data symbol phase compensation,
It include: input signal, filter, demultiplexer, the first divider, the second divider and output signal, wherein
Input signal includes the frequency pilot sign after despreading and the data symbol after despreading；
Input terminal input of the frequency pilot sign from the filter after the despreading, the output end point of the filter
It is not connected with the input terminal of first divider, the demultiplexer；
The output end of the demultiplexer is connected with another input terminal of first divider；
The output end of first divider is connected with the input terminal of the second divider；
Data symbol after the despreading is inputted from another input terminal of second divider, second division
The output end output signal output of device, the output signal are compensated data symbols.
Filter has been used in the logic circuit of above-mentioned several embodiments, has been mainly used for filtering out the noise in signal, has been made
For optional mode, specifically can be used such as high-pass filter, bandpass filter, low-pass filtering or without using filter etc..
It has been used in above-mentioned logic circuit and has taken conjugator, be mainly used for directly obtaining the phase angle for needing to compensate, avoid
Derivation frequency phase angle and other complex calculations reduce circuit and realize difficulty.
Multiplier has been used in above-mentioned logic circuit, has been mainly used for phase error and the data symbol phase after despreading
Multiply, to correct or compensate the data symbol after despreading.
The phase compensation scheme of above-described embodiment nine to embodiment 14 is the despreading applied before symbol de-maps
Six citings on data symbol afterwards.Preferably, the program, which is also applicable on other nodes, carries out phase correction or compensation,
As shown in figure 16.Figure 16 is other phase corrections or compensation point.
1, channel estimation input
2, at channel estimation output
3, predelay input
4, at predelay output
5, before being de-spread in senior receiver
A kind of technical solution of order modulated data symbol phase compensation provided by the invention is applied on other nodes
Situation, also within that scope of the present invention.
Embodiment 15
In order to realize the above method, the embodiment of the present invention 15 provides a kind of order modulated data symbol phase compensation
Device, as shown in figure 17, comprising:
Receiving unit 11, for receiving frequency pilot sign and data symbol；
Estimation unit 12 obtains phase error for being estimated by the frequency pilot sign；
Phase compensation unit 13 carries out phase compensation to the data symbol for the phase error, after obtaining compensation
Data symbol.
Preferably, as shown in figure 18, the estimation unit 12 specifically includes:
Conjugate operation units 21 obtain result a for taking conjugation to the frequency pilot sign；
Modulus Long operation unit 22, for obtaining result b to the frequency pilot sign modulus length or demultiplexing；With,
Division arithmetic unit 23 obtains the phase error for the result a and the result b to be divided by.
Preferably, as shown in figure 19, the phase compensation unit 13 specifically includes:
Multiplication unit 31, for the phase error to be multiplied with the data symbol, obtained compensated number
According to symbol；
Transmission unit 32, for sending the compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Embodiment 16
In order to realize the above method, the embodiment of the present invention 16 provides a kind of order modulated data symbol phase compensation
Device, as shown in figure 17, comprising:
Receiving unit 11, for receiving frequency pilot sign and data symbol；
Estimation unit 12 obtains phase error for being estimated by the frequency pilot sign；
Phase compensation unit 13 carries out phase compensation to the data symbol for the phase error, after obtaining compensation
Data symbol.
Preferably, as shown in figure 20, the estimation unit 12 specifically includes:
Modulus Long operation unit 41, for obtaining result c to the frequency pilot sign modulus length or demultiplexing；
Division arithmetic unit 42, for the frequency pilot sign d and the result c to be divided by, the knot being divided by
Fruit；With,
Conjugate operation units 43 obtain phase error for taking conjugation to the result being divided by.
Preferably, as shown in figure 19, the phase compensation unit 13 specifically includes:
Multiplication unit 31, for the phase error to be multiplied with the data symbol, obtained compensated number
According to symbol；
Transmission unit 32, for sending the compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Embodiment 17
In order to realize the above method, the embodiment of the present invention 17 provides a kind of order modulated data symbol phase compensation
Device, as shown in figure 17, comprising:
Receiving unit 11, for receiving frequency pilot sign and data symbol；
Estimation unit 12 obtains phase error for being estimated by the frequency pilot sign；
Phase compensation unit 13 carries out phase compensation to the data symbol for the phase error, after obtaining compensation
Data symbol.
Preferably, as shown in figure 21, the estimation unit 12 specifically includes:
Modulus Long operation unit 51, for obtaining result c to the frequency pilot sign modulus length or demultiplexing；
Division arithmetic unit 52 obtains phase error for the frequency pilot sign d and the result c to be divided by；
Preferably, as shown in figure 22, the phase compensation unit 13 specifically includes:
Divider 61, for the data symbol and the phase error to be divided by, obtained compensated number
According to symbol；
Transmission unit 62, for sending the compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Embodiment 18
In order to realize the above method, the embodiment of the present invention 18 provides a kind of order modulated data symbol phase compensation
Device, as shown in figure 23, comprising:
Receiving unit 71, for receiving frequency pilot sign and data symbol；
Filter cell 72 obtains filtered frequency pilot sign for the frequency pilot sign to be filtered；
Estimation unit 73 obtains phase error for being estimated by the frequency pilot sign；
Phase compensation unit 74 carries out phase compensation to the data symbol for the phase error, after obtaining compensation
Data symbol.
Preferably, as shown in figure 18, the estimation unit 73 specifically includes:
Conjugate operation units 21 obtain result a for taking conjugation to the filtered frequency pilot sign；
Modulus Long operation unit 22, for obtaining result b to the filtered frequency pilot sign modulus length or demultiplexing；
With,
Division arithmetic unit 23 obtains the phase error for the result a and the result b to be divided by.
Preferably, as shown in figure 19, the phase compensation unit 44 specifically includes:
Multiplication unit 31, for the phase error to be multiplied with the data symbol, obtained compensated number
According to symbol；
Transmission unit 32, for sending the compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Embodiment 19
In order to realize the above method, the embodiment of the invention provides a kind of dresses of order modulated data symbol phase compensation
It sets, as shown in figure 23, comprising:
Receiving unit 71, for receiving frequency pilot sign and data symbol；
Filter cell 72 obtains filtered frequency pilot sign for the frequency pilot sign to be filtered；
Estimation unit 73 obtains phase error for being estimated by the frequency pilot sign；
Phase compensation unit 74 carries out phase compensation to the data symbol for the phase error, after obtaining compensation
Data symbol.
Preferably, as shown in figure 20, the estimation unit 12 specifically includes:
Modulus Long operation unit 41, for obtaining result c to the filtered frequency pilot sign modulus length or demultiplexing；
Division arithmetic unit 42 obtains phase for the filtered frequency pilot sign d and result c to be divided by
The result removed；With,
Conjugate operation units 43 obtain phase error for taking conjugation to the result being divided by.
Preferably, as shown in figure 19, the phase compensation unit 44 specifically includes:
Multiplication unit 31, for the phase error to be multiplied with the data symbol, obtained compensated number
According to symbol；
Transmission unit 32, for sending the compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Embodiment 20
In order to realize the above method, the embodiment of the invention provides a kind of dresses of order modulated data symbol phase compensation
It sets, as shown in figure 23, comprising:
Receiving unit 71, for receiving frequency pilot sign and data symbol；
Filter cell 72 obtains filtered frequency pilot sign for the frequency pilot sign to be filtered；
Estimation unit 73 obtains phase error for being estimated by the frequency pilot sign；
Phase compensation unit 74 carries out phase compensation to the data symbol for the phase error, after obtaining compensation
Data symbol.
Preferably, as shown in figure 20, the estimation unit 12 specifically includes:
Modulus Long operation unit 41, for obtaining result c to the filtered frequency pilot sign modulus length or demultiplexing；
Division arithmetic unit 42 obtains phase for the filtered frequency pilot sign d and result c to be divided by
Position error；
Preferably, as shown in figure 22, the phase compensation unit 44 specifically includes:
Divider 61, for the data symbol and the phase error to be divided by, obtained compensated number
According to symbol；
Transmission unit 62, for sending the compensated data symbol.
Preferably, the frequency pilot sign is the frequency pilot sign after despreading, the data symbol is the data symbols after despreading
Number, the compensated data symbol is used for symbol de-maps.
Using method, apparatus used by the embodiment of the present invention and circuit, by carrying out phase before symbol de-maps
Compensation is to reduce solution code error, when high s/n ratio scene uses 64QAM modulation system, the HSPA+ system of same throughput
Performance has obtained larger promotion.
Unless otherwise specific statement, term is such as handled, is calculated, operation, determination, display etc. can refer to one or more
Multiple processing or the movement and/or process of computing system or similar devices, the movement and/or process will be indicated as handling
It the data manipulation of the register of system or physics (such as electronics) amount in memory and is converted into and is similarly represented as processing system
Memory, register or the storage of other this type of information of system emit or show the other data of physical quantity in equipment.
Any one of a variety of different technology and methods can be used to indicate in information and signal.For example, being retouched through above
Data, instruction, order, information, signal, bit, symbol and the chip referred in stating can use voltage, electric current, electromagnetic wave, magnetic
Or particle, light field or particle or any combination thereof indicate.
It should be understood that the particular order or level of the step of during disclosed are the examples of illustrative methods.Based on setting
Count preference, it should be appreciated that in the process the step of particular order or level can be in the feelings for the protection scope for not departing from the disclosure
It is rearranged under condition.Appended claim to a method is not illustratively sequentially to give the element of various steps, and not
It is to be limited to the particular order or level.
In above-mentioned detailed description, various features are combined together in single embodiment, to simplify the disclosure.
This published method should not be construed to reflect such intention, that is, the embodiment of theme claimed needs
The more features of the feature clearly stated in each claim.On the contrary, as appended claims is reflected
Like that, the present invention is in the state fewer than whole features of disclosed single embodiment.Therefore, the attached claims
Book is hereby expressly incorporated into detailed description, and wherein each claim is alone as the individual preferred implementation side of the present invention
Case.
It should also be appreciated by one skilled in the art that various illustrative logical boxs, mould in conjunction with the embodiments herein description
Electronic hardware, computer software or combinations thereof may be implemented into block, circuit and algorithm steps.In order to clearly demonstrate hardware
Interchangeability between software, above to various illustrative components, frame, module, circuit and step surround its function into
It has gone and has been generally described.Hardware is implemented as this function and is also implemented as software, depends on specific application and to whole
The design constraint that a system is applied.Those skilled in the art can be directed to each specific application, real in a manner of flexible
Existing described function, still, this realization decision should not be construed as a departure from the scope of protection of this disclosure.
The step of method in conjunction with described in the embodiments herein or algorithm, can be embodied directly in hardware, by processor
Software module of execution or combinations thereof.Software module can be located at RAM memory, flash memory, ROM memory, eprom memory,
The storage of eeprom memory, register, hard disk, mobile disk, CD-ROM or any other form well known in the art is situated between
In matter.A kind of illustrative storage medium is connected to processor, thus enable a processor to from the read information,
And information can be written to the storage medium.Certainly, storage medium is also possible to the component part of processor.Processor and storage
Medium can be located in ASIC.The ASIC can be located in user terminal.Certainly, pocessor and storage media can also be used as
Discrete assembly is present in user terminal.
For software implementations, technology described in this application can be with the module of the herein described function of execution (for example, mistake
Journey, function etc.) Lai Shixian.These software codes can store in memory cell and be executed by processor.Memory cell can
To realize in processor, also may be implemented outside the processor, in the latter case, it is via various means with communication party
Formula is coupled to processor, these are all well known in the art.
Description above includes the citing of one or more embodiments.Certainly, in order to describe above-described embodiment and description portion
The all possible combination of part or method is impossible, but it will be appreciated by one of ordinary skill in the art that each implementation
Example can do further combinations and permutations.Therefore, embodiment described herein is intended to cover fall into the appended claims
Protection scope in all such changes, modifications and variations.In addition, with regard to art used in specification or claims
The mode that covers of language "comprising", the word is similar to term " includes ", just as " including " it is used as transitional word in the claims
As explaining.In addition, the use of any one of specification in claims term "or" being to indicate " non-
It is exclusive or ".
Claims (30)
1. a kind of method of order modulated data symbol phase compensation characterized by comprising
Receive frequency pilot sign and data symbol；
The frequency pilot sign is estimated by following methods, obtains phase error:
Conjugation is taken to the frequency pilot sign, obtains result a；Or demultiplexing long to the frequency pilot sign modulus, obtains result b；It will
The result a is divided by with the result b, obtains the phase error；Or
Or demultiplexing long to the frequency pilot sign modulus, obtains result c；The frequency pilot sign and the result c are divided by,
Obtain result e；The result e is taken into conjugation again, obtains the phase error；
Phase compensation is carried out to the data symbol with the phase error, obtains compensated data symbol；
Send the compensated data symbol.
2. the method as described in claim 1, which is characterized in that described to carry out phase to the data symbol with the phase error
Position compensation, specifically includes:
The phase error is multiplied with the data symbol.
3. the method as described in claim 1, which is characterized in that described by also wrapping before estimating frequency pilot sign
It includes:
The frequency pilot sign is filtered, filtered frequency pilot sign is obtained.
4. a kind of method of order modulated data symbol phase compensation characterized by comprising
Receive frequency pilot sign and data symbol；
The frequency pilot sign is estimated by following step, obtains phase error:
Or demultiplexing long to the frequency pilot sign modulus, obtains result c；
The frequency pilot sign d and the result c are divided by, phase error is obtained；
Or demultiplexing long to the frequency pilot sign modulus, obtains result c；The frequency pilot sign and the result c are divided by,
Obtain phase error；
Phase compensation is carried out to the data symbol with the phase error, obtains compensated data symbol；
Send the compensated data symbol.
5. method as claimed in claim 4, which is characterized in that described to carry out phase to the data symbol with the phase error
Position compensation, specifically includes:
The data symbol and the phase error are divided by.
6. method as claimed in claim 4, which is characterized in that before being estimated by the frequency pilot sign, further includes:
The frequency pilot sign is filtered, filtered frequency pilot sign is obtained.
7. method as claimed in claim 4, which is characterized in that the frequency pilot sign is the frequency pilot sign after despreading, the number
According to the data symbol that symbol is after despreading, the compensated data symbol is used for symbol de-maps.
8. a kind of device of order modulated data symbol phase compensation characterized by comprising
Receiving unit, for receiving frequency pilot sign and data symbol；
Estimation unit, for obtaining phase error by estimating the frequency pilot sign；
The estimation unit specifically includes conjugate operation module, modulus Long operation module and division arithmetic module, wherein
Conjugate operation module obtains result a for taking conjugation to the frequency pilot sign；
Modulus Long operation module, for obtaining result b to the frequency pilot sign modulus length or demultiplexing；With,
Division arithmetic module obtains the phase error for the result a and the result b to be divided by；
Phase compensation unit carries out phase compensation to the data symbol for the phase error, obtains compensated data
Symbol.
9. device as claimed in claim 8, which is characterized in that the phase compensation unit specifically includes:
Multiplier module, for the phase error to be multiplied with the data symbol, obtained compensated data symbol.
10. device as claimed in claim 8, which is characterized in that further include:
Filter cell, for carrying out the frequency pilot sign before the estimation unit estimates the frequency pilot sign
Filtering, obtains filtered frequency pilot sign.
11. a kind of device of order modulated data symbol phase compensation characterized by comprising
Receiving unit, for receiving frequency pilot sign and data symbol；
Estimation unit, for obtaining phase error by estimating the frequency pilot sign；
The estimation unit specifically includes modulus Long operation module, conjugate operation module and division arithmetic module, wherein
Modulus Long operation module obtains result c for the modulus length or demultiplexing to the frequency pilot sign；
Division arithmetic module, for the frequency pilot sign and the result c to be divided by, the result e being divided by；With,
Conjugate operation module obtains phase error for taking conjugation to the result e；
Phase compensation unit carries out phase compensation to the data symbol for the phase error, obtains compensated data
Symbol.
12. device as claimed in claim 11, which is characterized in that the phase compensation unit specifically includes:
Multiplier module, for the phase error to be multiplied with the data symbol, obtained compensated data symbol.
13. device as claimed in claim 11, which is characterized in that further include:
Filter cell, for carrying out the frequency pilot sign before the estimation unit estimates the frequency pilot sign
Filtering, obtains filtered frequency pilot sign.
14. a kind of device of order modulated data symbol phase compensation characterized by comprising
Receiving unit, for receiving frequency pilot sign and data symbol；
Estimation unit, for obtaining phase error by estimating the frequency pilot sign；
The estimation unit, specifically includes:
Modulus Long operation module obtains result c for the modulus length or demultiplexing to the frequency pilot sign；
Division arithmetic module obtains phase error for the frequency pilot sign and the result c to be divided by；
Phase compensation unit carries out phase compensation to the data symbol for the phase error, obtains compensated data
Symbol.
15. device as claimed in claim 14, which is characterized in that the phase compensation unit specifically includes:
Dividing module, for the data symbol and the phase error to be divided by, obtained compensated data symbol.
16. device as claimed in claim 14, which is characterized in that further include:
Filter cell, for carrying out the frequency pilot sign before the estimation unit estimates the frequency pilot sign
Filtering, obtains filtered frequency pilot sign.
17. device as claimed in claim 16, which is characterized in that the filter cell is using low-pass filtering, high pass
One of which in filtering or bandpass filtering.
18. device as claimed in claim 14, which is characterized in that the frequency pilot sign is the frequency pilot sign after despreading, described
Data symbol is the data symbol after despreading, and the compensated data symbol is used for symbol de-maps.
19. a kind of circuit of order modulated data symbol phase compensation characterized by comprising conjugator, die lifter, division
Device and multiplier, wherein
Frequency pilot sign is inputted from the input terminal of the conjugator and the die lifter respectively；
The output end of the conjugator and the die lifter is connected with the input terminal of divider respectively；
The output end of the divider is connected with the input terminal of the multiplier；
Data symbol is inputted from the input terminal of the multiplier, and the output end of the multiplier exports compensated data symbol.
20. circuit as claimed in claim 19, which is characterized in that the frequency pilot sign is the frequency pilot sign after despreading, described
Data symbol is the data symbol after despreading, and the compensated data symbol is used for symbol de-maps.
21. a kind of circuit of order modulated data symbol phase compensation characterized by comprising die lifter, divider, conjugation
Device multiplier, wherein
Frequency pilot sign is inputted from the input terminal of the divider, the die lifter respectively；
The output end of the die lifter is connected with another input terminal of the divider,
The output end of the divider is connected with the input terminal of conjugator；
The output end of the conjugator is connected with the input terminal of the multiplier；
Data symbol is inputted from another input terminal of the multiplier, and the output end of the multiplier exports compensated data
Symbol.
22. circuit as claimed in claim 21, which is characterized in that the frequency pilot sign is the frequency pilot sign after despreading, described
Data symbol is the data symbol after despreading, and the compensated data symbol is used for symbol de-maps.
23. a kind of circuit of order modulated data symbol phase compensation characterized by comprising die lifter, the first divider and
Second divider, wherein
Frequency pilot sign is respectively from the input terminal input of the die lifter and first divider, the output end of the die lifter
It is connected with another input terminal of first divider；
The output end of first divider is connected with the input terminal of second divider；
Data symbol is inputted from another input terminal of second divider, and the output end of second divider exports compensation
Data symbol afterwards.
24. circuit as claimed in claim 23, which is characterized in that the frequency pilot sign is the frequency pilot sign after despreading, described
Data symbol is the data symbol after despreading, and the compensated data symbol is used for symbol de-maps.
25. a kind of circuit of order modulated data symbol phase compensation characterized by comprising filter, conjugator, modulus
Device, divider and multiplier, wherein
Input signal includes frequency pilot sign and data symbol；Input terminal input of the frequency pilot sign from the filter, institute
The output end for stating filter is connected with the input terminal of the conjugator, the die lifter respectively；
The conjugator, the die lifter output end be connected respectively with the input terminal of divider；
The output end of the divider is connected with the input terminal of the multiplier；
The data symbol is inputted from the input terminal of the multiplier, and the output end of the multiplier exports compensated data symbols
Number.
26. circuit as claimed in claim 25, which is characterized in that the frequency pilot sign is the frequency pilot sign after despreading, described
Data symbol is the data symbol after despreading, and the compensated data symbol is used for symbol de-maps.
27. a kind of circuit of order modulated data symbol phase compensation characterized by comprising filter, die lifter, division
Device, conjugator and multiplier, wherein
Frequency pilot sign from the input terminal input of the filter, the output end of the filter respectively with the divider, institute
The input terminal for stating die lifter is connected；
Filtered frequency pilot sign is inputted from the input terminal of the divider；
The output end of the die lifter is connected with another input terminal of the divider；
The output end of the divider is connected with the input terminal of conjugator；
The output end of the conjugator is connected with the input terminal of the multiplier；
Data symbol is inputted from another input terminal of the multiplier, and the output end of the multiplier exports compensated data
Symbol.
28. circuit as claimed in claim 27, which is characterized in that the frequency pilot sign is the frequency pilot sign after despreading, described
Data symbol is the data symbol after despreading, and the compensated data symbol is used for symbol de-maps.
29. a kind of circuit of order modulated data symbol phase compensation characterized by comprising filter, die lifter, first
Divider and the second divider, wherein
Frequency pilot sign from the input terminal input of the filter, the output end of the filter respectively with first division
Device, the input terminal of the die lifter are connected；
The output end of the die lifter is connected with another input terminal of first divider；
The output end of first divider is connected with the input terminal of the second divider；
Data symbol is inputted from another input terminal of second divider, and the output end of second divider exports compensation
Data symbol afterwards.
30. circuit as claimed in claim 29, which is characterized in that the frequency pilot sign is the frequency pilot sign after despreading, described
Data symbol is the data symbol after despreading, and the compensated data symbol is used for symbol de-maps.
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