CN105281776A - Manchester decoding device capable of carrying out error correction and method thereof - Google Patents
Manchester decoding device capable of carrying out error correction and method thereof Download PDFInfo
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- CN105281776A CN105281776A CN201410322161.2A CN201410322161A CN105281776A CN 105281776 A CN105281776 A CN 105281776A CN 201410322161 A CN201410322161 A CN 201410322161A CN 105281776 A CN105281776 A CN 105281776A
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Abstract
The invention discloses a Manchester decoding device capable of carrying out error correction and a method thereof. The device comprises a clock frequency divider module, a multipoint sampling module, a jump edge detection module and a decoding module. The clock frequency divider module carries out frequency division processing on a clock signal of an input apparatus and outputs the clock signal after the frequency division processing to the multipoint sampling module. The multipoint sampling module carries out multi-point sampling on a Manchester code element and outputs a sampling result to the decoding module. The jump edge detection module detects a level jump edge of each input Manchester code element and the level jump edge is taken as a reference signal of the multipoint sampling module. The decoding module carries out decoding according to a sampling result of the multipoint sampling module. A traditional Manchester decoding device based on a single point sampling method has the following technical problems that an error correction capability is poor; working is not stable; the device is easy to be interfered and reliability is not high. By using the device and the method of the invention, the above problems are well solved.
Description
Technical field
The present invention relates to electronic circuit technology field, especially relate to a kind of based on multi-point sampling method can the manchester decoder devices and methods therefor of error correction.
Background technology
Manchester code is also known as digital bidirectional code, and be a kind of clock self-synchronization coding techniques, it is advantageous that, the packet after coding contains abundant clock information.It is the true form that the new code of binary system utilizing two to have an out of phase respectively to each binary code goes to replace, be characterized in use two level, there is the conversion of a level in the middle time that can ensure in each code element, this extracts bit synchronization signal to receiving terminal is very favorable.As shown in Figure 1, Manchester code, in units of code element, comprises Manchester code element of multidigit, and the data-bit encoding specification in Manchester code is: the first half being coded in code element of " 1 " should be " height " level, and latter half is " low " level; The first half being coded in code element of one " 0 " should be " low " level, and latter half is " height " level.
At present, Manchester decoder circuit realized in the prior art all adopts the single-point method of sampling to decode, and this decoding process error correcting capability is weak, if when decoded signal occurs that interference or signal have a distortion, then and can decoding error.As shown in Figure 2, carrying out single-point sampling with 16 frequencys multiplication of Manchester code element bit rate at the fixing point of each code-element period can realize decoding to single-point sampling method decoding mechanism of the prior art.As shown in a part in accompanying drawing 2, sampled value is combined as 10, then decode results is " 1 "; As shown in the b part in accompanying drawing 2, sampled value is combined as 01, then decode results is " 0 ".When adopting single-point sampling method decoding, if sampled point now is just in time positioned at disturbing pulse position, as shown in Figure 3, then now sampled value is combined as 00, this is an illegal combined value, the decoding circuit of prior art directly will be judged to be that interference appears in signal, visible single-point sampling method for signal disturbing completely without any error correcting capability.Therefore, have that error correcting capability is weak based on the manchester decoder apparatus and method of single-point sampling method in prior art, job insecurity, be very easily disturbed the technological deficiency not high with reliability.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of can the manchester decoder devices and methods therefor of error correction, solve that traditional manchester decoder device error correcting capability based on single-point sampling method is weak, job insecurity, be very easily disturbed, technical problem that reliability is not high.
In order to realize foregoing invention object, the present invention specifically provide a kind of can the technic relization scheme of manchester decoder device of error correction, can the manchester decoder device of error correction, comprising: Clock dividers module, multi-point sampling module, hopping edge detection module and decoding module;
Described Clock dividers module carries out scaling down processing to the clock signal of input unit, and exports the clock signal after scaling down processing to described multi-point sampling module;
Manchester code element of described multi-point sampling module to input carries out multi-point sampling, and exports sampled result to described decoding module;
Described hopping edge detection module detects the level hopping edge in Manchester code element of every input, in this, as the reference signal of described multi-point sampling module;
Described decoding module carries out decoding according to the sampled result of described multi-point sampling module.
Preferably, described device also comprises mistake warning module, and described wrong warning module carries out early warning process according to the sampled result of multi-point sampling module.
Preferably, described multi-point sampling module comprises counter one sum counter two, described counter two is used for sampling front half code element of described Manchester code element, described counter one is used for sampling rear half code element of described Manchester code element, adopt described Manchester code element as the enable signal of described counter one sum counter two, when described enable signal is high level, described counter one or described counter two add 1, when described enable signal is low level, the value of described counter one or described counter two is constant.
Preferably, when the value of described counter one or described counter two is more than or equal to set point, then judge that half code element of sampling is as 1; When the value of counter one or described counter two is less than or equal to another set point, then judge that half code element of sampling is as 0.
Preferably, when described hopping edge detection module detects level hopping edge within the sampling period of Manchester code element, the value of described counter one and described counter two resets.
Preferably, described multi-point sampling module combines the result of determination of described counter two sampled value and the result of determination of described counter one sampled value, if the combined value of the result of determination of described sampled value is 10, then the decoding value of described decoding module is 1, if the combined value of the result of determination of described sampled value is 01, then the decoding value of described decoding module is 0.
Preferably, described multi-point sampling module combines the result of determination of described counter two sampled value and the result of determination of described counter one sampled value, if the combined value of the result of determination of described sampled value is 11 or 00, then the early warning signal of enable described wrong warning module is effective, and described wrong this Manchester code element of warning module notice upper application software is error code.
Preferably, described multi-point sampling module all carries out 8 point samplings to half code element and rear half code element before Manchester code element of input; When the value of described counter one or described counter two is more than or equal to 4, then judge that half code element of sampling is as 1; When the value of described counter one or described counter two is less than or equal to 3, then judge that half code element of sampling is as 0.
Preferably, the 32M clock signal of described Clock dividers module to input unit carries out scaling down processing, the clock after frequency division be 16 times to the clock of described Manchester code element code check.
Preferably, described device is realized by FPGA (Field Programmable Gate Array) language, is packaged into one based on the IP kernel of programmable logic device comprising CPLD or fpga chip.
The present invention also specifically provide in addition a kind of can the technic relization scheme of Manchester decoding scheme of error correction, said method comprising the steps of:
S10: scaling down processing is carried out to the clock signal of input manchester decoder device;
S11: detect the level hopping edge in Manchester code element of every input, in this, as the reference signal of described multi-point sampling;
S12: according to the clock signal through scaling down processing, carries out multi-point sampling to Manchester code element of input, and in conjunction with described reference signal, exports multi-point sampling result;
S13: decoding process is carried out to multi-point sampling result.
Preferably, described method also comprises further:
S14: the process of carrying out early warning process according to multi-point sampling result.
Preferably, described step S12 comprises further:
S121: front half code element of described Manchester code element of sampling, and count, when current half code element is high level, count value adds 1, and when current half code element is low level, count value is constant;
S122: rear half code element of described Manchester code element of sampling, and count, when rear half code element is high level, count value adds 1, and when rear half code element is low level, count value is constant.
Preferably, described step S12 comprises further:
When the count value in described step S121 or described step S122 is more than or equal to set point, then judge that half code element of sampling is as 1; When the count value in described step S121 or described step S122 is less than or equal to another set point, then judge that half code element of sampling is as 0.
Preferably, described step S11 comprises further:
When level hopping edge being detected in the sampling period Manchester code element, the count value in described step S121 and described step S122 resets.
Preferably, described step S12 comprises further:
To the sampled result judged in described step S121, and the sampled result judged in described step S122 combines, if the combined value of the sampled result judged described is as 10, then in described step S13,1 is decoded as to described multi-point sampling result, if the combined value of the sampled result judged described as 01, is then decoded as 0 to described multi-point sampling result in described step S13.
Preferably, described step S12 comprises further:
To the sampled result judged in described step S121, and the sampled result judged in described step S122 combines, if the combined value of the sampled result judged described is as 11 or 00, then in described step S14, enable early warning signal is effective, and notifies that this Manchester code element of upper application software is error code.
Preferably, described step S12 comprises further:
All 8 point samplings are carried out to half code element and rear half code element before Manchester code element of input, when the count value in described step S121 or described step S122 is more than or equal to 4, then judges that half code element of sampling is as 1; When the count value in described step S121 or described step S122 is less than or equal to 3, then judge that half code element of sampling is as 0.
Preferably, described step S10 comprises further:
Scaling down processing is carried out to the 32M clock signal of input unit, the clock after frequency division be 16 times to the clock of described Manchester code element code check.
Can the manchester decoder devices and methods therefor of error correction by what implement that the invention described above provides, there is following technique effect:
(1) the present invention proposes a kind of manchester decoder devices and methods therefor based on multi-point sampling method, to sample in the code-element period of a Manchester code multiple point, carry out decoding by the sampled value be dominant to quantity, tradition, job insecurity weak based on the manchester decoder devices and methods therefor error correcting capability of single-point sampling method can be solved, be very easily disturbed, the technical problem of the not high aspect of reliability;
(2) the manchester decoder devices and methods therefor decoding accuracy that the present invention is based on multi-point sampling method is high, there is extremely strong error correcting capability simultaneously, FPGA (Field Programmable Gate Array) language can be adopted to realize, and be packaged into IP kernel, can be used for the programmable logic chips such as CPLD and FPGA, versatility is extremely strong.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the symbol waveform structural representation of Manchester code in prior art;
Fig. 2 is the sample waveform schematic diagram of prior art based on the manchester decoder device of single-point sampling method;
The sample waveform schematic diagram of Fig. 3 when to be prior art occur disturbing pulse based on the manchester decoder device of single-point sampling method;
Fig. 4 be the present invention is based on multi-point sampling method can the sample waveform schematic diagram of manchester decoder device of error correction;
Fig. 5 is that the present invention can the structural principle block diagram of a kind of embodiment of manchester decoder device of error correction;
Fig. 6 is that the present invention can the structural principle schematic diagram of Clock dividers module in a kind of embodiment of manchester decoder device of error correction;
Fig. 7 is that the present invention can the structural principle schematic diagram of multi-point sampling module in a kind of embodiment of manchester decoder device of error correction;
Fig. 8 is that the present invention can the structural principle block diagram of the another kind of embodiment of manchester decoder device of error correction;
In figure: 1-Clock dividers module, 2-multi-point sampling module, 3-hopping edge detection module, 4-decoding module, 5-mistake warning module, 21-counter one, 22-counter two.
Embodiment
For the purpose of quoting and know, by the technical term hereinafter used, write a Chinese character in simplified form or abridge and be described below:
CPLD:ComplexProgrammableLogicDevice, the abbreviation of CPLD;
FPGA:FieldProgrammableGateArray, the abbreviation of field programmable gate array;
IP kernel: IntellectualPropertycore, the abbreviation of IP core is one section of hardware description language program with particular electrical circuit function;
For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, clear, complete description is carried out to the technical scheme in the embodiment of the present invention.Obviously, described embodiment is only a part of embodiment of the present invention, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
As shown in accompanying drawing 4 to accompanying drawing 8, giving the present invention can the specific embodiment of manchester decoder devices and methods therefor of error correction, and below in conjunction with the drawings and specific embodiments, the invention will be further described.
As shown in Figure 5, a kind of can the specific embodiment of manchester decoder device of error correction, comprising: Clock dividers module 1, multi-point sampling module 2, hopping edge detection module 3 and decoding module 4;
Clock dividers module 1, carries out scaling down processing to the clock signal of input unit, and exports the clock signal after scaling down processing to multi-point sampling module 2; As shown in Figure 6, as a kind of typical specific embodiment of the present invention, the 32M clock signal of Clock dividers module 1 pair of input unit carries out scaling down processing, the clock after frequency division be 16 times to the clock of Manchester code element code check; Such as: the code check of Manchester code is 1Mhz, then the clock after frequency division is 16Mhz, Clock dividers module 1 can be realized by the binary counter of 1;
Multi-point sampling module 2, carries out multi-point sampling to Manchester code element of input, and exports sampled result to decoding module 4;
Hopping edge detection module 3, detects the level hopping edge in Manchester code element of every input, in this, as the reference signal of multi-point sampling module 2; Because the level of front half code element of each code element of Manchester code and rear half code element is always contrary, i.e. in the code element of every Manchester code, a level hopping edge must be there is;
Decoding module 4, the sampled result according to multi-point sampling module 2 carries out decoding.
As shown in Figure 7, as a kind of typical specific embodiment of the present invention, multi-point sampling module 2 comprises counter 1 sum counter 2 22 further, and counter 2 22 is used for sampling front half code element of Manchester code element.Counter 1 is used for Manchester code element after to 8 clock cycle of time delay and samples, with rear half code element of Manchester code element of sampling.Adopt Manchester code element as the enable signal of counter 1 sum counter 2 22, when enable signal is high level, counter 1 or counter 2 22 add 1, when enable signal is low level, the value of counter 1 or counter 2 22 is constant, so just can judge that sampled code element be 1 is still 0 by the value of counter 1 sum counter 2 22.
When the value of counter 1 or counter 2 22 is more than or equal to set point, then judge that half code element of sampling is as 1; When the value of counter 1 or counter 2 22 is less than or equal to another set point, then judge that half code element of sampling is as 0.After having detected Manchester code element of, the value of counter 1 sum counter 2 22 should reset, thus samples to Manchester code element of next bit.And the saltus step between front half code element of Manchester code element and rear half code element may be the positive transition from low level to high level, also may be from high level to low level negative saltus step.Therefore, when hopping edge detection module 3 detects level hopping edge within the sampling period of Manchester code element, the value of counter 1 sum counter 2 22 resets.As a kind of typical specific embodiment of the present invention, multi-point sampling module 2 all carries out 8 point samplings to half code element and rear half code element before Manchester code element of input.When the value of counter 1 or counter 2 22 is more than or equal to 4, then judge that half code element of sampling is as 1.When the value of counter 1 or counter 2 22 is less than or equal to 3, then judge that half code element of sampling is as 0.
The result of determination of result of determination sum counter 1 sampled value of multi-point sampling module 2 pairs of counter 2 22 sampled values combines, if the combined value of the result of determination of sampled value is 10, then the decoding value of decoding module 4 is 1, if the combined value of the result of determination of sampled value is 01, then the decoding value of decoding module 4 is 0.
As shown in Figure 8, as the another kind of typical specific embodiment of the present invention, device also comprises mistake warning module 5 further, and mistake warning module 5 carries out early warning process according to the sampled result of multi-point sampling module 2.The result of determination of result of determination sum counter 1 sampled value of multi-point sampling module 2 pairs of counter 2 22 sampled values combines, if the combined value of the result of determination of sampled value is 11 or 00, then the early warning signal of enable wrong warning module 5 is effective, and mistake warning module 5 notifies that this Manchester code element of upper application software is error code.
What the invention described above specific embodiment described can the manchester decoder device of error correction be realized by FPGA (Field Programmable Gate Array) language, and is packaged into one based on the IP kernel of programmable logic device comprising CPLD or fpga chip, and versatility is extremely strong.
The error correction principles of the manchester decoder device that the specific embodiment of the invention describes as shown in Figure 4, if there is interference in the channel, the particularly impulse disturbances of random burst, as shown in a part in accompanying drawing 4, adopts single-point sampling method likely to cause decoding error.And the antijamming capability of the technical scheme that the specific embodiment of the invention describes by adopting multi-point sampling method to improve decode procedure.Multi-point sampling method samples 8 points (in order to improve error correcting capability further respectively to half code element before the code element of each Manchester and rear half code element usually, also can only to sample 5 middle points, as shown in b part in accompanying drawing 4), as long as sampling more than or equaling 4 points is that high level then can judge that corresponding half code element is 1, if sampled, to be less than or equal to 3 points be low level, can judge that corresponding half code element is 0, realize by judging that the sampled value that quantity is dominant carries out decoding with this, thus improve error correcting capability.Certainly, in order to improve the accuracy rate of decoding further, can the decision threshold of corresponding adjustment counter, as: sampling more than or equaling 5 points is that high level then can judge that corresponding half code element is 1, if sampled, to be less than or equal to 2 points be low level, can judge that corresponding half code element is 0.The sample counter of 3bit (counter 1 sum counter 2 22) can be adopted to realize for the accumulative of sampled value, the initial value of sample counter is " 000 ", samples high level at every turn and then adds 1, samples low level then inoperation.After the code-element period of a Manchester code, by judging that the count value of sample counter can judge the logical value of Manchester code element.Embodiment as shown in the b part in accompanying drawing 4, the value of counter 2 22 is " 100 ", and highest order is " 1 ", and the value of counter 1 is " 000 ", and highest order is " 0 ", and its combined value is " 10 ", and the logic of Manchester code element is " 1 ".Visible, adopt the specific embodiment of the invention describe based on after the manchester decoder device of multi-point sampling method, burst interference under achieve correct decoding.And to take after multi-point sampling method this disturbing pulse of well filtering, and obtain correct decode results.
Can the specific embodiment of Manchester decoding scheme of error correction, comprise the following steps:
S10: scaling down processing is carried out to the clock signal of input manchester decoder device;
S11: detect the level hopping edge in Manchester code element of every input, in this, as the reference signal of multi-point sampling;
S12: according to the clock signal through scaling down processing, carries out multi-point sampling to Manchester code element of input, and in conjunction with reference signal, exports multi-point sampling result;
S13: decoding process is carried out to multi-point sampling result.
As a kind of typical specific embodiment of the present invention, above-mentioned steps S10 comprises further: carry out scaling down processing to the 32M clock signal of input unit, the clock after frequency division be 16 times to the clock of described Manchester code element code check.
Above-mentioned steps S12 comprises further:
S121: front half code element of sampling Manchester code element, and count, when current half code element is high level, count value adds 1, and when current half code element is low level, count value is constant;
S122: rear half code element of sampling Manchester code element, and count, when rear half code element is high level, count value adds 1, and when rear half code element is low level, count value is constant.
Above-mentioned steps S12 comprises further:
When the count value in step S121 or step S122 is more than or equal to set point, then judge that half code element of sampling is as 1; When the count value in step S121 or step S122 is less than or equal to another set point, then judge that half code element of sampling is as 0.
As a kind of typical specific embodiment of the present invention, above-mentioned steps S12 comprises further:
All 8 point samplings are carried out to half code element and rear half code element before Manchester code element of input, when the count value in step S121 or step S122 is more than or equal to 4, then judges that half code element of sampling is as 1; When the count value in step S121 or step S122 is less than or equal to 3, then judge that half code element of sampling is as 0.
Above-mentioned steps S11 comprises further:
When hopping edge detection module 3 detects level hopping edge within the sampling period of Manchester code element, the count value in step S121 and step S122 resets.
Above-mentioned steps S12 comprises further:
To the sampled result judged in step S121, and the sampled result judged in step S122 combines, if it is determined that the combined value of sampled result be 10, then in step S13,1 is decoded as to multi-point sampling result, if it is determined that the combined value of sampled result be 01, then in step S13,0 is decoded as to multi-point sampling result.
As one of the present invention preferably specific embodiment, Manchester decoding scheme also comprises further:
S14: the process of carrying out early warning process according to multi-point sampling result.Above-mentioned steps S12 comprises further: to the sampled result judged in step S121, and the sampled result judged in step S122 combines, if it is determined that the combined value of sampled result be 11 or 00, then in step S14, enable early warning signal is effective, and notifies that this Manchester code element of upper application software is error code.
Can the manchester decoder devices and methods therefor of error correction by what implement that the specific embodiment of the invention describes, following technique effect can be produced:
(1) the manchester decoder devices and methods therefor based on multi-point sampling method of specific embodiment of the invention description, replace traditional unitary sampling method and realize manchester decoder, to sample in the code-element period of a Manchester code multiple point, carry out decoding by the sampled value be dominant to quantity, tradition, job insecurity weak based on the manchester decoder devices and methods therefor error correcting capability of single-point sampling method can be solved, be very easily disturbed, the technical problem of the not high aspect of reliability;
(2) the manchester decoder devices and methods therefor decoding accuracy based on multi-point sampling method of specific embodiment of the invention description is high, there is extremely strong error correcting capability simultaneously, FPGA (Field Programmable Gate Array) language can be adopted to realize, and be packaged into IP kernel, can be used for the programmable logic chips such as CPLD and FPGA, versatility is extremely strong.
In this specification, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar portion mutually see.
The above is only preferred embodiment of the present invention, not does any pro forma restriction to the present invention.Although the present invention discloses as above with preferred embodiment, but and be not used to limit the present invention.Any those of ordinary skill in the art, when not departing from Spirit Essence of the present invention and technical scheme, the Method and Technology content of above-mentioned announcement all can be utilized to make many possible variations and modification to technical solution of the present invention, or be revised as the Equivalent embodiments of equivalent variations.Therefore, every content not departing from technical solution of the present invention, according to technical spirit of the present invention to any simple modification made for any of the above embodiments, equivalent replacement, equivalence change and modification, all still belongs in the scope of technical solution of the present invention protection.
Claims (19)
1. can the manchester decoder device of error correction, it is characterized in that, comprising: Clock dividers module (1), multi-point sampling module (2), hopping edge detection module (3) and decoding module (4);
Described Clock dividers module (1) carries out scaling down processing to the clock signal of input unit, and the clock signal after scaling down processing is exported to described multi-point sampling module (2);
Manchester code element of described multi-point sampling module (2) to input carries out multi-point sampling, and sampled result is exported to described decoding module (4);
The level hopping edge in Manchester code element of every input is detected in described hopping edge detection module (3), in this, as the reference signal of described multi-point sampling module (2);
Described decoding module (4) carries out decoding according to the sampled result of described multi-point sampling module (2).
2. according to claim 1 a kind of can the manchester decoder device of error correction, it is characterized in that: described device also comprises mistake warning module (5), described wrong warning module (5) carries out early warning process according to the sampled result of multi-point sampling module (2).
3. according to claim 1 and 2 a kind of can the manchester decoder device of error correction, it is characterized in that: described multi-point sampling module (2) comprises counter one (21) sum counter two (22), described counter two (22) is used for sampling front half code element of described Manchester code element, described counter one (21) is used for sampling rear half code element of described Manchester code element, adopt described Manchester code element as the enable signal of described counter one (21) sum counter two (22), when described enable signal is high level, described counter one (21) or described counter two (22) add 1, when described enable signal is low level, the value of described counter one (21) or described counter two (22) is constant.
4. according to claim 3 a kind of can the manchester decoder device of error correction, it is characterized in that: when the value of described counter one (21) or described counter two (22) is more than or equal to set point, then judge that half code element of sampling is as 1; When the value of counter one (21) or described counter two (22) is less than or equal to another set point, then judge that half code element of sampling is as 0.
5. according to claim 4 a kind of can the manchester decoder device of error correction, it is characterized in that: when described hopping edge detection module (3) detects level hopping edge within the sampling period of Manchester code element, the value of described counter one (21) and described counter two (22) resets.
6. a kind of according to claim 4 or 5 can the manchester decoder device of error correction, it is characterized in that: described multi-point sampling module (2) is combined the result of determination of described counter two (22) sampled value and the result of determination of described counter one (21) sampled value, if the combined value of the result of determination of described sampled value is 10, then the decoding value of described decoding module (4) is 1, if the combined value of the result of determination of described sampled value is 01, then the decoding value of described decoding module (4) is 0.
7. according to claim 6 a kind of can the manchester decoder device of error correction, it is characterized in that: described multi-point sampling module (2) is combined the result of determination of described counter two (22) sampled value and the result of determination of described counter one (21) sampled value, if the combined value of the result of determination of described sampled value is 11 or 00, then the early warning signal of enable described wrong warning module (5) is effective, and described this Manchester code element of wrong warning module (5) notice upper application software is error code.
8. can the manchester decoder device of error correction according to a kind of in claim 4,5,7 described in arbitrary claim, it is characterized in that: described multi-point sampling module (2) all carries out 8 point samplings to half code element and rear half code element before Manchester code element of input; When the value of described counter one (21) or described counter two (22) is more than or equal to 4, then judge that half code element of sampling is as 1; When the value of described counter one (21) or described counter two (22) is less than or equal to 3, then judge that half code element of sampling is as 0.
9. according to claim 8 a kind of can the manchester decoder device of error correction, it is characterized in that: the 32M clock signal of described Clock dividers module (1) to input unit carries out scaling down processing, the clock after frequency division be 16 times to the clock of described Manchester code element code check.
10. can the manchester decoder device of error correction according to a kind of in claim 1,2,4,5,7,9 described in arbitrary claim, it is characterized in that: described device is realized by FPGA (Field Programmable Gate Array) language, be packaged into one based on the IP kernel of programmable logic device comprising CPLD or fpga chip.
11. 1 kinds can the Manchester decoding scheme of error correction, it is characterized in that, comprises the following steps:
S10: scaling down processing is carried out to the clock signal of input manchester decoder device;
S11: detect the level hopping edge in Manchester code element of every input, in this, as the reference signal of described multi-point sampling;
S12: according to the clock signal through scaling down processing, carries out multi-point sampling to Manchester code element of input, and in conjunction with described reference signal, exports multi-point sampling result;
S13: decoding process is carried out to multi-point sampling result.
12. according to claim 11 a kind of can the Manchester decoding scheme of error correction, it is characterized in that, described method also comprises further:
S14: the process of carrying out early warning process according to multi-point sampling result.
13. a kind of according to claim 11 or 12 can the Manchester decoding scheme of error correction, and it is characterized in that, described step S12 comprises further:
S121: front half code element of described Manchester code element of sampling, and count, when current half code element is high level, count value adds 1, and when current half code element is low level, count value is constant;
S122: rear half code element of described Manchester code element of sampling, and count, when rear half code element is high level, count value adds 1, and when rear half code element is low level, count value is constant.
14. according to claim 13 a kind of can the Manchester decoding scheme of error correction, it is characterized in that, described step S12 comprises further:
When the count value in described step S121 or described step S122 is more than or equal to set point, then judge that half code element of sampling is as 1; When the count value in described step S121 or described step S122 is less than or equal to another set point, then judge that half code element of sampling is as 0.
15. according to claim 14 a kind of can the Manchester decoding scheme of error correction, it is characterized in that, described step S11 comprises further:
When level hopping edge being detected in the sampling period Manchester code element, the count value in described step S121 and described step S122 resets.
16. a kind of according to claims 14 or 15 can the Manchester decoding scheme of error correction, and it is characterized in that, described step S12 comprises further:
To the sampled result judged in described step S121, and the sampled result judged in described step S122 combines, if the combined value of the sampled result judged described is as 10, then in described step S13,1 is decoded as to described multi-point sampling result, if the combined value of the sampled result judged described as 01, is then decoded as 0 to described multi-point sampling result in described step S13.
17. according to claim 16 a kind of can the Manchester decoding scheme of error correction, it is characterized in that, described step S12 comprises further:
To the sampled result judged in described step S121, and the sampled result judged in described step S122 combines, if the combined value of the sampled result judged described is as 11 or 00, then in described step S14, enable early warning signal is effective, and notifies that this Manchester code element of upper application software is error code.
18. can the Manchester decoding scheme of error correction according to a kind of in claim 14,15,17 described in arbitrary claim, and it is characterized in that, described step S12 comprises further:
All 8 point samplings are carried out to half code element and rear half code element before Manchester code element of input, when the count value in described step S121 or described step S122 is more than or equal to 4, then judges that half code element of sampling is as 1; When the count value in described step S121 or described step S122 is less than or equal to 3, then judge that half code element of sampling is as 0.
19. according to claim 18 a kind of can the Manchester decoding scheme of error correction, it is characterized in that, described step S10 comprises further:
Scaling down processing is carried out to the 32M clock signal of input unit, the clock after frequency division be 16 times to the clock of described Manchester code element code check.
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