CN105280126A - Display driving circuit - Google Patents
Display driving circuit Download PDFInfo
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- CN105280126A CN105280126A CN201410349163.0A CN201410349163A CN105280126A CN 105280126 A CN105280126 A CN 105280126A CN 201410349163 A CN201410349163 A CN 201410349163A CN 105280126 A CN105280126 A CN 105280126A
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Abstract
The invention discloses a display driving circuit comprising a power circuit, a data driving circuit, a common driving circuit, and a scanning driving circuit. The power circuit generates a power signal. The data driving circuit is coupled to the power circuit and outputs plural data signals to plural pixels according to the power signal or a reference signal. The common driving circuit is coupled to the power circuit and outputs a common signal to the plural pixels according to the power signal or the reference signal. The scanning driving circuit controls the plural pixels to receive the plural data signals respectively in order to display a frame.
Description
Technical field
The present invention relates to a kind of display driver circuit, particularly relate to the display driver circuit of a kind of power saving design.
Background technology
Display has been widely used in various electronic product or home appliance at present, and along with the progress of science and technology and the lifting of environmental consciousness, power and energy saving is design direction important at present.But, general display all needs design source electrode drive circuit, shares driving circuit and gate drive circuit in order to the display controlling plural pixel, and source electrode drive circuit, shares the display that signal that driving circuit and gate drive circuit export different level respectively controls plural pixel.Such as, general display all needs generation five kinds of power supplys to drive the display of plural pixel in time controlling plural pixel, and so, any time of display after opening, driving circuit all needs generation five kinds of power supplys and drives the display of plural pixel.
In view of the electric consumption that the display of prior art is a large amount of, display is made to be advantage of the present invention compared with power and energy saving.
Summary of the invention
An object of the present invention is to provide a kind of display driver circuit, and the power supply of its minimizing needed for display is to reach the object of power and energy saving.
For reaching the above object, display driver circuit of the present invention comprises:.
One power circuit, produces a power signal;
One data drive circuit, couples described power circuit, exports complex data signal respectively to plural pixel according to described power signal or a reference signal;
One co-driver, couples described power circuit, exports a common signals to described pixel according to described power signal or described reference signal; And
Scan driving circuit, controls described pixel and receives described data signals respectively, to show a picture.
According to display driver circuit of the present invention, described data drive circuit, described co-driver and described scan drive circuit couple more described pixel, when the plural number of described scan drive circuit scans pixel described in signal conducting, when described pixel receives the more described data signals produced according to described power signal, described pixel receives the described common signals produced according to described reference signal.
According to display driver circuit of the present invention, when the plural number of described scan drive circuit scans pixel described in signal conducting, when described pixel receives the described data signals produced according to described reference signal, described pixel receives the described common signals produced according to described power signal.
According to display driver circuit of the present invention, when described data drive circuit according to described power signal export more described data signals, described co-driver to export the plural number scanning signal more described pixel of cut-off of described common signals and described scan drive circuit according to described reference signal time, described power circuit ends described power signal.
According to display driver circuit of the present invention, when described data drive circuit export more described data signals according to described reference signal, described co-driver end described pixel according to the plural number scanning signal that described power signal exports described common signals and described scan drive circuit time, described power circuit ends described power signal.
According to display driver circuit of the present invention, also comprise:
Time schedule controller, export a data time sequence signal, altogether with sequential signal, one scan sequence signal and a power supply sequential signal, and control described data drive circuit, described co-driver, described scan drive circuit and described power circuit, to show described picture.
According to display driver circuit of the present invention, described data drive circuit comprises:
One data storage element, couples described time schedule controller, stores display data, to produce a Data Control signal according to described data time sequence signal;
One data point reuse circuit, couples described data storage element, receives described Data Control signal and adjusts described Data Control signal, to produce a data selection signal; And
One data selection circuit, couple described power circuit and described data point reuse circuit, receive described power signal, described reference signal and described data selection signal, select described power signal or described reference signal according to described data selection signal, and export described data signals respectively to described pixel.
According to display driver circuit of the present invention, described co-driver comprises:
One common selection circuit, couple described power circuit and described time schedule controller, receive described power signal, described reference signal and described common sequential signal, select described power signal or described reference signal according to described common sequential signal, and export described common signals to more described pixel.
According to display driver circuit of the present invention, described scan drive circuit comprises:
One scan storage element, couples described time schedule controller, and produces one scan selection signal according to described scanning sequence signal; And
One scan selection circuit, couple described power circuit and described scanning storage element, receive a conducting signal, a cut-off signal and described scanning and select signal, select signal to select described conducting signal or described cut-off signal according to described scanning, and export plural number scanning signal respectively to described pixel.
According to display driver circuit of the present invention, the frame frequency of described picture be 30 hertz (Hz) below.
According to display driver circuit of the present invention, described reference signal is a ground connection level.
The beneficial effect implementing display driver circuit of the present invention is, when reference signal is without the need to being produced by power circuit, but when being the ground connection level of circuit, then when plural pixel needs to change display state, display driver circuit of the present invention only needs to produce power signal, conducting signal and cut-off signal three groups of power supplys; After the display state of plural pixel has changed and scan drive circuit makes plural pixel end, display driver circuit of the present invention only needs to produce power signal and cut-off signal two groups of power supplys, it can thus be appreciated that display driver circuit of the present invention significantly can reduce electrical source consumption, and reach the display driver circuit of power saving design.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the invention will be further described, in accompanying drawing:
Fig. 1 is the calcspar of an embodiment of display driver circuit of the present invention;
Fig. 2 is data selection circuit of the present invention, common choice circuit and scan the calcspar of an embodiment of selection circuit;
Fig. 3 is the first oscillogram of data signals of the present invention and common signals;
Fig. 4 is the second oscillogram of data signals of the present invention and common signals.
In figure:
10 pixels
20 display driver circuits
30 data drive circuits
31 data storage elements
33 data point reuse circuit
35 data selection circuits
40 co-drivers
41 common choice circuit
50 scan drive circuits
51 scanning storage elements
53 scan selection circuits
60 time schedule controllers
61 display circuits
70 power circuits
A waveform
B waveform
The common sequential signal of CT
DATA shows data
DT data time sequence signal
G
1sweep trace
G
nsweep trace
PT power supply sequential signal
RA reproducting periods
S
31data Control signal
S
33data selection signal
S
51signal is selected in scanning
SA waiting time
Embodiment
In order to there be understanding clearly to technical characteristic of the present invention, object and effect, now contrast accompanying drawing and describe the preferred embodiments of the present invention in detail.
In order to have a better understanding and awareness feature of the present invention and effect of reaching, careful assistant is with preferred embodiment and coordinate detailed description, illustrates as rear:
Refer to Fig. 1, it is the calcspar of an embodiment of display driver circuit 20 of the present invention.As shown in the figure, display driver circuit 20 of the present invention comprises power circuit 70, data drive circuit 30, co-driver 40 and a scan driving circuit 50.Power circuit 70 produces a power signal S
h.Data drive circuit 30 couples power circuit 70, and according to power signal S
hor a reference signal S
lexport complex data signal S respectively
dto plural pixel 10.Co-driver 40 couples power circuit 70, and according to power signal S
hor reference signal S
lexport a common signals S
cto plural pixel 10.Scan drive circuit 50 controls plural pixel 10 and receives complex data signal S respectively
dto show a picture.
Consult Fig. 1 again, display driver circuit 20 of the present invention more comprises time schedule controller 60.Time schedule controller 60 couples plural pixel 10 to drive plural pixel 10, and time schedule controller 60 is for controlling power circuit 70, data drive circuit 30, the work schedule of co-driver 40 and scan drive circuit 50, so time schedule controller 60 exports a data time sequence signal DT respectively to data drive circuit 30, have altogether with sequential signal CT to co-driver 40, one scan sequence signal ST is to scan drive circuit 50 and a power supply sequential signal PT to power circuit 70, and control data driving circuit 30, co-driver 40, scan drive circuit 50 and power circuit 70 in time work, with normal display frame.
Data drive circuit 30 couples plural pixel 10 to drive plural pixel 10, and data drive circuit 30 comprises data storage element 31, data point reuse circuit 33 and a data selection circuit 35.Data storage element 31 couples time schedule controller 60 and receives data time sequence signal DT, and data time sequence signal DT control data storage element 31 starts to store a display data DATA, and data storage element 31 produces a Data Control signal S according to display data DATA again
31.In other words, data storage element 31 couples time schedule controller 60, and stores a display data DATA, to produce Data Control signal S according to data time sequence signal DT
31, wherein, display data DATA is provided by a display circuit 61 or an external circuit and is stored in data storage element 31, and therefore the present invention does not limit display data DATA must be provided by which circuit.Data point reuse circuit 33 couples data storage element 31 and receives Data Control signal S
31, data point reuse circuit 33 adjusts Data Control signal S
31rear generation one data selection signal S
33, wherein, data point reuse circuit 33 can be position adjuster (Levelshifter) surely, so data point reuse circuit 33 can adjust Data Control signal S
31level.
Data selection circuit 35 couples power circuit 70 and data point reuse circuit 33, and so, data selection circuit 35 receives power signal S
h, reference signal S
land data selection signal S
33after, according to data selection signal S
33select power signal S
hor reference signal S
l, therefore data selection circuit 35 is according to power signal S
hor reference signal S
land export complex data signal S
dto plural pixel 10.Therefore data drive circuit 30 exports data signals S according to data time sequence signal DT
d, wherein, data selection circuit 35 can be a multiplexer (multiplexer), and reference signal S
lcan be produced by power circuit 70, or be the ground connection level of circuit.
Consult Fig. 1 again, scan drive circuit 50 couples plural pixel 10 to drive plural pixel 10, scan drive circuit 50 is for controlling conducting or the cut-off of pixel 10, so, plural number pixel 10 can carry out the change of display state under conducting state, and scan drive circuit of the present invention 50 comprises one scan storage element 51 and one scan selection circuit 53.Scanning storage element 51 couples time schedule controller 60 and receives scanning sequence signal ST, and scanning storage element 51 produces one scan according to scanning sequence signal ST and selects signal S
51.Scan selection circuit 53 couples power circuit 70 and scanning storage element 51, and so, scan selection circuit 53 receives conducting signal V
h, cut-off signal V
land signal S is selected in scanning
51after, scan selection circuit 53 selects signal S according to scanning
51select conducting signal V
hor cut-off signal V
l, therefore scan selection circuit 53 is according to conducting signal V
hor cut-off signal V
land export plural number scanning signal S respectively
sto plural pixel 10.Therefore scan drive circuit 50 exports plural number scanning signal S according to scanning sequence signal ST
s.Wherein, scanning storage element 51 can be a shift register (shifterregister), and scan selection circuit 53 can be a multiplexer (multiplexer).
Refer to Fig. 2, it is the calcspar of data selection circuit 35 of the present invention, common choice circuit 41 and the embodiment scanning selection circuit 53.As shown in the figure, co-driver 40 of the present invention is as data drive circuit 30 and scan drive circuit 50, and co-driver 40 also comprises a selection circuit, the common choice circuit 41 namely shown in Fig. 2.Common choice circuit 41 couples power circuit 70 and time schedule controller 60, and receives power signal S
h, reference signal S
land common sequential signal CT, common choice circuit 41 selects power signal S according to common sequential signal CT
hor reference signal S
l, so, common choice circuit 41 is according to power signal S
hor reference signal S
land export common signals S
cto plural pixel 10.Therefore co-driver 40 exports common signals S according to common sequential signal CT
c.Wherein, common choice circuit 41 can be a multiplexer (multiplexer) equally.
Consult Fig. 1 and Fig. 2 again, after display is opened, scan drive circuit 50 can scan plural pixel 10 to control conducting or the cut-off of plural pixel 10.Also Jiu Shi Said, when plural pixel 10 needs to change display state, scan drive circuit 50 exports plural number scanning signal S respectively
sto plural pixel 10 with conducting plural number pixel 10, plural pixel 10 like this can utilize data signals S respectively
dand common signals S
cwith display frame.For example, the display of a display black and white screen is for changing display state, and data drive circuit 30 is according to power signal S
hexport complex data signal S
d, co-driver 40 is according to reference signal S
lexport common signals S
c, then plural pixel 10 receives according to power signal S
hthe data signals S produced
d(being such as high levle signal), and receive according to reference signal S
lthe common signals S produced
c(being such as low level signal).
Otherwise, when data drive circuit 30 is according to reference signal S
lexport data signals S
d, co-driver 40 is according to power signal S
hexport common signals S
ctime, then plural pixel 10 receives according to reference signal S
lthe data signals S produced
d(being such as low level signal), and receive according to power signal S
hthe common signals S produced
c.In addition, plural pixel 10 can also receive the data signals S of identical level
dand common signals S
c, in other words, the present invention does not limit data signals S in scan cycle
dand common signals S
clevel must be fixed as power signal S
hor be fixed as reference signal S
l, such as: as common signals S
cfor high levle (is such as power signal S
h) time, export the first sweep trace G to
1data signals S
dcan be that low level is (such as reference signal S
l), export N sweep trace G to
ndata signals S
dcan be that high levle is (such as power signal S
h).So, plural pixel 10 factor data signal S of the present invention
dand common signals S
clevel change and black picture, white picture or chequered with black and white picture can be shown.
Accept above-mentioned, data signals S
dexported by data selection circuit 35, common signals S
cbe exported by common choice circuit 41, and data selection circuit 35 and common selection circuit 41 are all according to power signal S
hand reference signal S
ldetermination data signal S
dwith common signals S
c, so when plural pixel 10 needs to change display state, display driver circuit 20 of the present invention only needs to produce power signal S
h, reference signal S
l, conducting signal V
hand cut-off signal V
lfour groups of power supplys.But, as reference signal S
lwithout the need to being produced by power circuit 70, but when being the ground connection level of circuit, then, when plural pixel 10 needs to change display state, display driver circuit 20 of the present invention only needs to produce power signal S
h, conducting signal V
hand cut-off signal V
lthree groups of power supplys.
Moreover after the display state of plural pixel 10 has changed and scan drive circuit 50 makes plural pixel 10 end, display driver circuit 20 of the present invention has only needed to produce power signal S
hand cut-off signal V
ltwo groups of power supplys.It can thus be appreciated that display driver circuit 20 of the present invention significantly can reduce electrical source consumption, and reach the display driver circuit 20 of power saving design.
Refer to Fig. 3, it is data signals S of the present invention
dand common signals S
cthe first oscillogram.As shown in the figure, scan selection circuit 53 scans plural sweep trace G in reproducting periods RA
1g
n, and when common choice circuit 41 exports the common signals S of high levle
ctime, data selection circuit 35 is according to data selection signal S
33export the data signals S of high or low level
d, such as: shown in the waveform A of Fig. 3, when common choice circuit 41 exports the common signals S of high levle
ctime, data selection circuit 35 is according to data selection signal S
33export the data signals S of low level
dto the first sweep trace G
1, and data selection circuit 35 is according to data selection signal S
33export the data signals S of high levle
dto N sweep trace G
n.
Accept above-mentioned, such as: shown in the waveform B of Fig. 3, when common choice circuit 41 exports the common signals S of low level
ctime, data selection circuit 35 is according to data selection signal S
33export the data signals S of high levle
dto the first sweep trace G
1, and data selection circuit 35 is according to data selection signal S
33export the data signals S of low level
dto N sweep trace G
n.But, do not scan plural sweep trace G in waiting time SA scan selection circuit 53
1g
n, so only need to produce power signal S in waiting time SA display driver circuit 20
h, reference signal S
land cut-off signal V
lthree groups of power supplys.In addition, if reference signal S
lfor the ground connection level of circuit, then only need to produce power signal S in waiting time SA display driver circuit 20
hand cut-off signal V
ltwo groups of power supplys.
Refer to Fig. 4, it is data signals S of the present invention
dand common signals S
cthe second oscillogram.As shown in the figure, the difference of Fig. 4 oscillogram and Fig. 4 oscillogram is, display driver circuit 20 does not produce power signal S in waiting time SA
h, also Jiu Shi Said, display driver circuit 20 only needs to produce cut-off signal V in waiting time SA
lone group of power supply.
Based on above-mentioned, display driver circuit 20 of the present invention need not gamma circuitry, and data selection circuit 35 can be utilized in data drive circuit 30 to replace digital analog converter and operational amplifier.In addition, the preferred application product of display driver circuit 20 of the present invention can for electric label, shelf label, intelligent watch and other be for showing the product of article message, and wherein, the frame frequency of display frame is preferably 30 hertz (Hz) below.
In sum, display driver circuit of the present invention comprises a power circuit, a data drive circuit, a co-driver and scan driving circuit.Power circuit produces a power signal.Data drive circuit couples power circuit, and exports complex data signal respectively to plural pixel according to power signal or a reference signal.Co-driver couples power circuit, and exports a common signals to plural pixel according to power signal or reference signal.Scan drive circuit controls plural pixel and receives complex data signal respectively to show a picture.
Only as described above, be only one embodiment of the invention, not be used for limiting scope of the invention process, therefore the equalization of such as doing according to structure, feature and the spirit described in the present patent application the scope of the claims changes and modifies, and all should be included in claim of the present invention.
Claims (11)
1. a display driver circuit, it comprises
One power circuit, produces a power signal;
One data drive circuit, couples described power circuit, exports complex data signal respectively to plural pixel according to described power signal or a reference signal;
One co-driver, couples described power circuit, exports a common signals to described pixel according to described power signal or described reference signal; And
Scan driving circuit, controls described pixel and receives described data signals respectively, to show a picture.
2. display driver circuit according to claim 1, it is characterized in that, described data drive circuit, described co-driver and described scan drive circuit couple more described pixel, when the plural number of described scan drive circuit scans pixel described in signal conducting, when described pixel receives the more described data signals produced according to described power signal, described pixel receives the described common signals produced according to described reference signal.
3. display driver circuit according to claim 1, it is characterized in that, when the plural number of described scan drive circuit scans pixel described in signal conducting, when described pixel receives the described data signals produced according to described reference signal, described pixel receives the described common signals produced according to described power signal.
4. display driver circuit according to claim 1, it is characterized in that, when described data drive circuit according to described power signal export more described data signals, described co-driver to export the plural number scanning signal more described pixel of cut-off of described common signals and described scan drive circuit according to described reference signal time, described power circuit ends described power signal.
5. display driver circuit according to claim 1, it is characterized in that, when described data drive circuit export more described data signals according to described reference signal, described co-driver end described pixel according to the plural number scanning signal that described power signal exports described common signals and described scan drive circuit time, described power circuit ends described power signal.
6. display driver circuit according to claim 1, is characterized in that, also comprises:
Time schedule controller, export a data time sequence signal, altogether with sequential signal, one scan sequence signal and a power supply sequential signal, and control described data drive circuit, described co-driver, described scan drive circuit and described power circuit, to show described picture.
7. display driver circuit according to claim 6, is characterized in that, described data drive circuit comprises:
One data storage element, couples described time schedule controller, stores display data, to produce a Data Control signal according to described data time sequence signal;
One data point reuse circuit, couples described data storage element, receives described Data Control signal and adjusts described Data Control signal, to produce a data selection signal; And
One data selection circuit, couple described power circuit and described data point reuse circuit, receive described power signal, described reference signal and described data selection signal, select described power signal or described reference signal according to described data selection signal, and export described data signals respectively to described pixel.
8. display driver circuit according to claim 6, is characterized in that, described co-driver comprises:
One common selection circuit, couple described power circuit and described time schedule controller, receive described power signal, described reference signal and described common sequential signal, select described power signal or described reference signal according to described common sequential signal, and export described common signals to more described pixel.
9. display driver circuit according to claim 6, is characterized in that, described scan drive circuit comprises:
One scan storage element, couples described time schedule controller, and produces one scan selection signal according to described scanning sequence signal; And
One scan selection circuit, couple described power circuit and described scanning storage element, receive a conducting signal, a cut-off signal and described scanning and select signal, select signal to select described conducting signal or described cut-off signal according to described scanning, and export plural number scanning signal respectively to described pixel.
10. display driver circuit according to claim 6, is characterized in that, the frame frequency of described picture be 30 hertz (Hz) below.
11. display driver circuits according to claim 1, is characterized in that, described reference signal is a ground connection level.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410349163.0A CN105280126B (en) | 2014-07-22 | 2014-07-22 | Display driver circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410349163.0A CN105280126B (en) | 2014-07-22 | 2014-07-22 | Display driver circuit |
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| Publication Number | Publication Date |
|---|---|
| CN105280126A true CN105280126A (en) | 2016-01-27 |
| CN105280126B CN105280126B (en) | 2018-12-21 |
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| Publication number | Publication date |
|---|---|
| CN105280126B (en) | 2018-12-21 |
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