CN105225946A - Inverse conductivity type IGBT structure and forming method thereof - Google Patents
Inverse conductivity type IGBT structure and forming method thereof Download PDFInfo
- Publication number
- CN105225946A CN105225946A CN201410310441.1A CN201410310441A CN105225946A CN 105225946 A CN105225946 A CN 105225946A CN 201410310441 A CN201410310441 A CN 201410310441A CN 105225946 A CN105225946 A CN 105225946A
- Authority
- CN
- China
- Prior art keywords
- conductivity type
- inverse conductivity
- type igbt
- igbt structure
- formation method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
The invention discloses a kind of formation method of inverse conductivity type IGBT structure, comprise the following steps: the substrate that the first conduction type is provided; Multiple groove is formed in substrate top; The resilient coating of the second conduction type is formed in substrate; The Withstand voltage layer of the second conduction type is formed on resilient coating; The Facad structure of device is formed on Withstand voltage layer; Thinning back side is carried out to exposing the staggered back side pattern of substrate and resilient coating figure to substrate; And form metal layer on back at a thinning side surface.This formation method utilizes the mode of grooving then long epitaxial loayer backfill, complete the preparation manufacturing Withstand voltage layer rectangular structure, eliminate existing technique and do the technique that the costs such as energetic ion injection, laser annealing, back side photoetching are high, operation is difficult from the back side, infusion of financial resources transformation is not needed to produce line, significantly reduce difficulty and the cost of production simultaneously, improve yield, reach the object reducing production cost.The invention also discloses the inverse conductivity type IGBT structure formed by said method.
Description
Technical field
The invention belongs to technical field of semiconductors, be specifically related to a kind of inverse conductivity type IGBT (InsulatorGateBipolarTransistor, insulated gate bipolar field effect transistor) structure and forming method thereof.
Background technology
Inverse conductivity type IGBT is a kind of important power device.In most of application scenario, inverse conductivity type IGBT and FWD (Free-wheelingDiode, fly-wheel diode) collocation uses, and can reduce chip area like this, reduce costs, obtain larger competitive advantage.
As shown in Figure 1, in figure, 101 is p well region to existing inverse conductivity type IGBT structure, and 102 is n+ doped region, and 103 is n-Withstand voltage layer, 104 is n resilient coating, and 105 is grid oxide layer, and 106 is polysilicon layer, 107 is separator, and 108 is front metal layer, and 109 is that back side p+ layer and 110 is for metal layer on back.The manufacture method of the inverse conductivity type IGBT structure shown in Fig. 1 is as shown in Fig. 2 a to Fig. 2 h, and wherein 111 in Fig. 2 e and 2f is barrier layer.Detailed process is as follows: provide n-Withstand voltage layer (with reference to figure 2a), front device (with reference to figure 2b) is processed by common process, (with reference to figure 2c) is injected by making high-octane N-shaped impurity after thinning back side, then carry out laser annealing and obtain n resilient coating (with reference to figure 2d), do back side photoetching (with reference to figure 2e) again, carry out p-type impurity injection (with reference to figure 2f), annealing obtains back side p+ layer (with reference to figure 2g), finally forms backplate (with reference to figure 2h).This process more complicated can be found out, need through techniques such as energetic ion injection, laser annealing, back side photoetching, equipment needed thereby is with high costs, and these techniques are all complete when thin slice below, misoperation may cause fragment, or damage established Facad structure, technology difficulty and cost are all very high.
Summary of the invention
The present invention is intended to solve one of technical problem in correlation technique at least to a certain extent.For this reason, the object of the invention is to propose a kind of to there is simple, that yield is high, process costs is low inverse conductivity type IGBT structure and forming method thereof.
In view of this, the formation method of the inverse conductivity type IGBT structure of first aspect present invention embodiment, can comprise the following steps: the substrate providing the first conduction type; Multiple groove is formed in described substrate top; The resilient coating of the second conduction type is formed in described substrate; The Withstand voltage layer of the second conduction type is formed on described resilient coating; The Facad structure of device is formed on described Withstand voltage layer; Thinning back side is carried out to exposing the staggered back side pattern of described substrate and resilient coating figure to described substrate; And form metal layer on back at a thinning side surface.
According to the formation method of the inverse conductivity type IGBT structure of the embodiment of the present invention compared with existing conventional semiconductor devices production technology, difference is to utilize the mode of grooving then long epitaxial loayer backfill, completes the preparation manufacturing Withstand voltage layer rectangular structure.The method eliminates existing technique and does the technique that the costs such as energetic ion injection, laser annealing, back side photoetching are high, operation is difficult from the back side, infusion of financial resources transformation is not needed to produce line, significantly reduce difficulty and the cost of production simultaneously, improve yield, reach the object reducing inverse conductivity type IGBT structure production cost.
In one embodiment of the invention, described depth of groove is 20-200 μm, and width is 0.5-2 μm, and FLUTE ANGLE is 87-90 °.
In one embodiment of the invention, describedly form multiple groove in described substrate top and specifically comprise step: form barrier layer in described substrate; Etched features is made by lithography in described barrier layer; Described multiple groove is etched in described substrate top; And remove the barrier layer of described remnants.
In one embodiment of the invention, described barrier layer thickness is greater than 200nm.
In one embodiment of the invention, described thinning after, before described formation metal layer on back, the second conduction type particle is injected to described thinning side and then anneals, to form ohmic contact.
In one embodiment of the invention, implantation concentration is 0.5 × 10
14-5 × 10
15cm
-2, annealing temperature is 300-500 DEG C.
In one embodiment of the invention, the thickness of described substrate is greater than 400 μm, and resistivity is 0.02-0.04ohmcm.
In one embodiment of the invention, the thickness of described resilient coating is 5-30 μm, and resistivity is 0.5-10ohmcm.
In one embodiment of the invention, the thickness of described Withstand voltage layer is 30-130 μm, and resistivity is 35-120ohmcm.
In view of this, the inverse conductivity type IGBT structure of second aspect present invention embodiment, by above-mentioned any one formation method preparation.
Inverse conductivity type IGBT structure according to the embodiment of the present invention has the advantages such as low cost of manufacture.
Accompanying drawing explanation
Fig. 1 is the structural representation of existing inverse conductivity type IGBT structure.
Fig. 2 a to Fig. 2 h is the process schematic of existing inverse conductivity type IGBT structure formation method.
Fig. 3 is the flow chart of the inverse conductivity type IGBT structure formation method of the embodiment of the present invention.
Fig. 4 a to Fig. 4 i is the process schematic of the inverse conductivity type IGBT structure formation method of the embodiment of the present invention.
Embodiment
Be described below in detail embodiments of the invention, the example of described embodiment is shown in the drawings, and wherein same or similar label represents same or similar element or has element that is identical or similar functions from start to finish.Be exemplary below by the embodiment be described with reference to the drawings, be intended to for explaining the present invention, and can not limitation of the present invention be interpreted as.
The formation method of the inverse conductivity type IGBT structure of first aspect present invention embodiment, as shown in Figure 3, comprises the following steps:
A., the substrate of the first conduction type is provided.
Particularly, this substrate conduction type should the conduction type of Withstand voltage layer in the last inverse conductivity type IGBT structure formed contrary.Such as, plan manufactures the inverse conductivity type IGBT structure that Withstand voltage layer is n-Si, then need the Si substrate adopting p+ doping.
B. multiple groove is formed in substrate top.
It should be noted that, the position of excavation groove is corresponding with the follow-up default position forming FRD.Particularly, first barrier layer can be formed in substrate; Etched features is made by lithography in barrier layer; Multiple groove is etched in substrate top; Finally remove remaining barrier layer.The degree of depth of groove depends primarily on the thickness of the follow-up wafer that can process, in follow-up technique for thinning back side, the minimum remaining thickness of wafer (namely ensure wafer can not fragmentation, thickness at least) larger then depth of groove is larger.The width of groove depends primarily on the size of the follow-up FRD that can process, and the cross-sectional area of FRD is larger, then recess width is larger.The number of groove and position distribution also depend primarily on number and the position distribution of FRD.
C. the resilient coating of the second conduction type is formed in substrate.
Particularly, the cushioning layer material of depositing second conductive type, first cushioning layer material fills up multiple grooves of substrate top, then piles up the resilient coating of formation second conduction type further in substrate.Now, top has the resilient coating that the substrate of multiple groove and bottom have multiple projection and combines closely.
D. on resilient coating, form the Withstand voltage layer of the second conduction type.
Particularly, the semi-conducting material of depositing second conductive type can be continued to form the Withstand voltage layer of the second conduction type on resilient coating by the technique such as vapour deposition, molecular beam epitaxy.
E. on Withstand voltage layer, form the Facad structure of device.
Particularly, the Facad structures such as specific well region, doped region, grid oxide layer, separator, front metal layer can be formed by semiconductor technologies such as common deposition, photoetching, etching, injection, annealing on Withstand voltage layer.It should be noted that, those skilled in the art can according to actual conditions flexible design Facad structure and concrete forming step thereof, and the present invention does not limit.
F. thinning back side is carried out to exposing the staggered back side pattern of substrate and resilient coating figure to substrate.
Particularly, can be corroded from the bottom of substrate by the mode of chemical corrosion and/or mechanical erosion, this process and thinning back side.Thinning back side to the current basal surface of device exposes the staggered back side pattern of substrate and resilient coating figure simultaneously.
G. metal layer on back is formed at a thinning side surface.
Particularly, the basal surface (i.e. a thinning side surface) of the device that can be obtained in above-mentioned steps by the mode that sputters or deposit forms the metal layer on back of the metal material (such as silver, copper, aluminium etc.) of high conductivity.
The formation method of the inverse conductivity type IGBT structure of the present embodiment is compared with existing conventional semiconductor devices production technology, and difference is to utilize the mode of grooving then long epitaxial loayer backfill, completes the preparation manufacturing Withstand voltage layer rectangular structure.The method eliminates existing technique and does the technique that the costs such as energetic ion injection, laser annealing, back side photoetching are high, operation is difficult from the back side, infusion of financial resources transformation is not needed to produce line, significantly reduce difficulty and the cost of production simultaneously, improve yield, reach the object reducing inverse conductivity type IGBT structure production cost.
The inverse conductivity type IGBT structure of second aspect present invention embodiment, this can be prepared by the above-disclosed formation method against conductivity type IGBT structure against conductivity type IGBT structure.The inverse conductivity type IGBT structure of this embodiment has the advantages such as low cost of manufacture.
For making those skilled in the art understand content of the present invention better, the concrete formation method that applicant's composition graphs 4a to Fig. 4 i introduces the inverse conductivity type IGBT structure of an example is in detail as follows:
(1) as shown in fig. 4 a, the substrate 409 of the first conduction type is provided.This substrate 409 is p-type monocrystalline silicon wafer crystal, and resistivity is 0.02-0.04ohmcm (such as, about about 0.03ohmcm), and original depth is more than 400um.
(2) as shown in Figure 4 b, the barrier layer 411 of first deposit layer of silicon dioxide or silicon nitride on substrate 409, thickness is at more than 200nm.The method of recycling photoetching processes etched features, and then etches, and barrier layer is carved and opens.Can by the regional protectionism of not etching groove time barrier layer 411 is mainly used in subsequent etching groove.
(3) as illustrated in fig. 4 c, dig multiple groove along barrier layer 411, object is the N-type conductive layer that the multiple longitudinal direction of formation runs through wafer, using the current channel as fly-wheel diode.The degree of depth of groove is about 20-200um (depending primarily on the thickness of the follow-up wafer that can process), width is about 0.5-2um (depending primarily on the size of the follow-up fly-wheel diode that can process), and the angle of groove is 87-90 °.
(4) as shown in figure 4d, barrier layer 411 is removed, leave the substrate 409 that top has multiple groove.
(5) as shown in fig 4e, by the buffering 404 layers of epitaxial growth N-shaped, multiple groove is filled.The thickness of resilient coating 404 is about 5-30um, and resistivity is about 0.5-10ohmcm.
(6) as shown in fig. 4f, by epitaxial growth n-Withstand voltage layer 403.Withstand voltage according to institute's working apparatus part, the thickness of Withstand voltage layer 403 is about 30-130um, and resistivity is about 35ohmcm-120ohmcm.
(7) as shown in figure 4g, according to the requirement of made device electrology characteristic, adopt known technology, as the method such as ion implantation and diffusion, complete the making in device front.The Facad structure formed can comprise p trap 401, n+ doped region 402, grid oxide layer 405, polysilicon layer 406, separator 407, front metal layer 408.
(8) as shown in figure 4h, carry out thinning back side, note the position that will be thinned to bottom portion of groove place.Side thinning so just exposes the staggered back side pattern of n-Si (coming from resilient coating 403) and p+Si (coming from substrate 409) figure.N-Si is as the region of FRD, and p+Si is then as the region of IGBT current lead-through.
(9) as shown in figure 4i.At thinning side implant n-type doping particle, implantation concentration is 0.5 × 10
14-5 × 10
15cm
-1(such as, be about 1 × 10
14cm
-1).Then annealing activates and forms ohmic contact, and annealing temperature is 300-500 DEG C (such as, being about about 400 DEG C).Last evaporation one deck metal layer on back 410 is as electrode.
So far, inverse conductivity type IGBT structure is obtained.
In describing the invention, it will be appreciated that, term " " center ", " longitudinal direction ", " transverse direction ", " length ", " width ", " thickness ", " on ", D score, " front ", " afterwards ", " left side ", " right side ", " vertically ", " level ", " top ", " end " " interior ", " outward ", " clockwise ", " counterclockwise ", " axis ", " radial direction ", orientation or the position relationship of the instruction such as " circumference " are based on orientation shown in the drawings or position relationship, only the present invention for convenience of description and simplified characterization, instead of indicate or imply that the device of indication or element must have specific orientation, with specific azimuth configuration and operation, therefore limitation of the present invention can not be interpreted as.
In addition, term " first ", " second " only for describing object, and can not be interpreted as instruction or hint relative importance or imply the quantity indicating indicated technical characteristic.Thus, be limited with " first ", the feature of " second " can express or impliedly comprise at least one this feature.In describing the invention, the implication of " multiple " is at least two, such as two, three etc., unless otherwise expressly limited specifically.
In the present invention, unless otherwise clearly defined and limited, the term such as term " installation ", " being connected ", " connection ", " fixing " should be interpreted broadly, and such as, can be fixedly connected with, also can be removably connect, or integral; Can be mechanical connection, also can be electrical connection; Can be directly be connected, also indirectly can be connected by intermediary, can be the connection of two element internals or the interaction relationship of two elements, unless otherwise clear and definite restriction.For the ordinary skill in the art, above-mentioned term concrete meaning in the present invention can be understood as the case may be.
In the present invention, unless otherwise clearly defined and limited, fisrt feature second feature " on " or D score can be that the first and second features directly contact, or the first and second features are by intermediary indirect contact.And, fisrt feature second feature " on ", " top " and " above " but fisrt feature directly over second feature or oblique upper, or only represent that fisrt feature level height is higher than second feature.Fisrt feature second feature " under ", " below " and " below " can be fisrt feature immediately below second feature or tiltedly below, or only represent that fisrt feature level height is less than second feature.
In the description of this specification, specific features, structure, material or feature that the description of reference term " embodiment ", " some embodiments ", " example ", " concrete example " or " some examples " etc. means to describe in conjunction with this embodiment or example are contained at least one embodiment of the present invention or example.In this manual, to the schematic representation of above-mentioned term not must for be identical embodiment or example.And the specific features of description, structure, material or feature can combine in one or more embodiment in office or example in an appropriate manner.In addition, when not conflicting, the feature of the different embodiment described in this specification or example and different embodiment or example can carry out combining and combining by those skilled in the art.
Although illustrate and describe embodiments of the invention above, be understandable that, above-described embodiment is exemplary, can not be interpreted as limitation of the present invention, and those of ordinary skill in the art can change above-described embodiment within the scope of the invention, revises, replace and modification.
Claims (10)
1. a formation method for inverse conductivity type IGBT structure, is characterized in that, comprise the following steps:
The substrate of the first conduction type is provided;
Multiple groove is formed in described substrate top;
The resilient coating of the second conduction type is formed in described substrate;
The Withstand voltage layer of the second conduction type is formed on described resilient coating;
The Facad structure of device is formed on described Withstand voltage layer;
Thinning back side is carried out to exposing the staggered back side pattern of described substrate and resilient coating figure to described substrate; And
Metal layer on back is formed at a thinning side surface.
2. the formation method of inverse conductivity type IGBT structure according to claim 1, it is characterized in that, described depth of groove is 20-200 μm, and width is 0.5-2 μm, and FLUTE ANGLE is 87-90 °.
3. the formation method of inverse conductivity type IGBT structure according to claim 1, is characterized in that, describedly forms multiple groove in described substrate top and specifically comprises step:
Barrier layer is formed in described substrate;
Etched features is made by lithography in described barrier layer;
Described multiple groove is etched in described substrate top; And
Remove the barrier layer of described remnants.
4. the formation method of inverse conductivity type IGBT structure according to claim 3, it is characterized in that, described barrier layer thickness is greater than 200nm.
5. the formation method of inverse conductivity type IGBT structure according to claim 1, is characterized in that, described thinning after, before described formation metal layer on back, the second conduction type particle is injected to described thinning side and then anneals, to form ohmic contact.
6. the formation method of inverse conductivity type IGBT structure according to claim 5, it is characterized in that, implantation concentration is 0.5 × 10
14-5 × 10
15cm
-2, annealing temperature is 300-500 DEG C.
7. the formation method of the inverse conductivity type IGBT structure according to any one of claim 1-5, it is characterized in that, the thickness of described substrate is greater than 400 μm, resistivity is 0.02-0.04ohmcm.
8. the formation method of the inverse conductivity type IGBT structure according to any one of claim 1-5, is characterized in that, the thickness of described resilient coating is 5-30 μm, and resistivity is 0.5-10ohmcm.
9. the formation method of the inverse conductivity type IGBT structure according to any one of claim 1-5, is characterized in that, the thickness of described Withstand voltage layer is 30-130 μm, and resistivity is 35-120ohmcm.
10. an inverse conductivity type IGBT structure, be is characterized in that, prepared by the formation method of the inverse conductivity type IGBT structure described in any one of claim 1-9.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410310441.1A CN105225946A (en) | 2014-06-30 | 2014-06-30 | Inverse conductivity type IGBT structure and forming method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410310441.1A CN105225946A (en) | 2014-06-30 | 2014-06-30 | Inverse conductivity type IGBT structure and forming method thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
CN105225946A true CN105225946A (en) | 2016-01-06 |
Family
ID=54994826
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410310441.1A Pending CN105225946A (en) | 2014-06-30 | 2014-06-30 | Inverse conductivity type IGBT structure and forming method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN105225946A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108054199A (en) * | 2017-12-18 | 2018-05-18 | 深圳市晶特智造科技有限公司 | Igbt and preparation method thereof |
CN108538721A (en) * | 2018-03-30 | 2018-09-14 | 苏州凤凰芯电子科技有限公司 | A kind of IGBT device back side production method |
CN111540678A (en) * | 2020-05-19 | 2020-08-14 | 上海华虹宏力半导体制造有限公司 | RC IGBT device and manufacturing method thereof |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101640186A (en) * | 2009-07-20 | 2010-02-03 | 无锡凤凰半导体科技有限公司 | Manufacturing method of isolated gate bipolar transistor integrated fast recovery diode |
US20130029461A1 (en) * | 2011-07-27 | 2013-01-31 | Anup Bhalla | Methods for fabricating anode shorted field stop insulated gate bipolar transistor |
CN103035691A (en) * | 2012-03-12 | 2013-04-10 | 上海华虹Nec电子有限公司 | Reverse conducting insulated gate bipolar transistor (IGBT) semiconductor device and manufacture method thereof |
US20140070265A1 (en) * | 2012-09-12 | 2014-03-13 | Texas Instruments Incorporated | Fast switching igbt with embedded emitter shorting contacts and method for making same |
CN103871876A (en) * | 2012-12-07 | 2014-06-18 | 中国科学院微电子研究所 | Preparation method of reverse conducting IGBT |
-
2014
- 2014-06-30 CN CN201410310441.1A patent/CN105225946A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101640186A (en) * | 2009-07-20 | 2010-02-03 | 无锡凤凰半导体科技有限公司 | Manufacturing method of isolated gate bipolar transistor integrated fast recovery diode |
US20130029461A1 (en) * | 2011-07-27 | 2013-01-31 | Anup Bhalla | Methods for fabricating anode shorted field stop insulated gate bipolar transistor |
CN103035691A (en) * | 2012-03-12 | 2013-04-10 | 上海华虹Nec电子有限公司 | Reverse conducting insulated gate bipolar transistor (IGBT) semiconductor device and manufacture method thereof |
US20140070265A1 (en) * | 2012-09-12 | 2014-03-13 | Texas Instruments Incorporated | Fast switching igbt with embedded emitter shorting contacts and method for making same |
CN103871876A (en) * | 2012-12-07 | 2014-06-18 | 中国科学院微电子研究所 | Preparation method of reverse conducting IGBT |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108054199A (en) * | 2017-12-18 | 2018-05-18 | 深圳市晶特智造科技有限公司 | Igbt and preparation method thereof |
CN108538721A (en) * | 2018-03-30 | 2018-09-14 | 苏州凤凰芯电子科技有限公司 | A kind of IGBT device back side production method |
CN111540678A (en) * | 2020-05-19 | 2020-08-14 | 上海华虹宏力半导体制造有限公司 | RC IGBT device and manufacturing method thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6115678B1 (en) | Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device | |
US9184261B2 (en) | Semiconductor device having field plate electrode and method for manufacturing the same | |
US20180026132A1 (en) | METHODS OF REDUCING THE ELECTRICAL AND THERMAL RESISTANCE OF SiC SUBSTRATES AND DEVICES MADE THEREBY | |
US9660047B2 (en) | Method for forming semiconductor components having self-aligned trench contacts | |
KR102614549B1 (en) | Trench field effect transistor structure and manufacturing method | |
JP6189045B2 (en) | Manufacturing method of semiconductor device | |
US8313995B2 (en) | Method for manufacturing a semiconductor device | |
CN104733531A (en) | Dual oxide trench gate power mosfet using oxide filled trench | |
CN104067384A (en) | Method and system for a gallium nitride vertical JFET with self-aligned source and gate | |
JP5583846B2 (en) | Semiconductor device | |
US8492221B2 (en) | Method for fabricating power semiconductor device with super junction structure | |
CN103681315A (en) | Method for forming buried layer | |
CN105225946A (en) | Inverse conductivity type IGBT structure and forming method thereof | |
US8803230B2 (en) | Semiconductor transistor having trench contacts and method for forming therefor | |
CN106935645B (en) | MOSFET power device with bottom gate | |
JP2016521460A (en) | Method for forming an implantation region normally disturbed in a heterojunction transistor | |
US7923330B2 (en) | Method for manufacturing a semiconductor device | |
US20230093383A1 (en) | Super-junction device and manufacturing method thereof | |
CN105280493A (en) | Trench IGBT device manufacturing method | |
JP7534285B2 (en) | Semiconductor device and method for manufacturing the same | |
CN105762077A (en) | Manufacturing method of insulated gate bipolar transistor | |
KR20120082441A (en) | Improved trench termination structure | |
CN104008975A (en) | Manufacturing method of groove-type power MOS transistor | |
CN117594658B (en) | Groove type field effect transistor and preparation method thereof | |
US20220130969A1 (en) | Power device with a contact hole on a sloped ild region |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160106 |