CN105225377B - A kind of question-and-answer game apparatus - Google Patents

Abstract

The present invention relates to a kind of question-and-answer game apparatus, including button inputting circuits, main control circuit and latch display circuit, main control circuit includes a data selector, a counter and a level selection circuit.The question-and-answer game apparatus are when in use, when a certain wheel is raced to be the first to answer a question, some player successfully races to be the first to answer a question, after the completion of racing to be the first to answer a question, its priority is arranged to minimum, then carry out next round to race to be the first to answer a question, so ensure that the fair relatively raced to be the first to answer a question, it is to avoid the priority of each player it is constant from beginning to end and to the inequitable situation of player of lower priority.

Description

A kind of question-and-answer game apparatus

Technical field

The present invention relates to a kind of question-and-answer game apparatus, belong to electronic circuit field.

Background technology

Question-and-answer game apparatus have turned into one of ordinary articles in various large-scale games.Existing question-and-answer game apparatus mainly have following two set Meter method：One kind is that, using single-chip microcomputer as core design question-and-answer game apparatus, this method mainly determines to race to be the first to answer a question player by software inquiry, although It is more flexible, but cost is higher, and performing speed, also purer hardware is slow；Another designed using digital circuit question-and-answer game apparatus, This method mainly determines powerful player by priority encoder, and this method performs speed quickly.

However, when many people race to be the first to answer a question, might have many people and race to be the first to answer a question button while pressing.Realized and raced to be the first to answer a question using priority encoder During device, the button of racing to be the first to answer a question of each player has the priority of acquiescence, and can not change.For using lower priority button Player is inequitable.

The content of the invention

It is an object of the invention to provide a kind of question-and-answer game apparatus, to solve the question-and-answer game apparatus of existing use priority encoder to excellent The inequitable problem of the low player of first level.

To achieve the above object, the solution of the present invention includes a kind of question-and-answer game apparatus, including button inputting circuits, main control circuit With latch display circuit, the main control circuit includes a data selector, a counter and a level selection circuit, The button inputting circuits include several buttons, the data input pin of each button correspondence connection data selector, data The data input pin of display circuit is latched in the selection input correspondence connection of selector, and the output end correspondence of data selector is connected The input of display circuit is latched, the control signal of the output end correspondence linkage counter of display circuit is latched, counter The selection input of data output end correspondence connection data selector, the level selection circuit is used to export high level or low electricity It is flat, the LD pins of the level selection circuit output connection counter.

The latch display circuit includes two latch, a full adder and a display circuit, the data selection The data input pin of selection input correspondence the first latch of connection of device, the output end correspondence connection first of data selector is locked The input of the input of storage and the second latch, the input of the output end correspondence connection full adder of the first latch, entirely Plus the data input pin of the output end correspondence linkage counter of device, the control of the output end correspondence linkage counter of the first latch Input, the input of the output end correspondence connection display circuit of full adder.

The output end of the data selector connects an input pin and clock pins and the second lock for the first latch An input pin and clock pins for storage, the output pin control connection counter of first latch Clock enables pin, and the LD pins of the counter connect the reset pin of second latch.

One active crystal oscillator is connected to the clock pins of the counter.

The selection input of the data selector is connected to a NAND gate, and the output end of the NAND gate is connected to described The clearing pin of counter.

Each button output is connected to an OR gate, and the output end of the OR gate is used for the energization for controlling a buzzer.

The output end of the level selection circuit connects first and door by a NOT gate, and the output end of the OR gate also connects Connect this first and door, this first is used for the energization for controlling a buzzer with the output end of door.

The question-and-answer game apparatus also include a reset circuit, and the reset circuit is connected to second and door, the NAND gate Output end is connected to second and door, the second clearing pin for being connected to the counter with the output end of door.

The question-and-answer game apparatus also include the 3rd latch, and the output end correspondence of the button inputting circuits connects the 3rd latch The data input pin of device, each output pin correspondence one light emitting diode of connection of the 3rd latch, described first latches The reset pin of the reset pin of device and the 3rd latch connects the reset circuit, the output end of the NAND gate connect this The clock pins of three latch.

When in use, when a certain wheel is raced to be the first to answer a question, some player successfully races to be the first to answer a question the question-and-answer game apparatus, after the completion of racing to be the first to answer a question, and its is excellent First level is arranged to minimum, then carry out next round and race to be the first to answer a question, so ensure that the fair relatively raced to be the first to answer a question, it is to avoid each player Priority it is constant from beginning to end and to the inequitable situation of player of lower priority.

Brief description of the drawings

Fig. 1 is the circuit diagram of question-and-answer game apparatus.

Embodiment

The present invention will be further described in detail below in conjunction with the accompanying drawings.

The question-and-answer game apparatus that the present invention is provided include button inputting circuits, main control circuit and latch display circuit, main control electricity Road includes a data selector, a counter and a level selection circuit, and button inputting circuits include several buttons, Display electricity is latched in the data input pin of each button correspondence connection data selector, the selection input correspondence connection of data selector The input of display circuit is latched in the data input pin on road, the output end correspondence connection of data selector, latches display circuit The control signal of output end correspondence linkage counter, the selection of the data output end correspondence connection data selector of counter is defeated Enter end, level selection circuit is used to export high level or low level, and level selection circuit exports the LD pins of linkage counter.Electricity During flat selection circuit output high level, if player pushes button, now, the numbering that display circuit shows the player is latched； When being raced to be the first to answer a question next time, control level selection circuit output low level latches the numbering of a upper player, and counter is from upper The numbering of one player is started counting up, will the priority of a upper player be set to minimum, realize the fair relatively raced to be the first to answer a question.

Specifically, the present embodiment provides a kind of physical circuit of question-and-answer game apparatus, as shown in figure 1, including data selector 74LS151, tetrad counter 74LS163, three latch are 74LS273 and full adder 74LS283, export aobvious It is Seven pieces digital displaying decoder 74LS48 to show circuit.

Button inputting circuits are made up of 8 buttons, one player of each button correspondence, and each player's correspondence control one is pressed Key, one end of 8 buttons is all connected with+5V power supplys, and the other end is connected respectively a pull down resistor, while connecting data respectively Device 74LS151 data-out pin D0~D7.When button is not pressed, data selector 74LS151 data input is drawn Pin D0~D7 is low level, when there is button to press, the corresponding pin input high level of the button pressed；Data selector 74LS151 selects input pin A, B and C to determine some data in pin Y outputs D0~D7 by it.

8 output ends of button inputting circuits connect input pin D0~D7 of latch 2, while button inputting circuits 8 output ends are output to the OR gate D8 of one 2 by the OR gate D6 and D7 of 24 respectively, the output of the OR gate D8 of 2 The clock pins CP of end connection latch 2, output pin Q0~Q7 of latch 2 are connected respectively a light emitting diode, When initial power-on, Q0~Q7 is that 0,8 light emitting diodes all extinguish；When there is some button to press, a corresponding hair Optical diode is lighted.The electrification reset circuit that the reset pin of latch 2/MR connections are made up of resistance R10 and electric capacity C1.

Data selector 74LS151 selection input pin A, B and C are connected respectively the input pin D0 of latch 1 ~D2, and selection input pin A, B and C are connected respectively counter 74LS163 output pin Q0~Q2.Data selector 74LS151 output pin Y connects the clock pins CP and data-out pin D0 of latch 3 simultaneously, when there is button to press, Data-out pin D0 is changed into 1 from 0, and it is 1 it is exported Q0, and then Seven pieces digital displaying decoder 74LS48 is started display latch Player numbering.

Data selector 74LS151 selection input pin A, B and C are also connected with three input nand gate D5 input, with The input of NOT gate D5 outputs connection two and a door D3 input pin, two inputs are connected by electricity with door D3 another input pin Hinder the reset circuit of R10 and electric capacity C1 compositions.Two inputs export the clearing for being connected tetrad counter 74LS163 with door D3 Pin CR, its function mainly resets tetrad counter 74LS163 output pin Q0~Q2 in system electrification, In addition when tetrad counter 74LS163 count down to 0111, Q0~Q3 is reset to 0000, so that by tetrad Counter 74LS163 is changed into triad counter.

In addition, the active crystal oscillator output connection tetrad counter 74LS163 of 1MHz clock pins CP, is used as the meter The clock source of number device.

Data selector 74LS151 output pin Y connects the data-out pin D3 and clock pins of latch 1 simultaneously CP.When initial power-on, data output pins Q0~Q3 of latch 1 is 0；After thering is player to press corresponding button, data Selector 74LS151 output pin Y is 1 by 0 saltus step, then latch 1 latches 74SL151 pin A, B, C and Y data.

Data output pins Q0~Q2 of latch 1 is connected respectively full adder 74LS283 pin A1~A3, latches The data output pins Q3 of device 1 enables pin by the NOT gate D4 clocks for being connected to tetrad counter 74LS163 CEp and CEt.Full adder 74LS283 pin B1 connection+5V high level, A4, B2~B4 and C0 connection low levels (ground connection), from And data selector 74LS151 output data is added 1, and exported from full adder 74LS283 output pin S1~S4.Quan Jia Device 74LS283 output pin S1~S4 connection Seven pieces digital displaying decoders 74LS48 input pin A~D, Seven pieces digital displaying decoding The output pin Q0 of device 74LS48 input pin/BI connections latch 3.Seven pieces digital displaying decoder 74LS48 output pin a Pin a~g of~g connection common cathode charactrons；Only after player, which presses, races to be the first to answer a question button, data selector 74LS151's is defeated 1 could be changed into from 0 by going out pin Y, and Seven pieces digital displaying decoder 74LS48 could show that player numbers, and 0 is otherwise shown always.

Tetrad counter 74LS163 LD pins connect single-pole double-throw switch (SPDT) K9 common port, and K9's is another Two ends connect pull-up resistor R11 and ground, resistance R11 other end connection+5V power supplys respectively.Switch K9, resistance R11 and ground composition One can export high level and low level selection circuit.Tetrad counter 74LS163 LD pins are connected simultaneously NOT gate D1 input and the input of reset pin/MR of latch 3, NOT gate D1 output connection two and a door D2 input, And the input of data selector 74LS151 enable pin/E, OR gate D8 output connection two and door D2 another input.When When single-pole double-throw switch (SPDT) K9 pushes low level, system is in SBR, and NOT gate D1 output high level counts tetrad Device 74LS163 input pins D0~D3 data are loaded into its output pin Q0~Q3, at the same two inputs and door D2 output by Two input OR gate D8 output pin is determined that when there is button to press, OR gate D8 output pin is changed into 1 from 0, so as to pass through Resistance R9 and triode T1 driving buzzer warnings；When single-pole double-throw switch (SPDT) K9 pushes high level, two inputs are defeated with door D2's It is 0 to go out permanent, will not drive buzzer warning.

The data that full adder 74LS283 output pin S1~S3 connects tetrad counter 74LS163 simultaneously are defeated Enter pin D0~D2；During initial power-on, the input pin D2~D0 for making tetrad counter 74LS163 is 001, makes four Binary counter 74LS163 is started counting up from 0001；After some player's button, full adder 74LS283 output pin S1 ~S3 is that player's numbering data add 1, then single-pole double-throw switch (SPDT) K9 is pushed after high level from low level, tetrad counter 74LS163 loads this data into its output pin Q0~Q2, so as to change tetrad counter 74LS163 counting Initial value.

One concrete application of the question-and-answer game apparatus given below：

It is assumed that the order that first time player pushes button when racing to be the first to answer a question is K3 (while K5), K6 ...；When second of player races to be the first to answer a question The order pushed button is still K3 (while K5), K6 ....

The main working process of question-and-answer game apparatus is as follows：

After upper electricity, the reset circuit of resistance R10 and electric capacity C1 compositions is by tetrad counter 74LS163 data outputs Pin Q0~Q3 is reset；The output pin Q0 of latch 2~Q7 is reset simultaneously, so as to extinguish light emitting diode T1~T8；Together When Q0~Q3 of latch 1 is reset so that tetrad counter 74LS163 pin D3~D0 is 0001.

When single-pole double-throw switch (SPDT) K9 pushes low level, system is in SBR, due to tetrad counter 74LS163 pin LD is low level, therefore in number stress states, now tetrad counter 74LS163 is by its pin D3~D0 data are loaded into Q3~Q0；Because NOT gate D1 is output as high level, data selector 74LS151 is closed, is made It is 0 that it, which exports A, B and C perseverance,；Because Seven pieces digital displaying decoder 74LS48 pin/BI is low level 0, therefore numeral method 0.

If now there is player's violation button, such as K3 (while K5) is pressed, and latch 2 latches key-press status and is 00010100, so as to light light emitting diode T2 and T4；Two inputs are output as 1 with door D2 simultaneously, buzzer is sent one Lower alarm；Host once hears an acoustic alarm sound, you can determine violation player according to light emitting diode, but now digital Pipe shows 0 always.

When single-pole double-throw switch (SPDT) K9 pushes high level, tetrad counter 74LS163 starts to count from 001, by Do not pressed in button K2, so data selector 74LS151 pin Y is always maintained at low level, numeral method 0；Four When binary counter 74LS163 count down to 010, because K3 buttons are pressed, therefore data selector 74LS151 pin Y is jumped by 0 1 is changed to, then it is 0 that tetrad counter 74LS163 clock, which enables pin CEp and CEt, so that tetrad is counted Device 74LS163 is in hold mode, and it exports Q0~Q2 and keeps constant；The output of latch 3 simultaneously 1, the output of latch 1 1010, Full adder 74LS283 outputs 0011, player's numbering 3 that numeral method is raced to be the first to answer a question.

Now, after host confirms that player 3 races to be the first to answer a question successfully, when being raced to be the first to answer a question next time, first single-pole double-throw switch (SPDT) K9 is dialled To low level, make numeral method 0, while latch is raced to be the first to answer a question into successful player's numbering 011, that is, full adder just now 74LS283 output is loaded into tetrad counter 74LS163 output Q0~Q2；Then, host is by single-pole double throw Switch K9 pushes high level, and tetrad counter 74LS163 starts to count from 011, that is, will race to be the first to answer a question just now successfully Player has been arranged to lowest priority, because button K4 is not pressed, so data selector 74LS151 pin Y is protected always Hold low level, numeral method 0；When tetrad counter 74LS163 count down to 100, because K5 buttons are pressed, therefore data Selector 74LS151 pin Y jumps to 1 by 0, then tetrad counter 74LS163 clock enable pin CEp and CEt is 0, so that tetrad counter 74LS163 is in hold mode, it exports Q0~Q2 and keeps constant；Lock simultaneously The output of storage 31, the output of latch 2 1100, full adder 74LS283 outputs 0101, player's numbering 5 that numeral method is raced to be the first to answer a question.

In a word, the execution speed of the circuit is ns grades quickly；It is longer that button presses the time of upspringing, and is ms grades.The circuit is adopted With scan mode, counter 74LS163 output Q0~Q2 timing since 0 is up to 7, then circulated；Counter 74LS163 Q0~Q2 connection data selectors 74LS151 A, B and C is exported, so that priority selection data selector 74LS151 D0~ D7, when A, B and C are 000, selection data selector 74LS151 D0, when A, B and C are 111, selects data selector 74LS151 D7, that is, it have selected button K1~K8, i.e. player 1~8；Data selector 74LS151 output pin Y is defeated What is gone out is exactly the D0~D7 chosen value, only has button to press, and Y is just 1, is otherwise 0；Only Y be 1, could trigger behind Full adder and display decoder work；Because counter 74LS163 output area is 0~7, so adding full adder Counter 74LS163 output valve is added 1 by 74LS283, full adder, so that correspondence player numbering 1~8；After system work, even if Single-pole double-throw switch (SPDT) K9 pulls low level again, although display decoder is by clear 0, due to the presence of latch, full adder 74LS283 output S1~S4 keeps constant；When single-pole double-throw switch (SPDT) K9 pulls high level again, counter 74LS163 from The value starts scanning, and because last time count value has been added 1 by full adder, success is raced to be the first to answer a question in some player so as to be achieved that Afterwards, its priority is arranged to minimum, then carries out next round and race to be the first to answer a question, so as to ensure the fair relatively raced to be the first to answer a question.

In above-described embodiment, question-and-answer game apparatus also include the circuit structure for preventing that player from designing in violation of rules and regulations, including each button pair The luminous tube and buzzer answered and respective circuit composition etc., this is a kind of embodiment of optimization, is used as others implementation Example, these circuit structures can also be not provided with.

Specific embodiment is presented above, but the present invention is not limited to described embodiment.The base of the present invention This thinking is above-mentioned basic scheme, for those of ordinary skill in the art, according to the teachings of the present invention, designs various changes The model of shape, formula, parameter simultaneously need not spend creative work.It is right without departing from the principles and spirit of the present invention The change, modification, replacement and modification that embodiment is carried out are still fallen within protection scope of the present invention.

Claims (9)

1. a kind of question-and-answer game apparatus, including button inputting circuits, main control circuit and latch display circuit, the button inputting circuits bag Include several buttons, it is characterised in that the main control circuit includes a data selector, a counter and a level Selection circuit, the data input pin of each button correspondence connection data selector of the button inputting circuits, data selection The data input pin of display circuit is latched in the selection input correspondence connection of device, and the output end correspondence connection of data selector is latched The input of display circuit, latches the control signal of the output end correspondence linkage counter of display circuit, the data of counter The selection input of output end correspondence connection data selector, the level selection circuit is used to export high level or low level, The LD pins of the level selection circuit output connection counter.

2. question-and-answer game apparatus according to claim 1, it is characterised in that the latch display circuit includes two latch, one Individual full adder and a display circuit, the data input of selection input correspondence the first latch of connection of the data selector End, the input and the input of the second latch of output end correspondence the first latch of connection of data selector, first latches The input of the output end correspondence connection full adder of device, the data input pin of the output end correspondence linkage counter of full adder, the The control signal of the output end correspondence linkage counter of one latch, the output end correspondence of full adder connects the defeated of display circuit Enter end.

3. question-and-answer game apparatus according to claim 2, it is characterised in that the output end connection first of the data selector is latched One input pin of device and clock pins and the input pin and clock pins of the second latch, first latch The clock of the output pin control connection counter enable pin, the LD pins connection described second of the counter The reset pin of latch.

4. question-and-answer game apparatus according to claim 2, it is characterised in that an active crystal oscillator is connected to the clock of the counter Pin.

5. question-and-answer game apparatus according to claim 3, it is characterised in that the selection input of the data selector is connected to one Individual NAND gate, the output end of the NAND gate is connected to the clearing pin of the counter.

6. question-and-answer game apparatus according to claim 2, it is characterised in that each button output is connected to an OR gate, should or The output end of door is used for the energization for controlling a buzzer.

7. question-and-answer game apparatus according to claim 6, it is characterised in that the output end of the level selection circuit is non-by one Door connection first and door, the output end of the OR gate also connect this first and door, this first is used to control one with the output end of door The energization of individual buzzer.

8. question-and-answer game apparatus according to claim 5, it is characterised in that the question-and-answer game apparatus also include a reset circuit, described Reset circuit is connected to second and door, and the output end of the NAND gate is connected to second and door, and this second connects with the output end of door It is connected to the clearing pin of the counter.

9. question-and-answer game apparatus according to claim 8, it is characterised in that the question-and-answer game apparatus also include the 3rd latch, described to press The output end correspondence of key input circuit connects the data input pin of the 3rd latch, each output pin of the 3rd latch Correspondence one light emitting diode of connection, the reset pin connection of the reset pin and the 3rd latch of first latch is described Reset circuit, the output end of the NAND gate connects the clock pins of the 3rd latch.