CN105206602A - Integrated module stack structure and electronic equipment - Google Patents
Integrated module stack structure and electronic equipment Download PDFInfo
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- CN105206602A CN105206602A CN201410268444.3A CN201410268444A CN105206602A CN 105206602 A CN105206602 A CN 105206602A CN 201410268444 A CN201410268444 A CN 201410268444A CN 105206602 A CN105206602 A CN 105206602A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
The present invention discloses an integrated module stack structure and electronic equipment. The integrated module stack structure comprises a first integrated module, a second integrated module and a connection layer which is arranged between the first integrated module and the second integrated module. The wire layout of the connection layer is arranged according to the first integrated module and the second integrated module. The connection layer is arranged to be electrically connected to the first integrated module and the second integrated module such that the data transfer can be carried out between the first integrated module and the second integrated module.
Description
Technical field
The present invention relates to electronic technology field, particularly relate to a kind of integration module stacked structure and electronic equipment.
Background technology
Along with the development of semiconductor industry, to the integrated level of semiconductor chip and small form factor requirements more and more higher.For meeting the integrated level of semiconductor chip and miniaturized requirement, encapsulation technology also constantly progresses greatly, and various different stacked package technology is also developed successively, and it is important more to seem.
Common encapsulation technology comprises laminate packaging (PackageOnPackage), the silicon through hole (ThroughSiliconVia that routing bonding (Wirebonding) encapsulates, covers brilliant bonding (Flip-chipbonding) encapsulation and derive thus, TSV) encapsulation, fan-out-type wafer-level packaging (FanOutWaferLevelPackage, FOWLP) etc.
The upper integration module of existing fan-out-type wafer-level packaging and lower integration module arrange connection pin by the packaging body periphery at lower integration module, go out connection pin to periphery by the input and output of the chip on lower integration module being walked alignment four-side fan, with and realize upper electrical interconnects in the stacking direction between integration module and lower integration module.
Due to described connection pin be arranged at the packaging body of described lower integration module peripheral time, need the position of the chip of dodging out on described lower integration module, therefore, the position connecting pin can be subject to the impact of the chip on lower integration module.
But present inventor in the process realizing technical scheme, at least find that above-mentioned prior art exists following technical problem:
Position due to described connection pin can be subject to the impact of the chip on lower integration module, therefore, when chip on lower integration module is different, need to change described connection pin according to chip, thus make the efficiency that encapsulates the integration module of different chip lower.
Summary of the invention
The application provides a kind of integration module stacked structure and electronic equipment, when solving the chip difference in prior art on lower integration module, need to change described connection pin according to chip, and the technical problem making the efficiency that encapsulates the integration module of different chip lower.
The application provides a kind of integration module stacked structure, described integration module stacked structure comprises the first integration module, the second integration module and articulamentum, described articulamentum is arranged between described first integration module and described second integration module, the wiring of described articulamentum is arranged according to described first integration module and described second integration module, described articulamentum is arranged for being electrically connected described first integration module and described second integration module, to make can carry out transfer of data between described first integration module and described second integration module.
Preferably, described first integration module comprises first substrate and is fixed on the first chip on described first substrate; Described second integration module comprises second substrate and is fixed on the second chip on described second substrate; Described articulamentum is individual component, or is a part for described first substrate and second substrate.
Preferably, described articulamentum is a part for described second substrate, and described second chip is positioned at side opposing with described first integration module on described second substrate.
Preferably, described articulamentum is individual component, and described second chip is between described second substrate and described articulamentum.
Preferably, described first substrate is provided with at least one first data transmission point, described second substrate is provided with at least one second transfer of data point, the second contact point described articulamentum being provided with first make contact and being electrically connected with described first make contact;
Wherein, described first make contact and described first data transmission point in electrical contact, described second contact point and described second transfer of data point in electrical contact, to make can carry out transfer of data between described first integration module and described second integration module.
Preferably, described first make contact and described second contact point are positioned on two surfaces opposing on described articulamentum.
Preferably, described first substrate is also provided with the 3rd transfer of data point, described second substrate is also provided with the 4th transfer of data point and the five transfer of data point opposing with described 4th transfer of data point, described 5th transfer of data point is in order to be electrically connected with described 4th transfer of data point and described second chip;
Described articulamentum is provided with and the 3rd contact point of described 3rd transfer of data point cantact and the 4th contact point that is electrically connected with described 3rd contact point, described 4th contact point is positioned on surface opposing with described first integration module on described articulamentum, in order to described 4th transfer of data point cantact, make described first integration module can carry out transfer of data with the electronic device except described second integration module, described second chip can carry out transfer of data with the electronic device except described first integration module.
The application also provides a kind of electronic equipment, described electronic equipment comprises circuit board and integration module stacked structure, described integration module stacked structure and described circuit board are electrically connected, described integration module stacked structure comprises the first integration module, second integration module and articulamentum, described articulamentum is arranged between described first integration module and described second integration module, the wiring of described articulamentum is arranged according to described first integration module and described second integration module, described articulamentum is arranged for being electrically connected described first integration module and described second integration module, to make can carry out transfer of data between described first integration module and described second integration module.
Preferably, described first integration module comprises first substrate and is fixed on the first chip on described first substrate; Described second integration module comprises second substrate and is fixed on the second chip on described second substrate; Described articulamentum is individual component, or is a part for described first substrate and second substrate.
Preferably, described articulamentum is a part for described second substrate, and described second chip is positioned at side opposing with described first integration module on described second substrate.
Preferably, described articulamentum is individual component, and described second chip is between described second substrate and described articulamentum.
Preferably, described first substrate is provided with at least one first data transmission point, described second substrate is provided with at least one second transfer of data point, the second contact point described articulamentum being provided with first make contact and being electrically connected with described first make contact;
Wherein, described first make contact and described first data transmission point in electrical contact, described second contact point and described second transfer of data point in electrical contact, to make can carry out transfer of data between described first integration module and described second integration module.
Preferably, described first make contact and described second contact point are positioned on two surfaces opposing on described articulamentum.
Preferably, described first substrate is also provided with the 3rd transfer of data point, described second substrate is also provided with the 4th transfer of data point and the five transfer of data point opposing with described 4th transfer of data point, described 5th transfer of data point is in order to be electrically connected with described 4th transfer of data point and described second chip;
Described articulamentum is provided with and the 3rd contact point of described 3rd transfer of data point cantact and the 4th contact point that is electrically connected with described 3rd contact point, described 4th contact point is positioned on surface opposing with described first integration module on described articulamentum, in order to described 4th transfer of data point cantact, make described first integration module and described second integration module can carry out transfer of data with described circuit board.
The application's beneficial effect is as follows:
Above-mentioned integration module stacked structure and electronic equipment by arranging articulamentum between described first integration module and described second integration module, described first integration module and described second integration module is electrically connected by described articulamentum, to make can carry out transfer of data between described first integration module and described second integration module, when described second integration module adopts the second different chips, the wiring of described articulamentum can be changed according to described second chip, make can carry out transfer of data between described first integration module and described second integration module, thus avoid when described second integration module adopts the second different chips, need to change the position with the contact point of described first integration module on described second integration module, when solving the chip difference in prior art on lower integration module, need to change described connection pin according to chip, and the technical problem making the efficiency that encapsulates the integration module of different chip lower.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described by the accompanying drawing used required in describing embodiment below, apparently, the accompanying drawing in the following describes is only some embodiments of the present invention.
Fig. 1 is the structural representation of a kind of integration module stacked structure of the application one better embodiment;
Fig. 2 is the structural representation of a kind of integration module stacked structure of another better embodiment of the application;
Fig. 3 is the structural representation of a kind of electronic equipment of the another better embodiment of the application.
Embodiment
The embodiment of the present application is by providing a kind of integration module stacked structure and electronic equipment, when solving the chip difference in prior art on lower integration module, need to change described connection pin according to chip, and the technical problem making the efficiency that encapsulates the integration module of different chip lower.
Technical scheme in the embodiment of the present application is for solving the problems of the technologies described above, and general thought is as follows:
A kind of integration module stacked structure, described integration module stacked structure comprises the first integration module, the second integration module and articulamentum, described articulamentum is arranged between described first integration module and described second integration module, the wiring of described articulamentum is arranged according to described first integration module and described second integration module, described articulamentum is arranged for being electrically connected described first integration module and described second integration module, to make can carry out transfer of data between described first integration module and described second integration module.
A kind of electronic equipment, described electronic equipment comprises circuit board and integration module stacked structure, described integration module stacked structure and described circuit board are electrically connected, described integration module stacked structure comprises the first integration module, second integration module and articulamentum, described articulamentum is arranged between described first integration module and described second integration module, the wiring of described articulamentum is arranged according to described first integration module and described second integration module, described articulamentum is arranged for being electrically connected described first integration module and described second integration module, to make can carry out transfer of data between described first integration module and described second integration module.
Above-mentioned integration module stacked structure and electronic equipment by arranging articulamentum between described first integration module and described second integration module, described first integration module and described second integration module 20 is electrically connected by described articulamentum, to make can carry out transfer of data between described first integration module and described second integration module, when described second integration module adopts the second different chips, the wiring of described articulamentum can be changed according to described second chip, make can carry out transfer of data between described first integration module and described second integration module, thus avoid when described second integration module adopts the second different chips, need to change the position with the contact point of described first integration module on described second integration module, when solving the chip difference in prior art on lower integration module, need to change described connection pin according to chip, and the technical problem making the efficiency that encapsulates the integration module of different chip lower.
In order to better understand technique scheme, below in conjunction with Figure of description and concrete execution mode, technique scheme is described in detail.
Embodiment one
As shown in Figure 1, be the structural representation of a kind of integration module stacked structure 100 of the application one better embodiment.Described integration module stacked structure 100 comprises the first integration module 10, second integration module 20 and articulamentum 30.
Described first integration module 10 comprise the first chip 11, first substrate 12, for described first chip 11 being packaged in the encapsulation part 13 on described first substrate 12.Described first substrate 12 is provided with the wiring 16 be electrically connected with the pin of described first chip 11.Described first substrate 12 is provided with one or more for exporting the data message of described first chip 11 or be first data transmission point 14 and the 3rd transfer of data point 15 of described first chip 11 receiving data information, described first data transmission point 14 and described 3rd transfer of data point 15 are electrically connected with described wiring 16.
Described second integration module 20 comprise the second chip 21, second substrate 22, for described second chip 21 being packaged in the encapsulation part 23 on described second substrate 22.Described second substrate 22 is provided with the wiring 26 be electrically connected with the pin of described second chip 21.Described second substrate 22 is provided with one or more the second transfer of data point 24 and the 4th transfer of data point 25, described second transfer of data point 24 is for exporting the data message of described second chip 21 or being described second chip 21 receiving data information, and described second transfer of data point 24 and described 4th transfer of data point 25 are electrically connected with described wiring 26.
Described articulamentum 30 is arranged between described first integration module 10 and described second integration module 20, described articulamentum 30 is provided with wiring 36, and described wiring 36 is arranged according to the position of described first data transmission point 14, described 3rd transfer of data point 15, described second transfer of data point 24 and described 4th transfer of data point 25.Described articulamentum 30 can be individual component, and namely existing independent of described first integration module 10 and described second integration module 20, also can be a part for described first substrate 12 and second substrate 22.
In the integration module stacked structure 100 shown in Fig. 1, described articulamentum 30 is a part for second substrate 22.Now, described second chip 21 is positioned at side opposing with described first integration module 10 on described second substrate 22.
Described articulamentum 30 is provided with first make contact 31, second contact point 32 and the 3rd contact point 33 and the 4th contact point 34, described second contact point 32 is electrically connected with described first make contact 31, and described 4th contact point 34 is electrically connected with described 3rd contact point 33.
Described first make contact 31 and described 3rd contact point 33 are positioned on described articulamentum 30 surface relative with described first substrate 12, described second contact point 32 and described 4th contact point 34 are positioned on described articulamentum 30 surface relative with described second substrate 22, and, described first make contact 31 and described second contact point 32 are electrically connected with described wiring 36, to make to be electrically connected between described first make contact 31 and described second contact point 32; Described 3rd contact point 33 and described 4th contact point 34 are electrically connected with described wiring 36, to make to be electrically connected between described 3rd contact 33 and described 4th contact point 34.
Described first make contact 31 is in electrical contact with described first data transmission point 14, described second contact point 32 is in electrical contact with described second transfer of data point 24, to make can carry out transfer of data between described first integration module 10 and described second integration module 20, that is, transfer of data can be carried out between described first chip 11 and described second chip 21.
Described 3rd contact point 33 is in electrical contact with described 3rd transfer of data point 15, described 4th contact point 34 is in electrical contact with described 4th transfer of data point 25, the data message that described first chip 11 is sent can be transferred to described 3rd contact point 33 by described 3rd transfer of data point 15, then is transferred to described 4th transfer of data point 25 by the 4th contact point 34 be electrically connected with described 3rd contact point 33.
In addition, in the present embodiment, the surface that described second substrate 22 is opposing with described first integration module 10 is also provided with the 5th transfer of data point 27, described 5th transfer of data point 27 is electrically connected with described 4th transfer of data point 25 and described second chip 21 by described wiring 26, thus making described first integration module 10 can carry out transfer of data with the electronic device except described second integration module 20, described second chip 21 can carry out transfer of data with the electronic device except described first integration module 10.
In the integration module stacked structure 100 shown in Fig. 2, described articulamentum 30 is independent element.The structure of described articulamentum 30 is identical with the structure of the articulamentum 30 in Fig. 1, and difference is only that described articulamentum 30 is for independently element.Described second chip 21 is between described second substrate 22 and described articulamentum 30.
In other embodiments, described articulamentum 30 also can be a part for first substrate 12.Similarly, described second chip 21 is positioned at side opposing with described first integration module 10 on described second substrate 22.
Above-mentioned integration module stacked structure 100 by arranging articulamentum 30 between described first integration module 10 and described second integration module 20, described first integration module 10 and described second integration module 20 is electrically connected by described articulamentum 30, to make can carry out transfer of data between described first integration module 10 and described second integration module 20, when described second integration module 20 adopts the second different chips 21, the wiring of described articulamentum 30 can be changed according to described second chip 21, make can carry out transfer of data between described first integration module 10 and described second integration module 20, thus avoid when described second integration module 20 adopts the second different chips 21, need to change the position with the contact point of described first integration module 10 on described second integration module 20, when solving the chip difference in prior art on lower integration module, need to change described connection pin according to chip, and the technical problem making the efficiency that encapsulates the integration module of different chip lower.
Embodiment two
Based on same inventive concept, the application also provides a kind of electronic equipment 200, as shown in Figure 3, and the circuit board 210 that described electronic equipment 200 comprises integration module stacked structure 100 and is electrically connected with described integration module stacker mechanism 100.
Described integration module stacked structure 100 is identical with the integration module stacker mechanism of embodiment one.Described integration module stacked structure 100 comprises the first integration module 10, second integration module 20 and articulamentum 30.Described articulamentum 30 is arranged between described first integration module 10 and described second integration module 20, the wiring of described articulamentum 30 is arranged according to described first integration module 10 and described second integration module 20, described articulamentum 30 is arranged for being electrically connected described first integration module 10 and described second integration module 20, to make can carry out transfer of data between described first integration module 10 and described second integration module 20.
Particularly, described first integration module 10 comprises first substrate and is fixed on the first chip on described first substrate; Described second integration module 20 comprises second substrate and is fixed on the second chip on described second substrate; Described articulamentum 30 is individual component, or is a part for described first substrate and second substrate.
Particularly, described articulamentum 30 is a part for described second substrate, and described second chip is positioned at side opposing with described first integration module on described second substrate.
Particularly, described articulamentum 30 is individual component, and described second chip is between described second substrate and described articulamentum.
Particularly, described first substrate is provided with at least one first data transmission point, described second substrate is provided with at least one second transfer of data point, the second contact point described articulamentum 30 being provided with first make contact and being electrically connected with described first make contact; Wherein, described first make contact and described first data transmission point in electrical contact, described second contact point and described second transfer of data point in electrical contact, to make can carry out transfer of data between described first integration module 10 and described second integration module 20.
Particularly, described first make contact and described second contact point are positioned on two surfaces opposing on described articulamentum.
Particularly, described first substrate is also provided with the 3rd transfer of data point, described second substrate is also provided with the 4th transfer of data point and the five transfer of data point opposing with described 4th transfer of data point, described 5th transfer of data point is in order to be electrically connected with described 4th transfer of data point and described second chip; Described articulamentum 30 is provided with and the 3rd contact point of described 3rd transfer of data point cantact and the 4th contact point that is electrically connected with described 3rd contact point, described 4th contact point is positioned on surface opposing with described first integration module on described articulamentum, in order to described 4th transfer of data point cantact, make described first integration module 10 and described second integration module 20 can carry out transfer of data with described circuit board.
Above-mentioned electronic equipment 200 by arranging articulamentum 30 between described first integration module 10 and described second integration module 20, described first integration module 10 and described second integration module 20 is electrically connected by described articulamentum 30, to make can carry out transfer of data between described first integration module 10 and described second integration module 20, when described second integration module 20 adopts the second different chips, the wiring of described articulamentum 30 can be changed according to described second chip, make can carry out transfer of data between described first integration module 10 and described second integration module 20, thus avoid when described second integration module 20 adopts the second different chips, need to change the position with the contact point of described first integration module 10 on described second integration module 20, when solving the chip difference in prior art on lower integration module, need to change described connection pin according to chip, and the technical problem making the efficiency that encapsulates the integration module of different chip lower.
Although describe the preferred embodiments of the present invention, those skilled in the art once obtain the basic creative concept of cicada, then can make other change and amendment to these embodiments.So claims are intended to be interpreted as comprising preferred embodiment and falling into all changes and the amendment of the scope of the invention.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (14)
1. an integration module stacked structure, described integration module stacked structure comprises:
First integration module;
Second integration module;
Articulamentum, be arranged between described first integration module and described second integration module, the wiring of described articulamentum is arranged according to described first integration module and described second integration module, described articulamentum is arranged for being electrically connected described first integration module and described second integration module, to make can carry out transfer of data between described first integration module and described second integration module.
2. integration module stacked structure as claimed in claim 1, is characterized in that, described first integration module comprises first substrate and is fixed on the first chip on described first substrate;
Described second integration module comprises second substrate and is fixed on the second chip on described second substrate;
Described articulamentum is individual component, or is a part for described first substrate and second substrate.
3. integration module stacked structure as claimed in claim 2, it is characterized in that, described articulamentum is a part for described second substrate, and described second chip is positioned at side opposing with described first integration module on described second substrate.
4. integration module stacked structure as claimed in claim 2, it is characterized in that, described articulamentum is individual component, and described second chip is between described second substrate and described articulamentum.
5. integration module stacked structure as claimed in claim 2, it is characterized in that, described first substrate is provided with at least one first data transmission point, described second substrate is provided with at least one second transfer of data point, the second contact point described articulamentum being provided with first make contact and being electrically connected with described first make contact;
Wherein, described first make contact and described first data transmission point in electrical contact, described second contact point and described second transfer of data point in electrical contact, to make can carry out transfer of data between described first integration module and described second integration module.
6. integration module stacked structure as claimed in claim 5, it is characterized in that, described first make contact and described second contact point are positioned on two surfaces opposing on described articulamentum.
7. integration module stacked structure as claimed in claim 5, it is characterized in that, described first substrate is also provided with the 3rd transfer of data point, described second substrate is also provided with the 4th transfer of data point and the five transfer of data point opposing with described 4th transfer of data point, described 5th transfer of data point is in order to be electrically connected with described 4th transfer of data point and described second chip;
Described articulamentum is provided with and the 3rd contact point of described 3rd transfer of data point cantact and the 4th contact point that is electrically connected with described 3rd contact point, described 4th contact point is positioned on surface opposing with described first integration module on described articulamentum, in order to described 4th transfer of data point cantact, make described first integration module can carry out transfer of data with the electronic device except described second integration module, described second chip can carry out transfer of data with the electronic device except described first integration module.
8. an electronic equipment, described electronic equipment comprises:
Circuit board;
Integration module stacked structure, is electrically connected with described circuit board, and described integration module stacked structure comprises:
First integration module;
Second integration module;
Articulamentum, be arranged between described first integration module and described second integration module, the wiring of described articulamentum is arranged according to described first integration module and described second integration module, described articulamentum is arranged for being electrically connected described first integration module and described second integration module, to make can carry out transfer of data between described first integration module and described second integration module.
9. electronic equipment as claimed in claim 8, is characterized in that, described first integration module comprises first substrate and is fixed on the first chip on described first substrate;
Described second integration module comprises second substrate and is fixed on the second chip on described second substrate;
Described articulamentum is individual component, or is a part for described first substrate and second substrate.
10. electronic equipment as claimed in claim 9, it is characterized in that, described articulamentum is a part for described second substrate, and described second chip is positioned at side opposing with described first integration module on described second substrate.
11. electronic equipments as claimed in claim 9, it is characterized in that, described articulamentum is individual component, and described second chip is between described second substrate and described articulamentum.
12. electronic equipments as claimed in claim 9, it is characterized in that, described first substrate is provided with at least one first data transmission point, described second substrate is provided with at least one second transfer of data point, the second contact point described articulamentum being provided with first make contact and being electrically connected with described first make contact;
Wherein, described first make contact and described first data transmission point in electrical contact, described second contact point and described second transfer of data point in electrical contact, to make can carry out transfer of data between described first integration module and described second integration module.
13. electronic equipments as claimed in claim 12, is characterized in that, described first make contact and described second contact point are positioned on two surfaces opposing on described articulamentum.
14. electronic equipments as claimed in claim 13, it is characterized in that, described first substrate is also provided with the 3rd transfer of data point, described second substrate is also provided with the 4th transfer of data point and the five transfer of data point opposing with described 4th transfer of data point, described 5th transfer of data point is in order to be electrically connected with described 4th transfer of data point and described second chip;
Described articulamentum is provided with and the 3rd contact point of described 3rd transfer of data point cantact and the 4th contact point that is electrically connected with described 3rd contact point, described 4th contact point is positioned on surface opposing with described first integration module on described articulamentum, in order to described 4th transfer of data point cantact, make described first integration module and described second integration module can carry out transfer of data with described circuit board.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169842A (en) * | 2010-02-03 | 2011-08-31 | 马维尔国际贸易有限公司 | Techniques and configurations for recessed semiconductor substrates |
| CN102376595A (en) * | 2010-08-16 | 2012-03-14 | 新科金朋有限公司 | Method and semiconductor device of forming FO-WLCSP having conductive layers and conductive vias |
| US20120112355A1 (en) * | 2010-08-27 | 2012-05-10 | Stats Chippac, Ltd. | Semiconductor Device and Method of Forming Stepped Interconnect Layer for Stacked Semiconductor Die |
-
2014
- 2014-06-16 CN CN201410268444.3A patent/CN105206602B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169842A (en) * | 2010-02-03 | 2011-08-31 | 马维尔国际贸易有限公司 | Techniques and configurations for recessed semiconductor substrates |
| CN102376595A (en) * | 2010-08-16 | 2012-03-14 | 新科金朋有限公司 | Method and semiconductor device of forming FO-WLCSP having conductive layers and conductive vias |
| US20120112355A1 (en) * | 2010-08-27 | 2012-05-10 | Stats Chippac, Ltd. | Semiconductor Device and Method of Forming Stepped Interconnect Layer for Stacked Semiconductor Die |
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